Lines Matching +full:0 +full:x96

22 	return val & 0x0F;  in rts5227_get_ic_version()
28 {0x13, 0x13, 0x13}, in rts5227_fill_driving()
29 {0x96, 0x96, 0x96}, in rts5227_fill_driving()
30 {0x7F, 0x7F, 0x7F}, in rts5227_fill_driving()
31 {0x96, 0x96, 0x96}, in rts5227_fill_driving()
34 {0x99, 0x99, 0x99}, in rts5227_fill_driving()
35 {0xAA, 0xAA, 0xAA}, in rts5227_fill_driving()
36 {0xFE, 0xFE, 0xFE}, in rts5227_fill_driving()
37 {0xB3, 0xB3, 0xB3}, in rts5227_fill_driving()
50 0xFF, driving[drive_sel][0]); in rts5227_fill_driving()
52 0xFF, driving[drive_sel][1]); in rts5227_fill_driving()
54 0xFF, driving[drive_sel][2]); in rts5227_fill_driving()
63 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); in rts5227_fetch_vendor_settings()
70 pcr->card_drive_sel &= 0x3F; in rts5227_fetch_vendor_settings()
74 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); in rts5227_fetch_vendor_settings()
75 if (CHK_PCI_PID(pcr, 0x522A)) in rts5227_fetch_vendor_settings()
97 if (CHK_PCI_PID(pcr, 0x522A)) { in rts5227_init_from_cfg()
98 if (0 == (lval & 0x0F)) in rts5227_init_from_cfg()
154 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02); in rts5227_extra_init_hw()
156 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0); in rts5227_extra_init_hw()
158 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00); in rts5227_extra_init_hw()
159 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01); in rts5227_extra_init_hw()
161 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02); in rts5227_extra_init_hw()
165 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LTR_CTL, 0xFF, 0xA3); in rts5227_extra_init_hw()
167 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OBFF_CFG, 0x03, 0x03); in rts5227_extra_init_hw()
172 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x30, 0x30); in rts5227_extra_init_hw()
174 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x30, 0x00); in rts5227_extra_init_hw()
176 if (CHK_PCI_PID(pcr, 0x522A)) in rts5227_extra_init_hw()
181 if (CHK_PCI_PID(pcr, 0x522A)) { in rts5227_extra_init_hw()
182 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PM_CTRL3, 0x01, 0x01); in rts5227_extra_init_hw()
183 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PME_FORCE_CTL, 0x30, 0x30); in rts5227_extra_init_hw()
185 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x01, 0x01); in rts5227_extra_init_hw()
186 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PME_FORCE_CTL, 0xFF, 0x33); in rts5227_extra_init_hw()
189 if (CHK_PCI_PID(pcr, 0x522A)) { in rts5227_extra_init_hw()
190 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PM_CTRL3, 0x01, 0x00); in rts5227_extra_init_hw()
191 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, RTS522A_PME_FORCE_CTL, 0x30, 0x20); in rts5227_extra_init_hw()
193 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PME_FORCE_CTL, 0xFF, 0x30); in rts5227_extra_init_hw()
194 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PM_CTRL3, 0x01, 0x00); in rts5227_extra_init_hw()
205 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, pcr->reg_pm_ctrl3, 0x10, 0x00); in rts5227_extra_init_hw()
214 err = rtsx_pci_write_register(pcr, PM_CTRL3, D3_DELINK_MODE_EN, 0x00); in rts5227_optimize_phy()
215 if (err < 0) in rts5227_optimize_phy()
219 return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42); in rts5227_optimize_phy()
224 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02); in rts5227_turn_on_led()
229 return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00); in rts5227_turn_off_led()
234 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08); in rts5227_enable_auto_blink()
239 return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00); in rts5227_disable_auto_blink()
254 LDO3318_PWR_MASK, 0x02); in rts5227_card_power_on()
257 if (err < 0) in rts5227_card_power_on()
267 LDO3318_PWR_MASK, 0x06); in rts5227_card_power_on()
283 rtsx_pci_write_register(pcr, PWR_GATE_CTRL, LDO3318_PWR_MASK, 0X00); in rts5227_card_power_off()
285 return 0; in rts5227_card_power_off()
293 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24); in rts5227_switch_output_voltage()
294 if (err < 0) in rts5227_switch_output_voltage()
297 err = rtsx_pci_write_phy_register(pcr, 0x11, 0x3C02); in rts5227_switch_output_voltage()
298 if (err < 0) in rts5227_switch_output_voltage()
300 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C80 | 0x24); in rts5227_switch_output_voltage()
301 if (err < 0) in rts5227_switch_output_voltage()
329 * SD_DAT[3:0] ==> pull up
336 RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
337 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
338 0,
342 * SD_DAT[3:0] ==> pull down
349 RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
350 RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
351 0,
359 RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
360 RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
361 0,
369 RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
370 RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
371 0,
380 pcr->flags = 0; in rts5227_init_params()
403 0x00); in rts522a_optimize_phy()
404 if (err < 0) in rts522a_optimize_phy()
407 if (is_version(pcr, 0x522A, IC_VER_A)) { in rts522a_optimize_phy()
419 return 0; in rts522a_optimize_phy()
433 rtsx_pci_write_register(pcr, PCLK_CTL, 0x04, 0x04); in rts522a_extra_init_hw()
435 rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, 0xFF, 0x11); in rts522a_extra_init_hw()
437 return 0; in rts522a_extra_init_hw()
445 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x57E4); in rts522a_switch_output_voltage()
446 if (err < 0) in rts522a_switch_output_voltage()
449 err = rtsx_pci_write_phy_register(pcr, 0x11, 0x3C02); in rts522a_switch_output_voltage()
450 if (err < 0) in rts522a_switch_output_voltage()
452 err = rtsx_pci_write_phy_register(pcr, 0x08, 0x54A4); in rts522a_switch_output_voltage()
453 if (err < 0) in rts522a_switch_output_voltage()
467 /* Set relink_time to 0 */ in rts522a_force_power_down()
468 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); in rts522a_force_power_down()
469 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); in rts522a_force_power_down()
471 RELINK_TIME_MASK, 0); in rts522a_force_power_down()
478 CD_RESUME_EN_MASK, 0); in rts522a_force_power_down()
479 rtsx_pci_write_register(pcr, RTS522A_PM_CTRL3, 0x01, 0x00); in rts522a_force_power_down()
480 rtsx_pci_write_register(pcr, RTS522A_PME_FORCE_CTL, 0x30, 0x20); in rts522a_force_power_down()
491 u8 val = 0; in rts522a_set_l1off_cfg_sub_d0()
546 option->ltr_l1off_sspwrgate = 0x7F; in rts522a_init_params()
547 option->ltr_l1off_snooze_sspwrgate = 0x78; in rts522a_init_params()