Lines Matching +full:control +full:- +full:parent
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright(c) 2005-2006 Chris Humbert
39 #define SCR_GPO_DOECR(i) (0x7c + (i)) /* b3 GPO Data OE Control */
40 #define SCR_GP_IARCR(i) (0x80 + (i)) /* b3 GP Internal Active Register Control */
41 #define SCR_GP_IARLCR(i) (0x84 + (i)) /* b3 GP INTERNAL Active Register Level Control */
42 #define SCR_GPI_BCR(i) (0x88 + (i)) /* b3 GPI Buffer Control */
43 #define SCR_GPA_IARCR 0x8c /* w GPa Internal Active Register Control */
44 #define SCR_GPA_IARLCR 0x90 /* w GPa Internal Active Register Level Control */
45 #define SCR_GPA_BCR 0x94 /* w GPa Buffer Control */
46 #define SCR_CCR 0x98 /* w Clock Control */
47 #define SCR_PLL2CR 0x9a /* w PLL2 Control */
48 #define SCR_PLL1CR 0x9c /* l PLL1 Control */
49 #define SCR_DIARCR 0xa0 /* b Device Internal Active Register Control */
50 #define SCR_DBOCR 0xa1 /* b Device Buffer Off Control */
52 #define SCR_MCR 0xe4 /* w Mode Control */
53 #define SCR_CONFIG 0xfc /* b Configuration Control */
84 /* bits 8 - 16 are unknown */
88 /*--------------------------------------------------------------------------*/
122 /*--------------------------------------------------------------------------*/
126 struct tc6393xb *tc6393xb = dev_get_drvdata(nand->dev.parent); in tc6393xb_nand_enable()
129 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_nand_enable()
132 dev_dbg(nand->dev.parent, "SMD buffer on\n"); in tc6393xb_nand_enable()
133 tmio_iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1)); in tc6393xb_nand_enable()
135 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_nand_enable()
224 struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); in tc6393xb_ohci_enable()
229 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_ohci_enable()
231 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_enable()
233 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_enable()
235 fer = tmio_ioread8(tc6393xb->scr + SCR_FER); in tc6393xb_ohci_enable()
237 tmio_iowrite8(fer, tc6393xb->scr + SCR_FER); in tc6393xb_ohci_enable()
239 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_ohci_enable()
246 struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); in tc6393xb_ohci_disable()
251 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_ohci_disable()
253 fer = tmio_ioread8(tc6393xb->scr + SCR_FER); in tc6393xb_ohci_disable()
255 tmio_iowrite8(fer, tc6393xb->scr + SCR_FER); in tc6393xb_ohci_disable()
257 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_disable()
259 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_disable()
261 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_ohci_disable()
268 struct tc6393xb_platform_data *tcpd = dev_get_platdata(dev->dev.parent); in tc6393xb_ohci_suspend()
271 if (tcpd->resume_restore) in tc6393xb_ohci_suspend()
272 return -EBUSY; in tc6393xb_ohci_suspend()
279 struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); in tc6393xb_fb_enable()
283 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_fb_enable()
285 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_fb_enable()
288 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_fb_enable()
290 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_fb_enable()
297 struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); in tc6393xb_fb_disable()
301 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_fb_disable()
303 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_fb_disable()
306 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_fb_disable()
308 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_fb_disable()
315 struct tc6393xb *tc6393xb = dev_get_drvdata(fb->dev.parent); in tc6393xb_lcd_set_power()
319 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_lcd_set_power()
321 fer = ioread8(tc6393xb->scr + SCR_FER); in tc6393xb_lcd_set_power()
326 iowrite8(fer, tc6393xb->scr + SCR_FER); in tc6393xb_lcd_set_power()
328 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_lcd_set_power()
336 struct tc6393xb *tc6393xb = dev_get_drvdata(fb->dev.parent); in tc6393xb_lcd_mode()
339 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_lcd_mode()
341 iowrite16(mode->pixclock, tc6393xb->scr + SCR_PLL1CR + 0); in tc6393xb_lcd_mode()
342 iowrite16(mode->pixclock >> 16, tc6393xb->scr + SCR_PLL1CR + 2); in tc6393xb_lcd_mode()
344 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_lcd_mode()
352 struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); in tc6393xb_mmc_enable()
354 tmio_core_mmc_enable(tc6393xb->scr + 0x200, 0, in tc6393xb_mmc_enable()
362 struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); in tc6393xb_mmc_resume()
364 tmio_core_mmc_resume(tc6393xb->scr + 0x200, 0, in tc6393xb_mmc_resume()
372 struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); in tc6393xb_mmc_pwr()
374 tmio_core_mmc_pwr(tc6393xb->scr + 0x200, 0, state); in tc6393xb_mmc_pwr()
379 struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); in tc6393xb_mmc_clk_div()
381 tmio_core_mmc_clk_div(tc6393xb->scr + 0x200, 0, state); in tc6393xb_mmc_clk_div()
392 .name = "tmio-nand",
398 .name = "tmio-mmc",
407 .name = "tmio-ohci",
416 .name = "tmio-fb",
426 /*--------------------------------------------------------------------------*/
434 return !!(tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8)) in tc6393xb_gpio_get()
444 dsr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8)); in __tc6393xb_gpio_set()
450 tmio_iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8)); in __tc6393xb_gpio_set()
459 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_gpio_set()
463 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_gpio_set()
473 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_gpio_direction_input()
475 doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); in tc6393xb_gpio_direction_input()
477 tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); in tc6393xb_gpio_direction_input()
479 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_gpio_direction_input()
491 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_gpio_direction_output()
495 doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); in tc6393xb_gpio_direction_output()
497 tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); in tc6393xb_gpio_direction_output()
499 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_gpio_direction_output()
525 GPIO_LOOKUP_SINGLE(tosa_lcd_bl_gpio_lookup, "i2c-tos-bl", "tc6393xb",
528 GPIO_LOOKUP_SINGLE(tosa_audio_gpio_lookup, "tosa-audio", "tc6393xb",
532 .dev_id = "wm97xx-battery",
564 struct gpio_chip *gc = &tc6393xb->gpio; in tc6393xb_register_gpio()
565 struct device *dev = tc6393xb->dev; in tc6393xb_register_gpio()
568 gc->label = "tc6393xb"; in tc6393xb_register_gpio()
569 gc->base = -1; /* Dynamic allocation */ in tc6393xb_register_gpio()
570 gc->ngpio = 16; in tc6393xb_register_gpio()
571 gc->set = tc6393xb_gpio_set; in tc6393xb_register_gpio()
572 gc->get = tc6393xb_gpio_get; in tc6393xb_register_gpio()
573 gc->direction_input = tc6393xb_gpio_direction_input; in tc6393xb_register_gpio()
574 gc->direction_output = tc6393xb_gpio_direction_output; in tc6393xb_register_gpio()
580 /* Register descriptor look-ups for consumers */ in tc6393xb_register_gpio()
584 tc6393xb->vcc_on = gpiochip_request_own_desc(gc, TOSA_GPIO_CARD_VCC_ON, "VCC ON", in tc6393xb_register_gpio()
586 if (IS_ERR(tc6393xb->vcc_on)) in tc6393xb_register_gpio()
587 return dev_err_probe(dev, PTR_ERR(tc6393xb->vcc_on), in tc6393xb_register_gpio()
593 /*--------------------------------------------------------------------------*/
601 irq_base = tc6393xb->irq_base; in tc6393xb_irq()
603 while ((isr = tmio_ioread8(tc6393xb->scr + SCR_ISR) & in tc6393xb_irq()
604 ~tmio_ioread8(tc6393xb->scr + SCR_IMR))) in tc6393xb_irq()
621 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_irq_mask()
622 imr = tmio_ioread8(tc6393xb->scr + SCR_IMR); in tc6393xb_irq_mask()
623 imr |= 1 << (data->irq - tc6393xb->irq_base); in tc6393xb_irq_mask()
624 tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR); in tc6393xb_irq_mask()
625 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_irq_mask()
634 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_irq_unmask()
635 imr = tmio_ioread8(tc6393xb->scr + SCR_IMR); in tc6393xb_irq_unmask()
636 imr &= ~(1 << (data->irq - tc6393xb->irq_base)); in tc6393xb_irq_unmask()
637 tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR); in tc6393xb_irq_unmask()
638 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_irq_unmask()
653 irq_base = tc6393xb->irq_base; in tc6393xb_attach_irq()
661 irq_set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING); in tc6393xb_attach_irq()
662 irq_set_chained_handler_and_data(tc6393xb->irq, tc6393xb_irq, in tc6393xb_attach_irq()
671 irq_set_chained_handler_and_data(tc6393xb->irq, NULL, NULL); in tc6393xb_detach_irq()
673 irq_base = tc6393xb->irq_base; in tc6393xb_detach_irq()
682 /*--------------------------------------------------------------------------*/
686 struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); in tc6393xb_probe()
693 return -EINVAL; in tc6393xb_probe()
697 ret = -ENOMEM; in tc6393xb_probe()
700 tc6393xb->dev = &dev->dev; in tc6393xb_probe()
702 raw_spin_lock_init(&tc6393xb->lock); in tc6393xb_probe()
708 tc6393xb->irq = ret; in tc6393xb_probe()
712 tc6393xb->iomem = iomem; in tc6393xb_probe()
713 tc6393xb->irq_base = tcpd->irq_base; in tc6393xb_probe()
715 tc6393xb->clk = clk_get(&dev->dev, "CLK_CK3P6MI"); in tc6393xb_probe()
716 if (IS_ERR(tc6393xb->clk)) { in tc6393xb_probe()
717 ret = PTR_ERR(tc6393xb->clk); in tc6393xb_probe()
721 rscr = &tc6393xb->rscr; in tc6393xb_probe()
722 rscr->name = "tc6393xb-core"; in tc6393xb_probe()
723 rscr->start = iomem->start; in tc6393xb_probe()
724 rscr->end = iomem->start + 0xff; in tc6393xb_probe()
725 rscr->flags = IORESOURCE_MEM; in tc6393xb_probe()
731 tc6393xb->scr = ioremap(rscr->start, resource_size(rscr)); in tc6393xb_probe()
732 if (!tc6393xb->scr) { in tc6393xb_probe()
733 ret = -ENOMEM; in tc6393xb_probe()
737 ret = clk_prepare_enable(tc6393xb->clk); in tc6393xb_probe()
741 ret = tcpd->enable(dev); in tc6393xb_probe()
745 iowrite8(0, tc6393xb->scr + SCR_FER); in tc6393xb_probe()
746 iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR); in tc6393xb_probe()
748 tc6393xb->scr + SCR_CCR); in tc6393xb_probe()
751 BIT(15), tc6393xb->scr + SCR_MCR); in tc6393xb_probe()
752 iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER); in tc6393xb_probe()
753 iowrite8(0, tc6393xb->scr + SCR_IRR); in tc6393xb_probe()
754 iowrite8(0xbf, tc6393xb->scr + SCR_IMR); in tc6393xb_probe()
757 tmio_ioread8(tc6393xb->scr + SCR_REVID), in tc6393xb_probe()
758 (unsigned long) iomem->start, tc6393xb->irq); in tc6393xb_probe()
766 tc6393xb_cells[TC6393XB_CELL_NAND].platform_data = tcpd->nand_data; in tc6393xb_probe()
768 sizeof(*tcpd->nand_data); in tc6393xb_probe()
769 tc6393xb_cells[TC6393XB_CELL_FB].platform_data = tcpd->fb_data; in tc6393xb_probe()
770 tc6393xb_cells[TC6393XB_CELL_FB].pdata_size = sizeof(*tcpd->fb_data); in tc6393xb_probe()
772 ret = mfd_add_devices(&dev->dev, dev->id, in tc6393xb_probe()
774 iomem, tcpd->irq_base, NULL); in tc6393xb_probe()
781 tcpd->disable(dev); in tc6393xb_probe()
783 clk_disable_unprepare(tc6393xb->clk); in tc6393xb_probe()
785 iounmap(tc6393xb->scr); in tc6393xb_probe()
787 release_resource(&tc6393xb->rscr); in tc6393xb_probe()
789 clk_put(tc6393xb->clk); in tc6393xb_probe()
799 struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); in tc6393xb_remove()
802 mfd_remove_devices(&dev->dev); in tc6393xb_remove()
806 tcpd->disable(dev); in tc6393xb_remove()
807 clk_disable_unprepare(tc6393xb->clk); in tc6393xb_remove()
808 iounmap(tc6393xb->scr); in tc6393xb_remove()
809 release_resource(&tc6393xb->rscr); in tc6393xb_remove()
810 clk_put(tc6393xb->clk); in tc6393xb_remove()
819 struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); in tc6393xb_suspend()
823 tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_suspend()
824 tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER); in tc6393xb_suspend()
827 tc6393xb->suspend_state.gpo_dsr[i] = in tc6393xb_suspend()
828 ioread8(tc6393xb->scr + SCR_GPO_DSR(i)); in tc6393xb_suspend()
829 tc6393xb->suspend_state.gpo_doecr[i] = in tc6393xb_suspend()
830 ioread8(tc6393xb->scr + SCR_GPO_DOECR(i)); in tc6393xb_suspend()
831 tc6393xb->suspend_state.gpi_bcr[i] = in tc6393xb_suspend()
832 ioread8(tc6393xb->scr + SCR_GPI_BCR(i)); in tc6393xb_suspend()
834 ret = tcpd->suspend(dev); in tc6393xb_suspend()
835 clk_disable_unprepare(tc6393xb->clk); in tc6393xb_suspend()
842 struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); in tc6393xb_resume()
847 ret = clk_prepare_enable(tc6393xb->clk); in tc6393xb_resume()
851 ret = tcpd->resume(dev); in tc6393xb_resume()
855 if (!tcpd->resume_restore) in tc6393xb_resume()
858 iowrite8(tc6393xb->suspend_state.fer, tc6393xb->scr + SCR_FER); in tc6393xb_resume()
859 iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR); in tc6393xb_resume()
860 iowrite16(tc6393xb->suspend_state.ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_resume()
863 BIT(15), tc6393xb->scr + SCR_MCR); in tc6393xb_resume()
864 iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER); in tc6393xb_resume()
865 iowrite8(0, tc6393xb->scr + SCR_IRR); in tc6393xb_resume()
866 iowrite8(0xbf, tc6393xb->scr + SCR_IMR); in tc6393xb_resume()
869 iowrite8(tc6393xb->suspend_state.gpo_dsr[i], in tc6393xb_resume()
870 tc6393xb->scr + SCR_GPO_DSR(i)); in tc6393xb_resume()
871 iowrite8(tc6393xb->suspend_state.gpo_doecr[i], in tc6393xb_resume()
872 tc6393xb->scr + SCR_GPO_DOECR(i)); in tc6393xb_resume()
873 iowrite8(tc6393xb->suspend_state.gpi_bcr[i], in tc6393xb_resume()
874 tc6393xb->scr + SCR_GPI_BCR(i)); in tc6393xb_resume()