135 	unsigned long misct = smc501_readl(sm->regs + SM501_MISC_TIMING);  in sm501_dump_clk()
136 	unsigned long pm0 = smc501_readl(sm->regs + SM501_POWER_MODE_0_CLOCK);  in sm501_dump_clk()
137 	unsigned long pm1 = smc501_readl(sm->regs + SM501_POWER_MODE_1_CLOCK);  in sm501_dump_clk()
138 	unsigned long pmc = smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL);  in sm501_dump_clk()
195 			smc501_readl(regs + SM501_SYSTEM_CONTROL));  in sm501_dump_regs()
197 			smc501_readl(regs + SM501_MISC_CONTROL));  in sm501_dump_regs()
199 			smc501_readl(regs + SM501_GPIO31_0_CONTROL));  in sm501_dump_regs()
201 			smc501_readl(regs + SM501_GPIO63_32_CONTROL));  in sm501_dump_regs()
203 			smc501_readl(regs + SM501_DRAM_CONTROL));  in sm501_dump_regs()
205 			smc501_readl(regs + SM501_ARBTRTN_CONTROL));  in sm501_dump_regs()
207 			smc501_readl(regs + SM501_MISC_TIMING));  in sm501_dump_regs()
213 			smc501_readl(sm->regs + SM501_CURRENT_GATE));  in sm501_dump_gate()
215 			smc501_readl(sm->regs + SM501_CURRENT_CLOCK));  in sm501_dump_gate()
217 			smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL));  in sm501_dump_gate()
233 	smc501_readl(sm->regs);  in sm501_sync_regs()
263 	misc = smc501_readl(sm->regs + SM501_MISC_CONTROL);  in sm501_misc_control()
296 	data = smc501_readl(sm->regs + reg);  in sm501_modify_reg()
324 	mode = smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL);  in sm501_unit_power()
325 	gate = smc501_readl(sm->regs + SM501_CURRENT_GATE);  in sm501_unit_power()
326 	clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK);  in sm501_unit_power()
513 	unsigned long mode = smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL);  in sm501_set_clock()
514 	unsigned long gate = smc501_readl(sm->regs + SM501_CURRENT_GATE);  in sm501_set_clock()
515 	unsigned long clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK);  in sm501_set_clock()
586 	mode = smc501_readl(sm->regs + SM501_POWER_MODE_CONTROL);  in sm501_set_clock()
587 	gate = smc501_readl(sm->regs + SM501_CURRENT_GATE);  in sm501_set_clock()
588 	clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK);  in sm501_set_clock()
893 	result = smc501_readl(smgpio->regbase + SM501_GPIO_DATA_LOW);  in sm501_gpio_get()
906 	if (smc501_readl(smchip->control) & bit) {  in sm501_gpio_ensure_gpio()
910 		ctrl = smc501_readl(smchip->control);  in sm501_gpio_ensure_gpio()
933 	val = smc501_readl(regs + SM501_GPIO_DATA_LOW) & ~bit;  in sm501_gpio_set()
958 	ddr = smc501_readl(regs + SM501_GPIO_DDR_LOW);  in sm501_gpio_input()
985 	val = smc501_readl(regs + SM501_GPIO_DATA_LOW);  in sm501_gpio_output()
992 	ddr = smc501_readl(regs + SM501_GPIO_DDR_LOW);  in sm501_gpio_output()
1208 			      reg, smc501_readl(sm->regs + reg));  in dbg_regs_show()
1232 	tmp = smc501_readl(sm->regs + reg);  in sm501_init_reg()
1276 	unsigned long pwrmode = smc501_readl(sm->regs + SM501_CURRENT_CLOCK);  in sm501_check_clocks()
1311 	devid = smc501_readl(sm->regs + SM501_DEVICEID);  in sm501_init_dev()
1321 	dramctrl = smc501_readl(sm->regs + SM501_DRAM_CONTROL);  in sm501_init_dev()
1466 	sm->pm_misc = smc501_readl(sm->regs + SM501_MISC_CONTROL);  in sm501_plat_suspend()
1490 	if (smc501_readl(sm->regs + SM501_MISC_CONTROL) != sm->pm_misc) {  in sm501_plat_resume()