33 		override = readl(mc->regs + client->regs.sid.override);  in tegra186_mc_program_sid()
34 		security = readl(mc->regs + client->regs.sid.security);  in tegra186_mc_program_sid()
39 		dev_dbg(mc->dev, "setting SID %u for %s\n", client->sid,  in tegra186_mc_program_sid()
41 		writel(client->sid, mc->regs + client->regs.sid.override);  in tegra186_mc_program_sid()
43 		override = readl(mc->regs + client->regs.sid.override);  in tegra186_mc_program_sid()
44 		security = readl(mc->regs + client->regs.sid.security);  in tegra186_mc_program_sid()
108 					    unsigned int sid)  in tegra186_mc_client_sid_override()  argument
112 	value = readl(mc->regs + client->regs.sid.security);  in tegra186_mc_client_sid_override()
131 		writel(value, mc->regs + client->regs.sid.security);  in tegra186_mc_client_sid_override()
134 	value = readl(mc->regs + client->regs.sid.override);  in tegra186_mc_client_sid_override()
137 	if (old != sid) {  in tegra186_mc_client_sid_override()
138 		dev_dbg(mc->dev, "overriding SID %x for %s with %x\n", old,  in tegra186_mc_client_sid_override()
139 			client->name, sid);  in tegra186_mc_client_sid_override()
140 		writel(sid, mc->regs + client->regs.sid.override);  in tegra186_mc_client_sid_override()
159 					u32 sid = fwspec->ids[0] & MC_SID_STREAMID_OVERRIDE_MASK;  in tegra186_mc_probe_device()  local
161 					tegra186_mc_client_sid_override(mc, client, sid);  in tegra186_mc_probe_device()
186 		.sid = TEGRA186_SID_PASSTHROUGH,
188 			.sid = {
196 		.sid = TEGRA186_SID_AFI,
198 			.sid = {
206 		.sid = TEGRA186_SID_HDA,
208 			.sid = {
216 		.sid = TEGRA186_SID_HOST1X,
218 			.sid = {
226 		.sid = TEGRA186_SID_NVENC,
228 			.sid = {
236 		.sid = TEGRA186_SID_SATA,
238 			.sid = {
246 		.sid = TEGRA186_SID_PASSTHROUGH,
248 			.sid = {
256 		.sid = TEGRA186_SID_NVENC,
258 			.sid = {
266 		.sid = TEGRA186_SID_AFI,
268 			.sid = {
276 		.sid = TEGRA186_SID_HDA,
278 			.sid = {
286 		.sid = TEGRA186_SID_PASSTHROUGH,
288 			.sid = {
296 		.sid = TEGRA186_SID_SATA,
298 			.sid = {
306 		.sid = TEGRA186_SID_ISP,
308 			.sid = {
316 		.sid = TEGRA186_SID_ISP,
318 			.sid = {
326 		.sid = TEGRA186_SID_ISP,
328 			.sid = {
336 		.sid = TEGRA186_SID_XUSB_HOST,
338 			.sid = {
346 		.sid = TEGRA186_SID_XUSB_HOST,
348 			.sid = {
356 		.sid = TEGRA186_SID_XUSB_DEV,
358 			.sid = {
366 		.sid = TEGRA186_SID_XUSB_DEV,
368 			.sid = {
376 		.sid = TEGRA186_SID_TSEC,
378 			.sid = {
386 		.sid = TEGRA186_SID_TSEC,
388 			.sid = {
396 		.sid = TEGRA186_SID_GPU,
398 			.sid = {
406 		.sid = TEGRA186_SID_GPU,
408 			.sid = {
416 		.sid = TEGRA186_SID_SDMMC1,
418 			.sid = {
426 		.sid = TEGRA186_SID_SDMMC2,
428 			.sid = {
436 		.sid = TEGRA186_SID_SDMMC3,
438 			.sid = {
446 		.sid = TEGRA186_SID_SDMMC4,
448 			.sid = {
456 		.sid = TEGRA186_SID_SDMMC1,
458 			.sid = {
466 		.sid = TEGRA186_SID_SDMMC2,
468 			.sid = {
476 		.sid = TEGRA186_SID_SDMMC3,
478 			.sid = {
486 		.sid = TEGRA186_SID_SDMMC4,
488 			.sid = {
496 		.sid = TEGRA186_SID_VIC,
498 			.sid = {
506 		.sid = TEGRA186_SID_VIC,
508 			.sid = {
516 		.sid = TEGRA186_SID_VI,
518 			.sid = {
526 		.sid = TEGRA186_SID_NVDEC,
528 			.sid = {
536 		.sid = TEGRA186_SID_NVDEC,
538 			.sid = {
546 		.sid = TEGRA186_SID_APE,
548 			.sid = {
556 		.sid = TEGRA186_SID_APE,
558 			.sid = {
566 		.sid = TEGRA186_SID_NVJPG,
568 			.sid = {
576 		.sid = TEGRA186_SID_NVJPG,
578 			.sid = {
586 		.sid = TEGRA186_SID_SE,
588 			.sid = {
596 		.sid = TEGRA186_SID_SE,
598 			.sid = {
606 		.sid = TEGRA186_SID_ETR,
608 			.sid = {
616 		.sid = TEGRA186_SID_ETR,
618 			.sid = {
626 		.sid = TEGRA186_SID_TSECB,
628 			.sid = {
636 		.sid = TEGRA186_SID_TSECB,
638 			.sid = {
646 		.sid = TEGRA186_SID_GPU,
648 			.sid = {
656 		.sid = TEGRA186_SID_GPU,
658 			.sid = {
666 		.sid = TEGRA186_SID_GPCDMA_0,
668 			.sid = {
676 		.sid = TEGRA186_SID_GPCDMA_0,
678 			.sid = {
686 		.sid = TEGRA186_SID_EQOS,
688 			.sid = {
696 		.sid = TEGRA186_SID_EQOS,
698 			.sid = {
706 		.sid = TEGRA186_SID_UFSHC,
708 			.sid = {
716 		.sid = TEGRA186_SID_UFSHC,
718 			.sid = {
726 		.sid = TEGRA186_SID_NVDISPLAY,
728 			.sid = {
736 		.sid = TEGRA186_SID_BPMP,
738 			.sid = {
746 		.sid = TEGRA186_SID_BPMP,
748 			.sid = {
756 		.sid = TEGRA186_SID_BPMP,
758 			.sid = {
766 		.sid = TEGRA186_SID_BPMP,
768 			.sid = {
776 		.sid = TEGRA186_SID_AON,
778 			.sid = {
786 		.sid = TEGRA186_SID_AON,
788 			.sid = {
796 		.sid = TEGRA186_SID_AON,
798 			.sid = {
806 		.sid = TEGRA186_SID_AON,
808 			.sid = {
816 		.sid = TEGRA186_SID_SCE,
818 			.sid = {
826 		.sid = TEGRA186_SID_SCE,
828 			.sid = {
836 		.sid = TEGRA186_SID_SCE,
838 			.sid = {
846 		.sid = TEGRA186_SID_SCE,
848 			.sid = {
856 		.sid = TEGRA186_SID_APE,
858 			.sid = {
866 		.sid = TEGRA186_SID_APE,
868 			.sid = {
876 		.sid = TEGRA186_SID_NVDISPLAY,
878 			.sid = {
886 		.sid = TEGRA186_SID_VIC,
888 			.sid = {
896 		.sid = TEGRA186_SID_NVDEC,
898 			.sid = {