Lines Matching +full:cs +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0
31 #define FMC2_BCR_MTYP GENMASK(3, 2)
146 * struct stm32_fmc2_prop - STM32 FMC2 EBI property
170 const struct stm32_fmc2_prop *prop, int cs);
171 u32 (*calculate)(struct stm32_fmc2_ebi *ebi, int cs, u32 setup);
174 int cs, u32 setup);
179 int cs) in stm32_fmc2_ebi_check_mux() argument
183 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_mux()
188 return -EINVAL; in stm32_fmc2_ebi_check_mux()
193 int cs) in stm32_fmc2_ebi_check_waitcfg() argument
197 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_waitcfg()
202 return -EINVAL; in stm32_fmc2_ebi_check_waitcfg()
207 int cs) in stm32_fmc2_ebi_check_sync_trans() argument
211 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_sync_trans()
216 return -EINVAL; in stm32_fmc2_ebi_check_sync_trans()
221 int cs) in stm32_fmc2_ebi_check_async_trans() argument
225 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_async_trans()
230 return -EINVAL; in stm32_fmc2_ebi_check_async_trans()
235 int cs) in stm32_fmc2_ebi_check_cpsize() argument
239 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_cpsize()
244 return -EINVAL; in stm32_fmc2_ebi_check_cpsize()
249 int cs) in stm32_fmc2_ebi_check_address_hold() argument
253 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_address_hold()
254 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_check_address_hold()
255 regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr); in stm32_fmc2_ebi_check_address_hold()
257 regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr); in stm32_fmc2_ebi_check_address_hold()
263 return -EINVAL; in stm32_fmc2_ebi_check_address_hold()
268 int cs) in stm32_fmc2_ebi_check_clk_period() argument
272 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_clk_period()
273 if (cs) in stm32_fmc2_ebi_check_clk_period()
274 regmap_read(ebi->regmap, FMC2_BCR1, &bcr1); in stm32_fmc2_ebi_check_clk_period()
278 if (bcr & FMC2_BCR_BURSTEN && (!cs || !(bcr1 & FMC2_BCR1_CCLKEN))) in stm32_fmc2_ebi_check_clk_period()
281 return -EINVAL; in stm32_fmc2_ebi_check_clk_period()
286 int cs) in stm32_fmc2_ebi_check_cclk() argument
288 if (cs) in stm32_fmc2_ebi_check_cclk()
289 return -EINVAL; in stm32_fmc2_ebi_check_cclk()
291 return stm32_fmc2_ebi_check_sync_trans(ebi, prop, cs); in stm32_fmc2_ebi_check_cclk()
295 int cs, u32 setup) in stm32_fmc2_ebi_ns_to_clock_cycles() argument
297 unsigned long hclk = clk_get_rate(ebi->clk); in stm32_fmc2_ebi_ns_to_clock_cycles()
304 int cs, u32 setup) in stm32_fmc2_ebi_ns_to_clk_period() argument
306 u32 nb_clk_cycles = stm32_fmc2_ebi_ns_to_clock_cycles(ebi, cs, setup); in stm32_fmc2_ebi_ns_to_clk_period()
309 regmap_read(ebi->regmap, FMC2_BCR1, &bcr); in stm32_fmc2_ebi_ns_to_clk_period()
310 if (bcr & FMC2_BCR1_CCLKEN || !cs) in stm32_fmc2_ebi_ns_to_clk_period()
311 regmap_read(ebi->regmap, FMC2_BTR1, &btr); in stm32_fmc2_ebi_ns_to_clk_period()
313 regmap_read(ebi->regmap, FMC2_BTR(cs), &btr); in stm32_fmc2_ebi_ns_to_clk_period()
320 static int stm32_fmc2_ebi_get_reg(int reg_type, int cs, u32 *reg) in stm32_fmc2_ebi_get_reg() argument
324 *reg = FMC2_BCR(cs); in stm32_fmc2_ebi_get_reg()
327 *reg = FMC2_BTR(cs); in stm32_fmc2_ebi_get_reg()
330 *reg = FMC2_BWTR(cs); in stm32_fmc2_ebi_get_reg()
336 return -EINVAL; in stm32_fmc2_ebi_get_reg()
344 int cs, u32 setup) in stm32_fmc2_ebi_set_bit_field() argument
349 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_bit_field()
353 regmap_update_bits(ebi->regmap, reg, prop->reg_mask, in stm32_fmc2_ebi_set_bit_field()
354 setup ? prop->reg_mask : 0); in stm32_fmc2_ebi_set_bit_field()
361 int cs, u32 setup) in stm32_fmc2_ebi_set_trans_type() argument
410 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
418 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
428 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
429 * WREN = 1, EXTMOD = 1, CBURSTRW = 0, ACCMOD = 2 in stm32_fmc2_ebi_set_trans_type()
438 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 0, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
464 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
472 * MUXEN = 0, MTYP = 2, FACCEN = 1, BURSTEN = 1, WAITEN = 0, in stm32_fmc2_ebi_set_trans_type()
480 return -EINVAL; in stm32_fmc2_ebi_set_trans_type()
484 regmap_update_bits(ebi->regmap, FMC2_BWTR(cs), in stm32_fmc2_ebi_set_trans_type()
486 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), btr_mask, btr); in stm32_fmc2_ebi_set_trans_type()
487 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), bcr_mask, bcr); in stm32_fmc2_ebi_set_trans_type()
494 int cs, u32 setup) in stm32_fmc2_ebi_set_buswidth() argument
507 return -EINVAL; in stm32_fmc2_ebi_set_buswidth()
510 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MWID, val); in stm32_fmc2_ebi_set_buswidth()
517 int cs, u32 setup) in stm32_fmc2_ebi_set_cpsize() argument
539 return -EINVAL; in stm32_fmc2_ebi_set_cpsize()
542 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_CPSIZE, val); in stm32_fmc2_ebi_set_cpsize()
549 int cs, u32 setup) in stm32_fmc2_ebi_set_bl_setup() argument
555 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_NBLSET, val); in stm32_fmc2_ebi_set_bl_setup()
562 int cs, u32 setup) in stm32_fmc2_ebi_set_address_setup() argument
568 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_address_setup()
572 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_set_address_setup()
573 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_set_address_setup()
574 regmap_read(ebi->regmap, FMC2_BWTR(cs), &bxtr); in stm32_fmc2_ebi_set_address_setup()
576 regmap_read(ebi->regmap, FMC2_BTR(cs), &bxtr); in stm32_fmc2_ebi_set_address_setup()
583 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_ADDSET, val); in stm32_fmc2_ebi_set_address_setup()
590 int cs, u32 setup) in stm32_fmc2_ebi_set_address_hold() argument
595 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_address_hold()
601 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_ADDHLD, val); in stm32_fmc2_ebi_set_address_hold()
608 int cs, u32 setup) in stm32_fmc2_ebi_set_data_setup() argument
613 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_data_setup()
619 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_DATAST, val); in stm32_fmc2_ebi_set_data_setup()
626 int cs, u32 setup) in stm32_fmc2_ebi_set_bus_turnaround() argument
631 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_bus_turnaround()
635 val = setup ? min_t(u32, setup - 1, FMC2_BXTR_BUSTURN_MAX) : 0; in stm32_fmc2_ebi_set_bus_turnaround()
637 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_BUSTURN, val); in stm32_fmc2_ebi_set_bus_turnaround()
644 int cs, u32 setup) in stm32_fmc2_ebi_set_data_hold() argument
649 ret = stm32_fmc2_ebi_get_reg(prop->reg_type, cs, ®); in stm32_fmc2_ebi_set_data_hold()
653 if (prop->reg_type == FMC2_REG_BWTR) in stm32_fmc2_ebi_set_data_hold()
654 val = setup ? min_t(u32, setup - 1, FMC2_BXTR_DATAHLD_MAX) : 0; in stm32_fmc2_ebi_set_data_hold()
658 regmap_update_bits(ebi->regmap, reg, FMC2_BXTR_DATAHLD, val); in stm32_fmc2_ebi_set_data_hold()
665 int cs, u32 setup) in stm32_fmc2_ebi_set_clk_period() argument
669 val = setup ? clamp_val(setup - 1, 1, FMC2_BTR_CLKDIV_MAX) : 1; in stm32_fmc2_ebi_set_clk_period()
671 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_CLKDIV, val); in stm32_fmc2_ebi_set_clk_period()
678 int cs, u32 setup) in stm32_fmc2_ebi_set_data_latency() argument
682 val = setup > 1 ? min_t(u32, setup - 2, FMC2_BTR_DATLAT_MAX) : 0; in stm32_fmc2_ebi_set_data_latency()
684 regmap_update_bits(ebi->regmap, FMC2_BTR(cs), FMC2_BTR_DATLAT, val); in stm32_fmc2_ebi_set_data_latency()
691 int cs, u32 setup) in stm32_fmc2_ebi_set_max_low_pulse() argument
698 regmap_read(ebi->regmap, FMC2_PCSCNTR, &pcscntr); in stm32_fmc2_ebi_set_max_low_pulse()
701 regmap_update_bits(ebi->regmap, FMC2_PCSCNTR, in stm32_fmc2_ebi_set_max_low_pulse()
702 FMC2_PCSCNTR_CNTBEN(cs), in stm32_fmc2_ebi_set_max_low_pulse()
703 FMC2_PCSCNTR_CNTBEN(cs)); in stm32_fmc2_ebi_set_max_low_pulse()
705 new_val = min_t(u32, setup - 1, FMC2_PCSCNTR_CSCOUNT_MAX); in stm32_fmc2_ebi_set_max_low_pulse()
712 regmap_update_bits(ebi->regmap, FMC2_PCSCNTR, in stm32_fmc2_ebi_set_max_low_pulse()
719 /* st,fmc2-ebi-cs-trans-type must be the first property */
721 .name = "st,fmc2-ebi-cs-transaction-type",
726 .name = "st,fmc2-ebi-cs-cclk-enable",
734 .name = "st,fmc2-ebi-cs-mux-enable",
742 .name = "st,fmc2-ebi-cs-buswidth",
747 .name = "st,fmc2-ebi-cs-waitpol-high",
754 .name = "st,fmc2-ebi-cs-waitcfg-enable",
762 .name = "st,fmc2-ebi-cs-wait-enable",
770 .name = "st,fmc2-ebi-cs-asyncwait-enable",
778 .name = "st,fmc2-ebi-cs-cpsize",
783 .name = "st,fmc2-ebi-cs-byte-lane-setup-ns",
788 .name = "st,fmc2-ebi-cs-address-setup-ns",
796 .name = "st,fmc2-ebi-cs-address-hold-ns",
804 .name = "st,fmc2-ebi-cs-data-setup-ns",
812 .name = "st,fmc2-ebi-cs-bus-turnaround-ns",
819 .name = "st,fmc2-ebi-cs-data-hold-ns",
826 .name = "st,fmc2-ebi-cs-clk-period-ns",
833 .name = "st,fmc2-ebi-cs-data-latency-ns",
839 .name = "st,fmc2-ebi-cs-write-address-setup-ns",
847 .name = "st,fmc2-ebi-cs-write-address-hold-ns",
855 .name = "st,fmc2-ebi-cs-write-data-setup-ns",
863 .name = "st,fmc2-ebi-cs-write-bus-turnaround-ns",
870 .name = "st,fmc2-ebi-cs-write-data-hold-ns",
877 .name = "st,fmc2-ebi-cs-max-low-pulse-ns",
886 int cs) in stm32_fmc2_ebi_parse_prop() argument
888 struct device *dev = ebi->dev; in stm32_fmc2_ebi_parse_prop()
891 if (!prop->set) { in stm32_fmc2_ebi_parse_prop()
892 dev_err(dev, "property %s is not well defined\n", prop->name); in stm32_fmc2_ebi_parse_prop()
893 return -EINVAL; in stm32_fmc2_ebi_parse_prop()
896 if (prop->check && prop->check(ebi, prop, cs)) in stm32_fmc2_ebi_parse_prop()
900 if (prop->bprop) { in stm32_fmc2_ebi_parse_prop()
903 bprop = of_property_read_bool(dev_node, prop->name); in stm32_fmc2_ebi_parse_prop()
904 if (prop->mprop && !bprop) { in stm32_fmc2_ebi_parse_prop()
906 prop->name); in stm32_fmc2_ebi_parse_prop()
907 return -EINVAL; in stm32_fmc2_ebi_parse_prop()
916 ret = of_property_read_u32(dev_node, prop->name, &val); in stm32_fmc2_ebi_parse_prop()
917 if (prop->mprop && ret) { in stm32_fmc2_ebi_parse_prop()
919 prop->name); in stm32_fmc2_ebi_parse_prop()
924 setup = prop->reset_val; in stm32_fmc2_ebi_parse_prop()
925 else if (prop->calculate) in stm32_fmc2_ebi_parse_prop()
926 setup = prop->calculate(ebi, cs, val); in stm32_fmc2_ebi_parse_prop()
931 return prop->set(ebi, prop, cs, setup); in stm32_fmc2_ebi_parse_prop()
934 static void stm32_fmc2_ebi_enable_bank(struct stm32_fmc2_ebi *ebi, int cs) in stm32_fmc2_ebi_enable_bank() argument
936 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), in stm32_fmc2_ebi_enable_bank()
940 static void stm32_fmc2_ebi_disable_bank(struct stm32_fmc2_ebi *ebi, int cs) in stm32_fmc2_ebi_disable_bank() argument
942 regmap_update_bits(ebi->regmap, FMC2_BCR(cs), FMC2_BCR_MBKEN, 0); in stm32_fmc2_ebi_disable_bank()
947 unsigned int cs; in stm32_fmc2_ebi_save_setup() local
949 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_save_setup()
950 regmap_read(ebi->regmap, FMC2_BCR(cs), &ebi->bcr[cs]); in stm32_fmc2_ebi_save_setup()
951 regmap_read(ebi->regmap, FMC2_BTR(cs), &ebi->btr[cs]); in stm32_fmc2_ebi_save_setup()
952 regmap_read(ebi->regmap, FMC2_BWTR(cs), &ebi->bwtr[cs]); in stm32_fmc2_ebi_save_setup()
955 regmap_read(ebi->regmap, FMC2_PCSCNTR, &ebi->pcscntr); in stm32_fmc2_ebi_save_setup()
960 unsigned int cs; in stm32_fmc2_ebi_set_setup() local
962 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_set_setup()
963 regmap_write(ebi->regmap, FMC2_BCR(cs), ebi->bcr[cs]); in stm32_fmc2_ebi_set_setup()
964 regmap_write(ebi->regmap, FMC2_BTR(cs), ebi->btr[cs]); in stm32_fmc2_ebi_set_setup()
965 regmap_write(ebi->regmap, FMC2_BWTR(cs), ebi->bwtr[cs]); in stm32_fmc2_ebi_set_setup()
968 regmap_write(ebi->regmap, FMC2_PCSCNTR, ebi->pcscntr); in stm32_fmc2_ebi_set_setup()
973 unsigned int cs; in stm32_fmc2_ebi_disable_banks() local
975 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_disable_banks()
976 if (!(ebi->bank_assigned & BIT(cs))) in stm32_fmc2_ebi_disable_banks()
979 stm32_fmc2_ebi_disable_bank(ebi, cs); in stm32_fmc2_ebi_disable_banks()
986 unsigned int cs; in stm32_fmc2_ebi_nwait_used_by_ctrls() local
989 for (cs = 0; cs < FMC2_MAX_EBI_CE; cs++) { in stm32_fmc2_ebi_nwait_used_by_ctrls()
990 if (!(ebi->bank_assigned & BIT(cs))) in stm32_fmc2_ebi_nwait_used_by_ctrls()
993 regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_nwait_used_by_ctrls()
995 ebi->bank_assigned & BIT(FMC2_NAND)) in stm32_fmc2_ebi_nwait_used_by_ctrls()
1004 regmap_update_bits(ebi->regmap, FMC2_BCR1, in stm32_fmc2_ebi_enable()
1010 regmap_update_bits(ebi->regmap, FMC2_BCR1, FMC2_BCR1_FMC2EN, 0); in stm32_fmc2_ebi_disable()
1015 u32 cs) in stm32_fmc2_ebi_setup_cs() argument
1020 stm32_fmc2_ebi_disable_bank(ebi, cs); in stm32_fmc2_ebi_setup_cs()
1025 ret = stm32_fmc2_ebi_parse_prop(ebi, dev_node, p, cs); in stm32_fmc2_ebi_setup_cs()
1027 dev_err(ebi->dev, "property %s could not be set: %d\n", in stm32_fmc2_ebi_setup_cs()
1028 p->name, ret); in stm32_fmc2_ebi_setup_cs()
1033 stm32_fmc2_ebi_enable_bank(ebi, cs); in stm32_fmc2_ebi_setup_cs()
1040 struct device *dev = ebi->dev; in stm32_fmc2_ebi_parse_dt()
1046 for_each_available_child_of_node(dev->of_node, child) { in stm32_fmc2_ebi_parse_dt()
1058 return -EINVAL; in stm32_fmc2_ebi_parse_dt()
1061 if (ebi->bank_assigned & BIT(bank)) { in stm32_fmc2_ebi_parse_dt()
1064 return -EINVAL; in stm32_fmc2_ebi_parse_dt()
1077 ebi->bank_assigned |= BIT(bank); in stm32_fmc2_ebi_parse_dt()
1083 return -ENODEV; in stm32_fmc2_ebi_parse_dt()
1088 return -EINVAL; in stm32_fmc2_ebi_parse_dt()
1093 return of_platform_populate(dev->of_node, NULL, NULL, dev); in stm32_fmc2_ebi_parse_dt()
1098 struct device *dev = &pdev->dev; in stm32_fmc2_ebi_probe()
1103 ebi = devm_kzalloc(&pdev->dev, sizeof(*ebi), GFP_KERNEL); in stm32_fmc2_ebi_probe()
1105 return -ENOMEM; in stm32_fmc2_ebi_probe()
1107 ebi->dev = dev; in stm32_fmc2_ebi_probe()
1109 ebi->regmap = device_node_to_regmap(dev->of_node); in stm32_fmc2_ebi_probe()
1110 if (IS_ERR(ebi->regmap)) in stm32_fmc2_ebi_probe()
1111 return PTR_ERR(ebi->regmap); in stm32_fmc2_ebi_probe()
1113 ebi->clk = devm_clk_get(dev, NULL); in stm32_fmc2_ebi_probe()
1114 if (IS_ERR(ebi->clk)) in stm32_fmc2_ebi_probe()
1115 return PTR_ERR(ebi->clk); in stm32_fmc2_ebi_probe()
1118 if (PTR_ERR(rstc) == -EPROBE_DEFER) in stm32_fmc2_ebi_probe()
1119 return -EPROBE_DEFER; in stm32_fmc2_ebi_probe()
1121 ret = clk_prepare_enable(ebi->clk); in stm32_fmc2_ebi_probe()
1142 clk_disable_unprepare(ebi->clk); in stm32_fmc2_ebi_probe()
1151 of_platform_depopulate(&pdev->dev); in stm32_fmc2_ebi_remove()
1154 clk_disable_unprepare(ebi->clk); in stm32_fmc2_ebi_remove()
1164 clk_disable_unprepare(ebi->clk); in stm32_fmc2_ebi_suspend()
1177 ret = clk_prepare_enable(ebi->clk); in stm32_fmc2_ebi_resume()
1191 {.compatible = "st,stm32mp1-fmc2-ebi"},