Lines Matching refs:mxl111sf_write_reg
35 ret = mxl111sf_write_reg(state, 0x19, tmp); in mxl111sf_set_gpo_state()
46 ret = mxl111sf_write_reg(state, 0x30, tmp); in mxl111sf_set_gpo_state()
122 ret = mxl111sf_write_reg(state, MXL_GPIO_MUX_REG_0, tmp); in mxl111sf_config_gpio_pins()
135 ret = mxl111sf_write_reg(state, MXL_GPIO_MUX_REG_1, tmp); in mxl111sf_config_gpio_pins()
147 ret = mxl111sf_write_reg(state, MXL_GPIO_MUX_REG_2, tmp); in mxl111sf_config_gpio_pins()
518 ret = mxl111sf_write_reg(state, 0x17, r17); in mxl111sf_config_pin_mux_modes()
521 ret = mxl111sf_write_reg(state, 0x18, r18); in mxl111sf_config_pin_mux_modes()
524 ret = mxl111sf_write_reg(state, 0x12, r12); in mxl111sf_config_pin_mux_modes()
527 ret = mxl111sf_write_reg(state, 0x15, r15); in mxl111sf_config_pin_mux_modes()
530 ret = mxl111sf_write_reg(state, 0x82, r82); in mxl111sf_config_pin_mux_modes()
533 ret = mxl111sf_write_reg(state, 0x84, r84); in mxl111sf_config_pin_mux_modes()
536 ret = mxl111sf_write_reg(state, 0x89, r89); in mxl111sf_config_pin_mux_modes()
539 ret = mxl111sf_write_reg(state, 0x3D, r3D); in mxl111sf_config_pin_mux_modes()