14 #define MXL_GPIO_MUX_REG_0 0x84
15 #define MXL_GPIO_MUX_REG_1 0x89
16 #define MXL_GPIO_MUX_REG_2 0x82
18 #define MXL_GPIO_DIR_INPUT  0
29 	if ((pin > 0) && (pin < 8)) {  in mxl111sf_set_gpo_state()
30 		ret = mxl111sf_read_reg(state, 0x19, &tmp);  in mxl111sf_set_gpo_state()
35 		ret = mxl111sf_write_reg(state, 0x19, tmp);  in mxl111sf_set_gpo_state()
39 		if (pin == 0)  in mxl111sf_set_gpo_state()
41 		ret = mxl111sf_read_reg(state, 0x30, &tmp);  in mxl111sf_set_gpo_state()
46 		ret = mxl111sf_write_reg(state, 0x30, tmp);  in mxl111sf_set_gpo_state()
60 	mxl_debug("(0x%02x)", pin);  in mxl111sf_get_gpi_state()
62 	*val = 0;  in mxl111sf_get_gpi_state()
65 	case 0:  in mxl111sf_get_gpi_state()
69 		ret = mxl111sf_read_reg(state, 0x23, &tmp);  in mxl111sf_get_gpi_state()
72 		*val = (tmp >> (pin + 4)) & 0x01;  in mxl111sf_get_gpi_state()
78 		ret = mxl111sf_read_reg(state, 0x2f, &tmp);  in mxl111sf_get_gpi_state()
81 		*val = (tmp >> pin) & 0x01;  in mxl111sf_get_gpi_state()
86 		ret = mxl111sf_read_reg(state, 0x22, &tmp);  in mxl111sf_get_gpi_state()
89 		*val = (tmp >> (pin - 3)) & 0x01;  in mxl111sf_get_gpi_state()
113 	case 0:  in mxl111sf_config_gpio_pins()
181 #define PIN_MUX_MPEG_MODE_MASK          0x40   /* 0x17 <6> */
182 #define PIN_MUX_MPEG_PAR_EN_MASK        0x01   /* 0x18 <0> */
183 #define PIN_MUX_MPEG_SER_EN_MASK        0x02   /* 0x18 <1> */
184 #define PIN_MUX_MPG_IN_MUX_MASK         0x80   /* 0x3D <7> */
185 #define PIN_MUX_BT656_ENABLE_MASK       0x04   /* 0x12 <2> */
186 #define PIN_MUX_I2S_ENABLE_MASK         0x40   /* 0x15 <6> */
187 #define PIN_MUX_SPI_MODE_MASK           0x10   /* 0x3D <4> */
188 #define PIN_MUX_MCLK_EN_CTRL_MASK       0x10   /* 0x82 <4> */
189 #define PIN_MUX_MPSYN_EN_CTRL_MASK      0x20   /* 0x82 <5> */
190 #define PIN_MUX_MDVAL_EN_CTRL_MASK      0x40   /* 0x82 <6> */
191 #define PIN_MUX_MPERR_EN_CTRL_MASK      0x80   /* 0x82 <7> */
192 #define PIN_MUX_MDAT_EN_0_MASK          0x10   /* 0x84 <4> */
193 #define PIN_MUX_MDAT_EN_1_MASK          0x20   /* 0x84 <5> */
194 #define PIN_MUX_MDAT_EN_2_MASK          0x40   /* 0x84 <6> */
195 #define PIN_MUX_MDAT_EN_3_MASK          0x80   /* 0x84 <7> */
196 #define PIN_MUX_MDAT_EN_4_MASK          0x10   /* 0x89 <4> */
197 #define PIN_MUX_MDAT_EN_5_MASK          0x20   /* 0x89 <5> */
198 #define PIN_MUX_MDAT_EN_6_MASK          0x40   /* 0x89 <6> */
199 #define PIN_MUX_MDAT_EN_7_MASK          0x80   /* 0x89 <7> */
209 	ret = mxl111sf_read_reg(state, 0x17, &r17);  in mxl111sf_config_pin_mux_modes()
212 	ret = mxl111sf_read_reg(state, 0x18, &r18);  in mxl111sf_config_pin_mux_modes()
215 	ret = mxl111sf_read_reg(state, 0x12, &r12);  in mxl111sf_config_pin_mux_modes()
218 	ret = mxl111sf_read_reg(state, 0x15, &r15);  in mxl111sf_config_pin_mux_modes()
221 	ret = mxl111sf_read_reg(state, 0x82, &r82);  in mxl111sf_config_pin_mux_modes()
224 	ret = mxl111sf_read_reg(state, 0x84, &r84);  in mxl111sf_config_pin_mux_modes()
227 	ret = mxl111sf_read_reg(state, 0x89, &r89);  in mxl111sf_config_pin_mux_modes()
230 	ret = mxl111sf_read_reg(state, 0x3D, &r3D);  in mxl111sf_config_pin_mux_modes()
240 		/* mpeg_ser_en = 0 */  in mxl111sf_config_pin_mux_modes()
242 		/* mpg_in_mux = 0 */  in mxl111sf_config_pin_mux_modes()
244 		/* bt656_enable = 0 */  in mxl111sf_config_pin_mux_modes()
246 		/* i2s_enable = 0 */  in mxl111sf_config_pin_mux_modes()
248 		/* spi_mode = 0 */  in mxl111sf_config_pin_mux_modes()
258 		/* mdat_en_ctrl[3:0] = 0xF */  in mxl111sf_config_pin_mux_modes()
259 		r84 |= 0xF0;  in mxl111sf_config_pin_mux_modes()
260 		/* mdat_en_ctrl[7:4] = 0xF */  in mxl111sf_config_pin_mux_modes()
261 		r89 |= 0xF0;  in mxl111sf_config_pin_mux_modes()
266 		/* mpeg_par_en = 0 */  in mxl111sf_config_pin_mux_modes()
270 		/* mpg_in_mux = 0 */  in mxl111sf_config_pin_mux_modes()
272 		/* bt656_enable = 0 */  in mxl111sf_config_pin_mux_modes()
274 		/* i2s_enable = 0 */  in mxl111sf_config_pin_mux_modes()
276 		/* spi_mode = 0 */  in mxl111sf_config_pin_mux_modes()
286 		/* mdat_en_ctrl[3:0] = 0xF */  in mxl111sf_config_pin_mux_modes()
287 		r84 |= 0xF0;  in mxl111sf_config_pin_mux_modes()
288 		/* mdat_en_ctrl[7:4] = 0xF */  in mxl111sf_config_pin_mux_modes()
289 		r89 |= 0xF0;  in mxl111sf_config_pin_mux_modes()
292 		/* mpeg_mode = 0 */  in mxl111sf_config_pin_mux_modes()
294 		/* mpeg_par_en = 0 */  in mxl111sf_config_pin_mux_modes()
296 		/* mpeg_ser_en = 0 */  in mxl111sf_config_pin_mux_modes()
298 		/* mpg_in_mux = 0 */  in mxl111sf_config_pin_mux_modes()
300 		/* bt656_enable = 0 */  in mxl111sf_config_pin_mux_modes()
302 		/* i2s_enable = 0 */  in mxl111sf_config_pin_mux_modes()
304 		/* spi_mode = 0 */  in mxl111sf_config_pin_mux_modes()
306 		/* mclk_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
308 		/* mperr_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
310 		/* mdval_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
312 		/* mpsyn_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
314 		/* mdat_en_ctrl[3:0] = 0x0 */  in mxl111sf_config_pin_mux_modes()
315 		r84 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
316 		/* mdat_en_ctrl[7:4] = 0x0 */  in mxl111sf_config_pin_mux_modes()
317 		r89 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
320 		/* mpeg_mode = 0 */  in mxl111sf_config_pin_mux_modes()
322 		/* mpeg_par_en = 0 */  in mxl111sf_config_pin_mux_modes()
326 		/* mpg_in_mux = 0 */  in mxl111sf_config_pin_mux_modes()
328 		/* bt656_enable = 0 */  in mxl111sf_config_pin_mux_modes()
330 		/* i2s_enable = 0 */  in mxl111sf_config_pin_mux_modes()
332 		/* spi_mode = 0 */  in mxl111sf_config_pin_mux_modes()
334 		/* mclk_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
336 		/* mperr_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
338 		/* mdval_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
340 		/* mpsyn_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
342 		/* mdat_en_ctrl[3:0] = 0x0 */  in mxl111sf_config_pin_mux_modes()
343 		r84 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
344 		/* mdat_en_ctrl[7:4] = 0x0 */  in mxl111sf_config_pin_mux_modes()
345 		r89 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
348 		/* mpeg_mode = 0 */  in mxl111sf_config_pin_mux_modes()
350 		/* mpeg_par_en = 0 */  in mxl111sf_config_pin_mux_modes()
356 		/* bt656_enable = 0 */  in mxl111sf_config_pin_mux_modes()
358 		/* i2s_enable = 0 */  in mxl111sf_config_pin_mux_modes()
360 		/* spi_mode = 0 */  in mxl111sf_config_pin_mux_modes()
362 		/* mclk_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
364 		/* mperr_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
366 		/* mdval_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
368 		/* mpsyn_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
370 		/* mdat_en_ctrl[3:0] = 0x0 */  in mxl111sf_config_pin_mux_modes()
371 		r84 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
372 		/* mdat_en_ctrl[7:4] = 0x0 */  in mxl111sf_config_pin_mux_modes()
373 		r89 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
376 		/* mpeg_mode = 0 */  in mxl111sf_config_pin_mux_modes()
378 		/* mpeg_par_en = 0 */  in mxl111sf_config_pin_mux_modes()
384 		/* bt656_enable = 0 */  in mxl111sf_config_pin_mux_modes()
390 		/* mclk_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
392 		/* mperr_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
394 		/* mdval_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
396 		/* mpsyn_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
398 		/* mdat_en_ctrl[3:0] = 0x0 */  in mxl111sf_config_pin_mux_modes()
399 		r84 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
400 		/* mdat_en_ctrl[7:4] = 0x0 */  in mxl111sf_config_pin_mux_modes()
401 		r89 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
404 		/* mpeg_mode = 0 */  in mxl111sf_config_pin_mux_modes()
406 		/* mpeg_par_en = 0 */  in mxl111sf_config_pin_mux_modes()
410 		/* mpg_in_mux = 0 */  in mxl111sf_config_pin_mux_modes()
412 		/* bt656_enable = 0 */  in mxl111sf_config_pin_mux_modes()
418 		/* mclk_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
420 		/* mperr_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
422 		/* mdval_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
424 		/* mpsyn_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
426 		/* mdat_en_ctrl[3:0] = 0x0 */  in mxl111sf_config_pin_mux_modes()
427 		r84 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
428 		/* mdat_en_ctrl[7:4] = 0x0 */  in mxl111sf_config_pin_mux_modes()
429 		r89 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
432 		/* mpeg_mode = 0 */  in mxl111sf_config_pin_mux_modes()
436 		/* mpeg_ser_en = 0 */  in mxl111sf_config_pin_mux_modes()
438 		/* mpg_in_mux = 0 */  in mxl111sf_config_pin_mux_modes()
440 		/* bt656_enable = 0 */  in mxl111sf_config_pin_mux_modes()
442 		/* i2s_enable = 0 */  in mxl111sf_config_pin_mux_modes()
444 		/* spi_mode = 0 */  in mxl111sf_config_pin_mux_modes()
446 		/* mclk_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
448 		/* mperr_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
450 		/* mdval_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
452 		/* mpsyn_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
454 		/* mdat_en_ctrl[3:0] = 0x0 */  in mxl111sf_config_pin_mux_modes()
455 		r84 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
456 		/* mdat_en_ctrl[7:4] = 0x0 */  in mxl111sf_config_pin_mux_modes()
457 		r89 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
460 		/* mpeg_mode = 0 */  in mxl111sf_config_pin_mux_modes()
462 		/* mpeg_par_en = 0 */  in mxl111sf_config_pin_mux_modes()
464 		/* mpeg_ser_en = 0 */  in mxl111sf_config_pin_mux_modes()
466 		/* mpg_in_mux = 0 */  in mxl111sf_config_pin_mux_modes()
472 		/* spi_mode = 0 */  in mxl111sf_config_pin_mux_modes()
474 		/* mclk_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
476 		/* mperr_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
478 		/* mdval_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
480 		/* mpsyn_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
482 		/* mdat_en_ctrl[3:0] = 0x0 */  in mxl111sf_config_pin_mux_modes()
483 		r84 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
484 		/* mdat_en_ctrl[7:4] = 0x0 */  in mxl111sf_config_pin_mux_modes()
485 		r89 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
491 		/* mpeg_par_en = 0 */  in mxl111sf_config_pin_mux_modes()
493 		/* mpeg_ser_en = 0 */  in mxl111sf_config_pin_mux_modes()
495 		/* mpg_in_mux = 0 */  in mxl111sf_config_pin_mux_modes()
497 		/* bt656_enable = 0 */  in mxl111sf_config_pin_mux_modes()
499 		/* i2s_enable = 0 */  in mxl111sf_config_pin_mux_modes()
501 		/* spi_mode = 0 */  in mxl111sf_config_pin_mux_modes()
503 		/* mclk_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
505 		/* mperr_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
507 		/* mdval_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
509 		/* mpsyn_en_ctrl = 0 */  in mxl111sf_config_pin_mux_modes()
511 		/* mdat_en_ctrl[3:0] = 0x0 */  in mxl111sf_config_pin_mux_modes()
512 		r84 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
513 		/* mdat_en_ctrl[7:4] = 0x0 */  in mxl111sf_config_pin_mux_modes()
514 		r89 &= 0x0F;  in mxl111sf_config_pin_mux_modes()
518 	ret = mxl111sf_write_reg(state, 0x17, r17);  in mxl111sf_config_pin_mux_modes()
521 	ret = mxl111sf_write_reg(state, 0x18, r18);  in mxl111sf_config_pin_mux_modes()
524 	ret = mxl111sf_write_reg(state, 0x12, r12);  in mxl111sf_config_pin_mux_modes()
527 	ret = mxl111sf_write_reg(state, 0x15, r15);  in mxl111sf_config_pin_mux_modes()
530 	ret = mxl111sf_write_reg(state, 0x82, r82);  in mxl111sf_config_pin_mux_modes()
533 	ret = mxl111sf_write_reg(state, 0x84, r84);  in mxl111sf_config_pin_mux_modes()
536 	ret = mxl111sf_write_reg(state, 0x89, r89);  in mxl111sf_config_pin_mux_modes()
539 	ret = mxl111sf_write_reg(state, 0x3D, r3D);  in mxl111sf_config_pin_mux_modes()
555 	u8 gpioval = 0x07; /* write protect enabled, signal LEDs off */  in mxl111sf_hw_gpio_initialize()
561 		ret = mxl111sf_hw_set_gpio(state, i, (gpioval >> i) & 0x01);  in mxl111sf_hw_gpio_initialize()
569 #define PCA9534_I2C_ADDR (0x40 >> 1)
572 	u8 w[2] = { 1, 0 };  in pca9534_set_gpio()
573 	u8 r = 0;  in pca9534_set_gpio()
576 		  .flags = 0, .buf = w, .len = 1 },  in pca9534_set_gpio()
587 	msg[0].len = 2;  in pca9534_set_gpio()
588 #if 0  in pca9534_set_gpio()
589 	w[0] = 1;  in pca9534_set_gpio()
597 	w[1] |= ((val ? 1 : 0) << gpio);  in pca9534_set_gpio()
600 	i2c_transfer(&state->d->i2c_adap, &msg[0], 1);  in pca9534_set_gpio()
602 	return 0;  in pca9534_set_gpio()
607 	u8 w[2] = { 1, 0x07 }; /* write protect enabled, signal LEDs off */  in pca9534_init_port_expander()
611 		.flags = 0, .buf = w, .len = 2  in pca9534_init_port_expander()
619 	w[0] = 3;  in pca9534_init_port_expander()
620 	w[1] = 0;  in pca9534_init_port_expander()
624 	return 0;  in pca9534_init_port_expander()
647 	u8 r = 0;  in mxl111sf_probe_port_expander()
649 		{ .flags = 0,        .buf = &w, .len = 1 },  in mxl111sf_probe_port_expander()
655 	msg[0].addr = 0x70 >> 1;  in mxl111sf_probe_port_expander()
656 	msg[1].addr = 0x70 >> 1;  in mxl111sf_probe_port_expander()
661 		state->port_expander_addr = msg[0].addr;  in mxl111sf_probe_port_expander()
663 		mxl_debug("found port expander at 0x%02x",  in mxl111sf_probe_port_expander()
665 		return 0;  in mxl111sf_probe_port_expander()
668 	msg[0].addr = 0x40 >> 1;  in mxl111sf_probe_port_expander()
669 	msg[1].addr = 0x40 >> 1;  in mxl111sf_probe_port_expander()
673 		state->port_expander_addr = msg[0].addr;  in mxl111sf_probe_port_expander()
675 		mxl_debug("found port expander at 0x%02x",  in mxl111sf_probe_port_expander()
677 		return 0;  in mxl111sf_probe_port_expander()
679 	state->port_expander_addr = 0xff;  in mxl111sf_probe_port_expander()
682 	return 0;  in mxl111sf_probe_port_expander()
689 	if (0x00 == state->port_expander_addr)  in mxl111sf_init_port_expander()
709  *	3 - ATSC/MH#   | 1 = ATSC transport, 0 = MH transport      | default 0  in mxl111sf_gpio_mode_switch()
710  *	4 - ATSC_RST## | 1 = ATSC enable, 0 = ATSC Reset           | default 0  in mxl111sf_gpio_mode_switch()
711  *	5 - ATSC_EN    | 1 = ATSC power enable, 0 = ATSC power off | default 0  in mxl111sf_gpio_mode_switch()
712  *	6 - MH_RESET#  | 1 = MH enable, 0 = MH Reset               | default 0  in mxl111sf_gpio_mode_switch()
713  *	7 - MH_EN      | 1 = MH power enable, 0 = MH power off     | default 0  in mxl111sf_gpio_mode_switch()
719 		mxl111sf_set_gpio(state, 4, 0);  in mxl111sf_gpio_mode_switch()
720 		mxl111sf_set_gpio(state, 5, 0);  in mxl111sf_gpio_mode_switch()
727 		mxl111sf_set_gpio(state, 3, 0);  in mxl111sf_gpio_mode_switch()
730 		mxl111sf_set_gpio(state, 6, 0);  in mxl111sf_gpio_mode_switch()
731 		mxl111sf_set_gpio(state, 7, 0);  in mxl111sf_gpio_mode_switch()
743 	return 0;  in mxl111sf_gpio_mode_switch()