Lines Matching +full:apb +full:- +full:base
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2014 Alexsey Shestacov <wingrime@linux-sunxi.org>
8 * Based on sun5i-ir.c:
9 * Copyright (C) 2007-2012 Daniel Wang
18 #include <media/rc-core.h>
20 #define SUNXI_IR_DEV "sunxi-ir"
61 #define REG_RXSTA_GET_AC(val) (((val) >> 8) & (ir->fifo_size * 2 - 1))
78 * struct sunxi_ir_quirks - Differences between SoC variants.
90 void __iomem *base; member
107 status = readl(ir->base + SUNXI_IR_RXSTA_REG); in sunxi_ir_irq()
110 writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG); in sunxi_ir_irq()
116 rc = rc > ir->fifo_size ? ir->fifo_size : rc; in sunxi_ir_irq()
120 dt = readb(ir->base + SUNXI_IR_RXFIFO_REG); in sunxi_ir_irq()
123 ir->rc->rx_resolution; in sunxi_ir_irq()
124 ir_raw_event_store_with_filter(ir->rc, &rawir); in sunxi_ir_irq()
129 ir_raw_event_overflow(ir->rc); in sunxi_ir_irq()
131 ir_raw_event_set_idle(ir->rc, true); in sunxi_ir_irq()
132 ir_raw_event_handle(ir->rc); in sunxi_ir_irq()
134 ir_raw_event_handle(ir->rc); in sunxi_ir_irq()
151 return DIV_ROUND_UP((base_clk / (128 * 64)) * usec, USEC_PER_SEC) - 1; in sunxi_usec_to_ithr()
156 struct sunxi_ir *ir = rc_dev->priv; in sunxi_ir_set_timeout()
157 unsigned int base_clk = clk_get_rate(ir->clk); in sunxi_ir_set_timeout()
161 dev_dbg(rc_dev->dev.parent, "setting idle threshold to %u\n", ithr); in sunxi_ir_set_timeout()
165 ir->base + SUNXI_IR_CIR_REG); in sunxi_ir_set_timeout()
167 rc_dev->timeout = sunxi_ithr_to_usec(base_clk, ithr); in sunxi_ir_set_timeout()
178 ret = reset_control_deassert(ir->rst); in sunxi_ir_hw_init()
182 ret = clk_prepare_enable(ir->apb_clk); in sunxi_ir_hw_init()
184 dev_err(dev, "failed to enable apb clk\n"); in sunxi_ir_hw_init()
188 ret = clk_prepare_enable(ir->clk); in sunxi_ir_hw_init()
195 writel(REG_CTL_MD, ir->base + SUNXI_IR_CTL_REG); in sunxi_ir_hw_init()
198 sunxi_ir_set_timeout(ir->rc, ir->rc->timeout); in sunxi_ir_hw_init()
201 writel(REG_RXCTL_RPPI, ir->base + SUNXI_IR_RXCTL_REG); in sunxi_ir_hw_init()
204 writel(REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG); in sunxi_ir_hw_init()
211 REG_RXINT_RAI_EN | REG_RXINT_RAL(ir->fifo_size / 2 - 1), in sunxi_ir_hw_init()
212 ir->base + SUNXI_IR_RXINT_REG); in sunxi_ir_hw_init()
215 tmp = readl(ir->base + SUNXI_IR_CTL_REG); in sunxi_ir_hw_init()
216 writel(tmp | REG_CTL_GEN | REG_CTL_RXEN, ir->base + SUNXI_IR_CTL_REG); in sunxi_ir_hw_init()
221 clk_disable_unprepare(ir->apb_clk); in sunxi_ir_hw_init()
223 reset_control_assert(ir->rst); in sunxi_ir_hw_init()
232 clk_disable_unprepare(ir->clk); in sunxi_ir_hw_exit()
233 clk_disable_unprepare(ir->apb_clk); in sunxi_ir_hw_exit()
234 reset_control_assert(ir->rst); in sunxi_ir_hw_exit()
255 struct device *dev = &pdev->dev; in sunxi_ir_probe()
256 struct device_node *dn = dev->of_node; in sunxi_ir_probe()
263 return -ENOMEM; in sunxi_ir_probe()
265 quirks = of_device_get_match_data(&pdev->dev); in sunxi_ir_probe()
267 dev_err(&pdev->dev, "Failed to determine the quirks to use\n"); in sunxi_ir_probe()
268 return -ENODEV; in sunxi_ir_probe()
271 ir->fifo_size = quirks->fifo_size; in sunxi_ir_probe()
274 ir->apb_clk = devm_clk_get(dev, "apb"); in sunxi_ir_probe()
275 if (IS_ERR(ir->apb_clk)) { in sunxi_ir_probe()
276 dev_err(dev, "failed to get a apb clock.\n"); in sunxi_ir_probe()
277 return PTR_ERR(ir->apb_clk); in sunxi_ir_probe()
279 ir->clk = devm_clk_get(dev, "ir"); in sunxi_ir_probe()
280 if (IS_ERR(ir->clk)) { in sunxi_ir_probe()
282 return PTR_ERR(ir->clk); in sunxi_ir_probe()
285 /* Base clock frequency (optional) */ in sunxi_ir_probe()
286 of_property_read_u32(dn, "clock-frequency", &b_clk_freq); in sunxi_ir_probe()
289 if (quirks->has_reset) { in sunxi_ir_probe()
290 ir->rst = devm_reset_control_get_exclusive(dev, NULL); in sunxi_ir_probe()
291 if (IS_ERR(ir->rst)) in sunxi_ir_probe()
292 return PTR_ERR(ir->rst); in sunxi_ir_probe()
295 ret = clk_set_rate(ir->clk, b_clk_freq); in sunxi_ir_probe()
297 dev_err(dev, "set ir base clock failed!\n"); in sunxi_ir_probe()
300 dev_dbg(dev, "set base clock frequency to %d Hz.\n", b_clk_freq); in sunxi_ir_probe()
303 ir->base = devm_platform_ioremap_resource(pdev, 0); in sunxi_ir_probe()
304 if (IS_ERR(ir->base)) { in sunxi_ir_probe()
305 return PTR_ERR(ir->base); in sunxi_ir_probe()
308 ir->rc = rc_allocate_device(RC_DRIVER_IR_RAW); in sunxi_ir_probe()
309 if (!ir->rc) { in sunxi_ir_probe()
311 return -ENOMEM; in sunxi_ir_probe()
314 ir->rc->priv = ir; in sunxi_ir_probe()
315 ir->rc->device_name = SUNXI_IR_DEV; in sunxi_ir_probe()
316 ir->rc->input_phys = "sunxi-ir/input0"; in sunxi_ir_probe()
317 ir->rc->input_id.bustype = BUS_HOST; in sunxi_ir_probe()
318 ir->rc->input_id.vendor = 0x0001; in sunxi_ir_probe()
319 ir->rc->input_id.product = 0x0001; in sunxi_ir_probe()
320 ir->rc->input_id.version = 0x0100; in sunxi_ir_probe()
321 ir->map_name = of_get_property(dn, "linux,rc-map-name", NULL); in sunxi_ir_probe()
322 ir->rc->map_name = ir->map_name ?: RC_MAP_EMPTY; in sunxi_ir_probe()
323 ir->rc->dev.parent = dev; in sunxi_ir_probe()
324 ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; in sunxi_ir_probe()
326 ir->rc->rx_resolution = (USEC_PER_SEC / (b_clk_freq / 64)); in sunxi_ir_probe()
327 ir->rc->timeout = IR_DEFAULT_TIMEOUT; in sunxi_ir_probe()
328 ir->rc->min_timeout = sunxi_ithr_to_usec(b_clk_freq, 0); in sunxi_ir_probe()
329 ir->rc->max_timeout = sunxi_ithr_to_usec(b_clk_freq, 255); in sunxi_ir_probe()
330 ir->rc->s_timeout = sunxi_ir_set_timeout; in sunxi_ir_probe()
331 ir->rc->driver_name = SUNXI_IR_DEV; in sunxi_ir_probe()
333 ret = rc_register_device(ir->rc); in sunxi_ir_probe()
342 ir->irq = platform_get_irq(pdev, 0); in sunxi_ir_probe()
343 if (ir->irq < 0) { in sunxi_ir_probe()
344 ret = ir->irq; in sunxi_ir_probe()
348 ret = devm_request_irq(dev, ir->irq, sunxi_ir_irq, 0, SUNXI_IR_DEV, ir); in sunxi_ir_probe()
362 rc_free_device(ir->rc); in sunxi_ir_probe()
371 rc_unregister_device(ir->rc); in sunxi_ir_remove()
372 sunxi_ir_hw_exit(&pdev->dev); in sunxi_ir_remove()
379 sunxi_ir_hw_exit(&pdev->dev); in sunxi_ir_shutdown()
399 .compatible = "allwinner,sun4i-a10-ir",
403 .compatible = "allwinner,sun5i-a13-ir",
407 .compatible = "allwinner,sun6i-a31-ir",
428 MODULE_AUTHOR("Alexsey Shestacov <wingrime@linux-sunxi.org>");