253 static const struct vpif_registers vpifregs[VPIF_NUM_CHANNELS] = {  variable
296 	value = (config->eav2sav & vpifregs[config_channel_id].width_mask);  in vpif_set_mode_info()
298 	value |= (config->sav2eav & vpifregs[config_channel_id].width_mask);  in vpif_set_mode_info()
299 	regw(value, vpifregs[channel_id].h_cfg);  in vpif_set_mode_info()
301 	value = (config->l1 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
303 	value |= (config->l3 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
304 	regw(value, vpifregs[channel_id].v_cfg_00);  in vpif_set_mode_info()
306 	value = (config->l5 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
308 	value |= (config->l7 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
309 	regw(value, vpifregs[channel_id].v_cfg_01);  in vpif_set_mode_info()
311 	value = (config->l9 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
313 	value |= (config->l11 & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
314 	regw(value, vpifregs[channel_id].v_cfg_02);  in vpif_set_mode_info()
316 	value = (config->vsize & vpifregs[config_channel_id].len_mask);  in vpif_set_mode_info()
317 	regw(value, vpifregs[channel_id].v_cfg);  in vpif_set_mode_info()
337 		reg = vpifregs[i].ch_ctrl;  in config_vpif_params()
374 						vpifregs[i].line_offset);  in config_vpif_params()
409 	regw(value, vpifregs[channel_id].vanc0_strt);  in vpif_set_vbi_display_params()
413 	regw(value, vpifregs[channel_id].vanc1_strt);  in vpif_set_vbi_display_params()
417 	regw(value, vpifregs[channel_id].vanc0_size);  in vpif_set_vbi_display_params()
421 	regw(value, vpifregs[channel_id].vanc1_size);  in vpif_set_vbi_display_params()
428 	return (regr(vpifregs[channel_id].ch_ctrl) & VPIF_CH_FID_MASK)  in vpif_channel_getfid()