Lines Matching +full:16 +full:bit

18 #define VI6_CMD_UPDHDR			BIT(4)
19 #define VI6_CMD_STRCMD BIT(0)
28 #define VI6_SRESET_SRTS(n) BIT(n)
31 #define VI6_STATUS_FLD_STD(n) BIT((n) + 28)
32 #define VI6_STATUS_SYS_ACT(n) BIT((n) + 8)
35 #define VI6_WPF_IRQ_ENB_DFEE BIT(1)
36 #define VI6_WPF_IRQ_ENB_FREE BIT(0)
39 #define VI6_WPF_IRQ_STA_DFE BIT(1)
40 #define VI6_WPF_IRQ_STA_FRE BIT(0)
43 #define VI6_DISP_IRQ_ENB_DSTE BIT(8)
44 #define VI6_DISP_IRQ_ENB_MAEE BIT(5)
45 #define VI6_DISP_IRQ_ENB_LNEE(n) BIT(n)
48 #define VI6_DISP_IRQ_STA_DST BIT(8)
49 #define VI6_DISP_IRQ_STA_MAE BIT(5)
50 #define VI6_DISP_IRQ_STA_LNE(n) BIT(n)
60 #define VI6_DL_CTRL_AR_WAIT_MASK (0xffff << 16)
61 #define VI6_DL_CTRL_AR_WAIT_SHIFT 16
62 #define VI6_DL_CTRL_DC2 BIT(12)
63 #define VI6_DL_CTRL_DC1 BIT(8)
64 #define VI6_DL_CTRL_DC0 BIT(4)
65 #define VI6_DL_CTRL_CFM0 BIT(2)
66 #define VI6_DL_CTRL_NH0 BIT(1)
67 #define VI6_DL_CTRL_DLE BIT(0)
72 #define VI6_DL_SWAP_LWS BIT(2)
73 #define VI6_DL_SWAP_WDS BIT(1)
74 #define VI6_DL_SWAP_BTS BIT(0)
77 #define VI6_DL_EXT_CTRL_NWE BIT(16)
80 #define VI6_DL_EXT_CTRL_DLPRI BIT(5)
81 #define VI6_DL_EXT_CTRL_EXPRI BIT(4)
82 #define VI6_DL_EXT_CTRL_EXT BIT(0)
84 #define VI6_DL_EXT_AUTOFLD_INT BIT(0)
87 #define VI6_DL_BODY_SIZE_UPD BIT(24)
98 #define VI6_RPF_SRC_BSIZE_BHSIZE_MASK (0x1fff << 16)
99 #define VI6_RPF_SRC_BSIZE_BHSIZE_SHIFT 16
104 #define VI6_RPF_SRC_ESIZE_EHSIZE_MASK (0x1fff << 16)
105 #define VI6_RPF_SRC_ESIZE_EHSIZE_SHIFT 16
110 #define VI6_RPF_INFMT_VIR BIT(28)
111 #define VI6_RPF_INFMT_CIPM BIT(16)
112 #define VI6_RPF_INFMT_SPYCS BIT(15)
113 #define VI6_RPF_INFMT_SPUVS BIT(14)
123 #define VI6_RPF_INFMT_CSC BIT(8)
128 #define VI6_RPF_DSWAP_A_LLS BIT(11)
129 #define VI6_RPF_DSWAP_A_LWS BIT(10)
130 #define VI6_RPF_DSWAP_A_WDS BIT(9)
131 #define VI6_RPF_DSWAP_A_BTS BIT(8)
132 #define VI6_RPF_DSWAP_P_LLS BIT(3)
133 #define VI6_RPF_DSWAP_P_LWS BIT(2)
134 #define VI6_RPF_DSWAP_P_WDS BIT(1)
135 #define VI6_RPF_DSWAP_P_BTS BIT(0)
138 #define VI6_RPF_LOC_HCOORD_MASK (0x1fff << 16)
139 #define VI6_RPF_LOC_HCOORD_SHIFT 16
153 #define VI6_RPF_ALPH_SEL_BSEL BIT(23)
166 #define VI6_RPF_VRTCOL_SET_LAYR_MASK (0xff << 16)
167 #define VI6_RPF_VRTCOL_SET_LAYR_SHIFT 16
174 #define VI6_RPF_MSK_CTRL_MSK_EN BIT(24)
175 #define VI6_RPF_MSK_CTRL_MGR_MASK (0xff << 16)
176 #define VI6_RPF_MSK_CTRL_MGR_SHIFT 16
186 #define VI6_RPF_MSK_SET_MSR_MASK (0xff << 16)
187 #define VI6_RPF_MSK_SET_MSR_SHIFT 16
194 #define VI6_RPF_CKEY_CTRL_CV BIT(4)
195 #define VI6_RPF_CKEY_CTRL_SAPE1 BIT(1)
196 #define VI6_RPF_CKEY_CTRL_SAPE0 BIT(0)
202 #define VI6_RPF_CKEY_SET_R_MASK (0xff << 16)
203 #define VI6_RPF_CKEY_SET_R_SHIFT 16
210 #define VI6_RPF_SRCM_PSTRIDE_Y_SHIFT 16
253 #define VI6_WPF_SZCLIP_EN BIT(28)
254 #define VI6_WPF_SZCLIP_OFST_MASK (0xff << 16)
255 #define VI6_WPF_SZCLIP_OFST_SHIFT 16
262 #define VI6_WPF_OUTFMT_PXA BIT(23)
263 #define VI6_WPF_OUTFMT_ROT BIT(18)
264 #define VI6_WPF_OUTFMT_HFLP BIT(17)
265 #define VI6_WPF_OUTFMT_FLP BIT(16)
266 #define VI6_WPF_OUTFMT_SPYCS BIT(15)
267 #define VI6_WPF_OUTFMT_SPUVS BIT(14)
276 #define VI6_WPF_OUTFMT_CSC BIT(8)
281 #define VI6_WPF_DSWAP_P_LLS BIT(3)
282 #define VI6_WPF_DSWAP_P_LWS BIT(2)
283 #define VI6_WPF_DSWAP_P_WDS BIT(1)
284 #define VI6_WPF_DSWAP_P_BTS BIT(0)
287 #define VI6_WPF_RNDCTRL_CBRM BIT(28)
292 #define VI6_WPF_RNDCTRL_ATHRESH_MASK (0xff << 16)
293 #define VI6_WPF_RNDCTRL_ATHRESH_SHIFT 16
300 #define VI6_WPF_ROT_CTRL_LN16 BIT(17)
311 #define VI6_WPF_WRBCK_CTRL_WBMD BIT(0)
320 #define VI6_UIF_DISCOM_DOCMCR_CMPRU BIT(16)
321 #define VI6_UIF_DISCOM_DOCMCR_CMPR BIT(0)
324 #define VI6_UIF_DISCOM_DOCMSTR_CMPPRE BIT(1)
325 #define VI6_UIF_DISCOM_DOCMSTR_CMPST BIT(0)
328 #define VI6_UIF_DISCOM_DOCMCLSTR_CMPCLPRE BIT(1)
329 #define VI6_UIF_DISCOM_DOCMCLSTR_CMPCLST BIT(0)
332 #define VI6_UIF_DISCOM_DOCMIENR_CMPPREIEN BIT(1)
333 #define VI6_UIF_DISCOM_DOCMIENR_CMPIEN BIT(0)
336 #define VI6_UIF_DISCOM_DOCMMDR_INTHRH(n) ((n) << 16)
341 #define VI6_UIF_DISCOM_DOCMPMR_CMPDAUF BIT(7)
368 #define VI6_DPR_ROUTE_BRSSEL BIT(28)
369 #define VI6_DPR_ROUTE_FXA_MASK (0xff << 16)
370 #define VI6_DPR_ROUTE_FXA_SHIFT 16
387 #define VI6_DPR_NODE_SRU 16
405 #define VI6_SRU_CTRL0_PARAM0_MASK (0x1ff << 16)
406 #define VI6_SRU_CTRL0_PARAM0_SHIFT 16
410 #define VI6_SRU_CTRL0_PARAM2 BIT(3)
411 #define VI6_SRU_CTRL0_PARAM3 BIT(2)
412 #define VI6_SRU_CTRL0_PARAM4 BIT(1)
413 #define VI6_SRU_CTRL0_EN BIT(0)
419 #define VI6_SRU_CTRL2_PARAM6_SHIFT 16
430 #define VI6_UDS_CTRL_AMD BIT(30)
431 #define VI6_UDS_CTRL_FMD BIT(29)
432 #define VI6_UDS_CTRL_BLADV BIT(28)
433 #define VI6_UDS_CTRL_AON BIT(25)
434 #define VI6_UDS_CTRL_ATHON BIT(24)
435 #define VI6_UDS_CTRL_BC BIT(20)
436 #define VI6_UDS_CTRL_NE_A BIT(19)
437 #define VI6_UDS_CTRL_NE_RCR BIT(18)
438 #define VI6_UDS_CTRL_NE_GY BIT(17)
439 #define VI6_UDS_CTRL_NE_BCB BIT(16)
440 #define VI6_UDS_CTRL_AMDSLH BIT(2)
441 #define VI6_UDS_CTRL_TDIPC BIT(1)
446 #define VI6_UDS_SCALE_HFRAC_MASK (0xfff << 16)
447 #define VI6_UDS_SCALE_HFRAC_SHIFT 16
460 #define VI6_UDS_ALPVAL_VAL2_MASK (0xff << 16)
461 #define VI6_UDS_ALPVAL_VAL2_SHIFT 16
468 #define VI6_UDS_PASS_BWIDTH_H_MASK (0x7f << 16)
469 #define VI6_UDS_PASS_BWIDTH_H_SHIFT 16
474 #define VI6_UDS_HPHASE_HSTP_MASK (0xfff << 16)
475 #define VI6_UDS_HPHASE_HSTP_SHIFT 16
480 #define VI6_UDS_IPC_FIELD BIT(27)
485 #define VI6_UDS_HSZCLIP_HCEN BIT(28)
486 #define VI6_UDS_HSZCLIP_HCL_OFST_MASK (0xff << 16)
487 #define VI6_UDS_HSZCLIP_HCL_OFST_SHIFT 16
492 #define VI6_UDS_CLIP_SIZE_HSIZE_MASK (0x1fff << 16)
493 #define VI6_UDS_CLIP_SIZE_HSIZE_SHIFT 16
498 #define VI6_UDS_FILL_COLOR_RFILC_MASK (0xff << 16)
499 #define VI6_UDS_FILL_COLOR_RFILC_SHIFT 16
510 #define VI6_LUT_CTRL_EN BIT(0)
517 #define VI6_CLU_CTRL_AAI BIT(28)
518 #define VI6_CLU_CTRL_MVS BIT(24)
524 #define VI6_CLU_CTRL_M2D BIT(1)
525 #define VI6_CLU_CTRL_EN BIT(0)
532 #define VI6_HST_CTRL_EN BIT(0)
539 #define VI6_HSI_CTRL_EN BIT(0)
566 #define VI6_BRU_INCTRL_NRM BIT(28)
567 #define VI6_BRU_INCTRL_DnON (1 << (16 + (n)))
578 #define VI6_BRU_VIRRPF_SIZE_HSIZE_MASK (0x1fff << 16)
579 #define VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT 16
584 #define VI6_BRU_VIRRPF_LOC_HCOORD_MASK (0x1fff << 16)
585 #define VI6_BRU_VIRRPF_LOC_HCOORD_SHIFT 16
592 #define VI6_BRU_VIRRPF_COL_RCR_MASK (0xff << 16)
593 #define VI6_BRU_VIRRPF_COL_RCR_SHIFT 16
600 #define VI6_BRU_CTRL_RBC BIT(31)
604 #define VI6_BRU_CTRL_SRCSEL_BRUIN(n) (((n) <= 3 ? (n) : (n)+1) << 16)
605 #define VI6_BRU_CTRL_SRCSEL_VRPF (4 << 16)
606 #define VI6_BRU_CTRL_SRCSEL_MASK (7 << 16)
613 #define VI6_BRU_BLD_CBES BIT(31)
627 #define VI6_BRU_BLD_ABES BIT(23)
634 #define VI6_BRU_BLD_ACMDY_DST_A (0 << 16)
635 #define VI6_BRU_BLD_ACMDY_255_DST_A (1 << 16)
636 #define VI6_BRU_BLD_ACMDY_SRC_A (2 << 16)
637 #define VI6_BRU_BLD_ACMDY_255_SRC_A (3 << 16)
638 #define VI6_BRU_BLD_ACMDY_COEFY (4 << 16)
639 #define VI6_BRU_BLD_ACMDY_MASK (7 << 16)
659 #define VI6_HGO_OFFSET_HOFFSET_SHIFT 16
662 #define VI6_HGO_SIZE_HSIZE_SHIFT 16
665 #define VI6_HGO_MODE_STEP BIT(10)
666 #define VI6_HGO_MODE_MAXRGB BIT(7)
667 #define VI6_HGO_MODE_OFSB_R BIT(6)
668 #define VI6_HGO_MODE_OFSB_G BIT(5)
669 #define VI6_HGO_MODE_OFSB_B BIT(4)
690 #define VI6_HGO_REGRST_RCLEA BIT(0)
697 #define VI6_HGT_OFFSET_HOFFSET_SHIFT 16
700 #define VI6_HGT_SIZE_HSIZE_SHIFT 16
706 #define VI6_HGT_HUE_AREA_LOWER_SHIFT 16
716 #define VI6_HGT_REGRST_RCLEA BIT(0)
725 #define VI6_LIF_CTRL_OBTH_MASK (0x7ff << 16)
726 #define VI6_LIF_CTRL_OBTH_SHIFT 16
727 #define VI6_LIF_CTRL_CFMT BIT(4)
728 #define VI6_LIF_CTRL_REQSEL BIT(1)
729 #define VI6_LIF_CTRL_LIF_EN BIT(0)
732 #define VI6_LIF_CSBTH_HBTH_MASK (0x7ff << 16)
733 #define VI6_LIF_CSBTH_HBTH_SHIFT 16
738 #define VI6_LIF_LBA_LBA0 BIT(31)
739 #define VI6_LIF_LBA_LBA1_MASK (0xfff << 16)
740 #define VI6_LIF_LBA_LBA1_SHIFT 16
788 #define VI6_IP_VERSION_VSP_SW (0xfffe << 16) /* SW VSP version */