Lines Matching refs:zr36050_write

57 static void zr36050_write(struct zr36050 *ptr, u16 reg, u8 value)  in zr36050_write()  function
122 zr36050_write(ptr, ZR050_SOF_IDX, 0x00); in zr36050_basic_test()
123 zr36050_write(ptr, ZR050_SOF_IDX + 1, 0x00); in zr36050_basic_test()
131 zr36050_write(ptr, ZR050_SOF_IDX, 0xff); in zr36050_basic_test()
132 zr36050_write(ptr, ZR050_SOF_IDX + 1, 0xc0); in zr36050_basic_test()
162 zr36050_write(ptr, startreg++, data[i++]); in zr36050_pushit()
378 zr36050_write(ptr, ZR050_HARDWARE, ZR050_HW_MSTR); in zr36050_init()
381 zr36050_write(ptr, ZR050_MODE, in zr36050_init()
383 zr36050_write(ptr, ZR050_OPTIONS, 0); in zr36050_init()
386 zr36050_write(ptr, ZR050_INT_REQ_0, 0); in zr36050_init()
387 zr36050_write(ptr, ZR050_INT_REQ_1, 3); // low 2 bits always 1 in zr36050_init()
391 zr36050_write(ptr, ZR050_SF_HI, ptr->scalefact >> 8); in zr36050_init()
392 zr36050_write(ptr, ZR050_SF_LO, ptr->scalefact & 0xff); in zr36050_init()
394 zr36050_write(ptr, ZR050_AF_HI, 0xff); in zr36050_init()
395 zr36050_write(ptr, ZR050_AF_M, 0xff); in zr36050_init()
396 zr36050_write(ptr, ZR050_AF_LO, 0xff); in zr36050_init()
412 zr36050_write(ptr, ZR050_APP_IDX, 0xff); in zr36050_init()
413 zr36050_write(ptr, ZR050_APP_IDX + 1, 0xe0 + ptr->app.appn); in zr36050_init()
414 zr36050_write(ptr, ZR050_APP_IDX + 2, 0x00); in zr36050_init()
415 zr36050_write(ptr, ZR050_APP_IDX + 3, ptr->app.len + 2); in zr36050_init()
418 zr36050_write(ptr, ZR050_COM_IDX, 0xff); in zr36050_init()
419 zr36050_write(ptr, ZR050_COM_IDX + 1, 0xfe); in zr36050_init()
420 zr36050_write(ptr, ZR050_COM_IDX + 2, 0x00); in zr36050_init()
421 zr36050_write(ptr, ZR050_COM_IDX + 3, ptr->com.len + 2); in zr36050_init()
426 zr36050_write(ptr, ZR050_MARKERS_EN, ZR050_ME_DHTI); in zr36050_init()
428 zr36050_write(ptr, ZR050_GO, 1); // launch codec in zr36050_init()
448 zr36050_write(ptr, ZR050_TCV_NET_HI, tmp >> 8); in zr36050_init()
449 zr36050_write(ptr, ZR050_TCV_NET_MH, tmp & 0xff); in zr36050_init()
451 zr36050_write(ptr, ZR050_TCV_NET_ML, tmp >> 8); in zr36050_init()
452 zr36050_write(ptr, ZR050_TCV_NET_LO, tmp & 0xff); in zr36050_init()
460 zr36050_write(ptr, ZR050_TCV_DATA_HI, tmp >> 8); in zr36050_init()
461 zr36050_write(ptr, ZR050_TCV_DATA_MH, tmp & 0xff); in zr36050_init()
463 zr36050_write(ptr, ZR050_TCV_DATA_ML, tmp >> 8); in zr36050_init()
464 zr36050_write(ptr, ZR050_TCV_DATA_LO, tmp & 0xff); in zr36050_init()
467 zr36050_write(ptr, ZR050_MODE, in zr36050_init()
472 zr36050_write(ptr, ZR050_MARKERS_EN, in zr36050_init()
480 zr36050_write(ptr, ZR050_HARDWARE, in zr36050_init()
484 zr36050_write(ptr, ZR050_MODE, ZR050_MO_TLM); in zr36050_init()
487 zr36050_write(ptr, ZR050_INT_REQ_0, 0); in zr36050_init()
488 zr36050_write(ptr, ZR050_INT_REQ_1, 3); // low 2 bits always 1 in zr36050_init()
495 zr36050_write(ptr, ZR050_MARKERS_EN, ZR050_ME_DHTI); in zr36050_init()
497 zr36050_write(ptr, ZR050_GO, 1); // launch codec in zr36050_init()
508 zr36050_write(ptr, ZR050_MODE, 0); in zr36050_init()
509 zr36050_write(ptr, ZR050_MARKERS_EN, 0); in zr36050_init()
580 zr36050_write(ptr, ZR050_MBCV, ptr->max_block_vol); in zr36050_set_video()