Lines Matching +full:0 +full:xf100
57 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
69 MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBi…
99 "attach dummy tuner to port 0 on Octopus V3 or Octopus Mini cards");
132 for (i = 0; i < dma->num; i++) { in ddb_set_dma_table()
134 ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8); in ddb_set_dma_table()
137 dma->bufval = ((dma->div & 0x0f) << 16) | in ddb_set_dma_table()
138 ((dma->num & 0x1f) << 11) | in ddb_set_dma_table()
139 ((dma->size >> 7) & 0x7ff); in ddb_set_dma_table()
146 for (i = 0; i < DDB_MAX_PORT; i++) { in ddb_set_dma_tables()
147 if (dev->port[i].input[0]) in ddb_set_dma_tables()
148 ddb_set_dma_table(dev->port[i].input[0]); in ddb_set_dma_tables()
169 for (i = 0; i < ddma->num; i++) { in ddb_redirect_dma()
171 ddbwritel(dev, mem & 0xffffffff, base + i * 8); in ddb_redirect_dma()
192 if (port->input[0]) { in ddb_unredirect()
193 iredi = port->input[0]->redi; in ddb_unredirect()
194 iredo = port->input[0]->redo; in ddb_unredirect()
198 if (iredo->port->input[0]) { in ddb_unredirect()
199 iredo->port->input[0]->redi = iredi; in ddb_unredirect()
203 port->input[0]->redo = NULL; in ddb_unredirect()
204 ddb_set_dma_table(port->input[0]); in ddb_unredirect()
207 port->input[0]->redi = NULL; in ddb_unredirect()
215 return 0; in ddb_unredirect()
220 struct ddb *idev = ddbs[(i >> 4) & 0x3f]; in ddb_redirect()
222 struct ddb *pdev = ddbs[(p >> 4) & 0x3f]; in ddb_redirect()
230 port = &pdev->port[p & 0x0f]; in ddb_redirect()
237 return 0; in ddb_redirect()
248 input2 = port->input[0]; in ddb_redirect()
262 return 0; in ddb_redirect()
275 for (i = 0; i < dma->num; i++) { in dma_free()
299 return 0; in dma_alloc()
300 for (i = 0; i < dma->num; i++) { in dma_alloc()
324 return 0; in dma_alloc()
332 for (i = 0; i < dev->port_num; i++) { in ddb_buffers_alloc()
336 if (port->input[0]->dma) in ddb_buffers_alloc()
337 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) in ddb_buffers_alloc()
338 < 0) in ddb_buffers_alloc()
341 if (dma_alloc(dev->pdev, port->input[1]->dma, 0) in ddb_buffers_alloc()
342 < 0) in ddb_buffers_alloc()
347 if (port->input[0]->dma) in ddb_buffers_alloc()
348 if (dma_alloc(dev->pdev, port->input[0]->dma, 0) in ddb_buffers_alloc()
349 < 0) in ddb_buffers_alloc()
353 < 0) in ddb_buffers_alloc()
361 return 0; in ddb_buffers_alloc()
369 for (i = 0; i < dev->port_num; i++) { in ddb_buffers_free()
372 if (port->input[0] && port->input[0]->dma) in ddb_buffers_free()
373 dma_free(dev->pdev, port->input[0]->dma, 0); in ddb_buffers_free()
375 dma_free(dev->pdev, port->input[1]->dma, 0); in ddb_buffers_free()
385 u32 gap = 4, nco = 0; in calc_con()
387 *con = 0x1c; in calc_con()
388 if (output->port->gap != 0xffffffff) { in calc_con()
391 max_bitrate = 0; in calc_con()
393 if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) { in calc_con()
394 *con = 0x10c; in calc_con()
395 if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) { in calc_con()
398 max_bitrate = 0; in calc_con()
399 gap = 0; in calc_con()
402 *con |= 0x800; in calc_con()
404 *con |= 0x1000; in calc_con()
411 *con |= 0x1810; in calc_con()
425 *con |= 0x810; /* 96 MBit/s and gap */ in calc_con()
428 *con |= 0x10; /* enable gap */ in calc_con()
431 if (max_bitrate > 0) { in calc_con()
438 *con &= ~0x10; /* Disable gap */ in calc_con()
451 u32 con = 0x11c, con2 = 0; in ddb_output_start()
454 output->dma->cbuf = 0; in ddb_output_start()
455 output->dma->coff = 0; in ddb_output_start()
456 output->dma->stat = 0; in ddb_output_start()
457 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); in ddb_output_start()
459 if (output->port->input[0]->port->class == DDB_PORT_LOOP) in ddb_output_start()
460 con = (1UL << 13) | 0x14; in ddb_output_start()
462 calc_con(output, &con, &con2, 0); in ddb_output_start()
464 ddbwritel(dev, 0, TS_CONTROL(output)); in ddb_output_start()
466 ddbwritel(dev, 0, TS_CONTROL(output)); in ddb_output_start()
472 ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma)); in ddb_output_start()
488 ddbwritel(dev, 0, TS_CONTROL(output)); in ddb_output_stop()
490 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma)); in ddb_output_stop()
491 output->dma->running = 0; in ddb_output_stop()
502 ddbwritel(dev, 0, tag | TS_CONTROL(input)); in ddb_input_stop()
504 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); in ddb_input_stop()
505 input->dma->running = 0; in ddb_input_stop()
514 input->dma->cbuf = 0; in ddb_input_start()
515 input->dma->coff = 0; in ddb_input_start()
516 input->dma->stat = 0; in ddb_input_start()
517 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma)); in ddb_input_start()
519 ddbwritel(dev, 0, TS_CONTROL(input)); in ddb_input_start()
521 ddbwritel(dev, 0, TS_CONTROL(input)); in ddb_input_start()
525 ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma)); in ddb_input_start()
529 ddbwritel(dev, 0x09, TS_CONTROL(input)); in ddb_input_start()
532 ddbwritel(dev, 0x000fff01, TS_CONTROL2(input)); in ddb_input_start()
546 i = o->port->input[0]; in ddb_input_start_all()
563 i = o->port->input[0]; in ddb_input_stop_all()
575 idx = (stat >> 11) & 0x1f; in ddb_output_free()
576 off = (stat & 0x7ff) << 7; in ddb_output_free()
581 return 0; in ddb_output_free()
585 if (diff <= 0 || diff > (2 * 188)) in ddb_output_free()
587 return 0; in ddb_output_free()
597 idx = (stat >> 11) & 0x1f; in ddb_output_write()
598 off = (stat & 0x7ff) << 7; in ddb_output_write()
603 off == 0) { in ddb_output_write()
632 output->dma->coff = 0; in ddb_output_write()
650 idx = (stat >> 11) & 0x1f; in ddb_input_avail()
651 off = (stat & 0x7ff) << 7; in ddb_input_avail()
656 return 0; in ddb_input_avail()
660 return 0; in ddb_input_avail()
671 idx = (stat >> 11) & 0x1f; in ddb_input_read()
690 input->dma->coff = 0; in ddb_input_read()
723 ddb_output_free(output) >= 188) < 0) in ts_write()
727 if (stat < 0) in ts_write()
740 struct ddb_input *input = output->port->input[0]; in ts_read()
753 ddb_input_avail(input) >= 188) < 0) in ts_read()
757 if (stat < 0) in ts_read()
769 struct ddb_input *input = output->port->input[0]; in ts_poll()
771 __poll_t mask = 0; in ts_poll()
790 input = output->port->input[0]; in ts_release()
814 input = output->port->input[0]; in ts_open()
830 if (err < 0) in ts_open()
871 status = dvb->i2c_gate_ctrl(fe, 0); in locked_gate_ctrl()
884 memset(&config, 0, sizeof(config)); in demod_attach_drxk()
885 config.adr = 0x29 + (input->nr & 1); in demod_attach_drxk()
896 return 0; in demod_attach_drxk()
908 fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60); in tuner_attach_tda18271()
910 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); in tuner_attach_tda18271()
915 return 0; in tuner_attach_tda18271()
924 .demod_address = 0x1f,
926 .if_khz = 0,
931 .demod_address = 0x1e,
933 .if_khz = 0,
957 return 0; in demod_attach_stv0367()
966 u8 subaddr = 0x00; in tuner_tda18212_ping()
972 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) in tuner_tda18212_ping()
974 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0) in tuner_tda18212_ping()
978 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0); in tuner_tda18212_ping()
980 return 0; in tuner_tda18212_ping()
991 cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1; in demod_attach_cxd28xx()
1011 return 0; in demod_attach_cxd28xx()
1030 u8 addr = (input->nr & 1) ? 0x63 : 0x60; in tuner_attach_tda18212()
1044 dvb->i2c_client[0] = client; in tuner_attach_tda18212()
1045 return 0; in tuner_attach_tda18212()
1061 .address = 0x69,
1083 .address = 0x68,
1100 .addr = 0x60,
1106 .addr = 0x63,
1125 if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0, in demod_attach_stv0900()
1126 0, (input->nr & 1) ? in demod_attach_stv0900()
1127 (0x09 - type) : (0x0b - type))) { in demod_attach_stv0900()
1132 return 0; in demod_attach_stv0900()
1165 return 0; in tuner_attach_stv6110()
1169 .adr = 0x68,
1173 .tsspeed = 0x28,
1177 .i2c_address = 0x0c << 1,
1185 return i2c_read_reg(i2c, adr, 0, &val) ? 0 : 1; in has_lnbh25()
1204 cfg.tsspeed = 0x10; in demod_attach_stv0910()
1209 cfg.adr = 0x6c; in demod_attach_stv0910()
1221 if (has_lnbh25(i2c, 0x0d)) in demod_attach_stv0910()
1222 lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1); in demod_attach_stv0910()
1224 lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1); in demod_attach_stv0910()
1232 return 0; in demod_attach_stv0910()
1241 u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60); in tuner_attach_stv6111()
1247 dev_err(dev, "No STV6111 found at 0x%02x!\n", adr); in tuner_attach_stv6111()
1251 return 0; in tuner_attach_stv6111()
1265 return 0; in demod_attach_dummy()
1290 return 0; in stop_feed()
1299 case 0x31: in dvb_input_detach()
1305 case 0x30: in dvb_input_detach()
1306 dvb_module_release(dvb->i2c_client[0]); in dvb_input_detach()
1307 dvb->i2c_client[0] = NULL; in dvb_input_detach()
1316 case 0x20: in dvb_input_detach()
1319 case 0x12: in dvb_input_detach()
1325 case 0x11: in dvb_input_detach()
1328 case 0x10: in dvb_input_detach()
1331 case 0x01: in dvb_input_detach()
1334 dvb->attached = 0x00; in dvb_input_detach()
1339 int i, ret = 0; in dvb_register_adapters()
1344 port = &dev->port[0]; in dvb_register_adapters()
1345 adap = port->dvb[0].adap; in dvb_register_adapters()
1349 if (ret < 0) in dvb_register_adapters()
1351 port->dvb[0].adap_registered = 1; in dvb_register_adapters()
1352 for (i = 0; i < dev->port_num; i++) { in dvb_register_adapters()
1354 port->dvb[0].adap = adap; in dvb_register_adapters()
1357 return 0; in dvb_register_adapters()
1360 for (i = 0; i < dev->port_num; i++) { in dvb_register_adapters()
1364 adap = port->dvb[0].adap; in dvb_register_adapters()
1369 if (ret < 0) in dvb_register_adapters()
1371 port->dvb[0].adap_registered = 1; in dvb_register_adapters()
1373 if (adapter_alloc > 0) { in dvb_register_adapters()
1374 port->dvb[1].adap = port->dvb[0].adap; in dvb_register_adapters()
1382 if (ret < 0) in dvb_register_adapters()
1389 adap = port->dvb[0].adap; in dvb_register_adapters()
1394 if (ret < 0) in dvb_register_adapters()
1396 port->dvb[0].adap_registered = 1; in dvb_register_adapters()
1401 adap = port->dvb[0].adap; in dvb_register_adapters()
1406 if (ret < 0) in dvb_register_adapters()
1408 port->dvb[0].adap_registered = 1; in dvb_register_adapters()
1421 for (i = 0; i < dev->link[0].info->port_num; i++) { in dvb_unregister_adapters()
1424 dvb = &port->dvb[0]; in dvb_unregister_adapters()
1427 dvb->adap_registered = 0; in dvb_unregister_adapters()
1432 dvb->adap_registered = 0; in dvb_unregister_adapters()
1438 int ret = 0; in dvb_input_attach()
1444 int par = 0, osc24 = 0, tsfast = 0; in dvb_input_attach()
1455 if (port->nr == 0 && in dvb_input_attach()
1458 /* fast TS on port 0 requires FPGA version >= 1.7 */ in dvb_input_attach()
1459 if ((devids->hwid & 0x00ffffff) >= 0x00010007) in dvb_input_attach()
1463 dvb->attached = 0x01; in dvb_input_attach()
1473 if (ret < 0) in dvb_input_attach()
1475 dvb->attached = 0x10; in dvb_input_attach()
1480 if (ret < 0) in dvb_input_attach()
1482 dvb->attached = 0x11; in dvb_input_attach()
1489 if (ret < 0) in dvb_input_attach()
1491 dvb->attached = 0x12; in dvb_input_attach()
1494 if (ret < 0) in dvb_input_attach()
1496 dvb->attached = 0x20; in dvb_input_attach()
1502 if (ddb_fe_attach_mxl5xx(input) < 0) in dvb_input_attach()
1506 if (demod_attach_stv0900(input, 0) < 0) in dvb_input_attach()
1508 if (tuner_attach_stv6110(input, 0) < 0) in dvb_input_attach()
1512 if (demod_attach_stv0900(input, 1) < 0) in dvb_input_attach()
1514 if (tuner_attach_stv6110(input, 1) < 0) in dvb_input_attach()
1518 if (demod_attach_stv0910(input, 0, tsfast) < 0) in dvb_input_attach()
1520 if (tuner_attach_stv6111(input, 0) < 0) in dvb_input_attach()
1524 if (demod_attach_stv0910(input, 1, tsfast) < 0) in dvb_input_attach()
1526 if (tuner_attach_stv6111(input, 1) < 0) in dvb_input_attach()
1530 if (demod_attach_stv0910(input, 0, tsfast) < 0) in dvb_input_attach()
1532 if (tuner_attach_stv6111(input, 1) < 0) in dvb_input_attach()
1536 if (demod_attach_drxk(input) < 0) in dvb_input_attach()
1538 if (tuner_attach_tda18271(input) < 0) in dvb_input_attach()
1542 if (demod_attach_stv0367(input) < 0) in dvb_input_attach()
1544 if (tuner_attach_tda18212(input, port->type) < 0) in dvb_input_attach()
1550 osc24 = 0; in dvb_input_attach()
1559 par = 0; in dvb_input_attach()
1562 if (demod_attach_cxd28xx(input, par, osc24) < 0) in dvb_input_attach()
1564 if (tuner_attach_tda18212(input, port->type) < 0) in dvb_input_attach()
1573 if (demod_attach_cxd28xx(input, 0, osc24) < 0) in dvb_input_attach()
1575 if (tuner_attach_tda18212(input, port->type) < 0) in dvb_input_attach()
1579 if (demod_attach_dummy(input) < 0) in dvb_input_attach()
1583 if (ddb_fe_attach_mci(input, port->type) < 0) in dvb_input_attach()
1587 return 0; in dvb_input_attach()
1589 dvb->attached = 0x30; in dvb_input_attach()
1592 if (dvb_register_frontend(adap, dvb->fe) < 0) in dvb_input_attach()
1596 if (dvb_register_frontend(adap, dvb->fe2) < 0) { in dvb_input_attach()
1607 dvb->attached = 0x31; in dvb_input_attach()
1608 return 0; in dvb_input_attach()
1621 if (ret < 0) in dvb_input_attach()
1631 int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val); in port_has_encti()
1634 dev_info(dev, "[0x20]=0x%02x\n", val); in port_has_encti()
1635 return ret ? 0 : 1; in port_has_encti()
1641 u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4]; in port_has_cxd()
1642 struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0, in port_has_cxd()
1644 { .addr = 0x40, .flags = I2C_M_RD, in port_has_cxd()
1648 return 0; in port_has_cxd()
1650 if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43) in port_has_cxd()
1659 u8 probe[1] = { 0x00 }, data[4]; in port_has_xo2()
1661 if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4)) in port_has_xo2()
1662 return 0; in port_has_xo2()
1663 if (data[0] == 'D' && data[1] == 'F') { in port_has_xo2()
1668 if (data[0] == 'C' && data[1] == 'I') { in port_has_xo2()
1673 return 0; in port_has_xo2()
1680 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0) in port_has_stv0900()
1681 return 0; in port_has_stv0900()
1687 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0) in port_has_stv0900_aa()
1688 return 0; in port_has_stv0900_aa()
1696 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0) in port_has_drxks()
1697 return 0; in port_has_drxks()
1698 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0) in port_has_drxks()
1699 return 0; in port_has_drxks()
1707 if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0) in port_has_stv0367()
1708 return 0; in port_has_stv0367()
1709 if (val != 0x60) in port_has_stv0367()
1710 return 0; in port_has_stv0367()
1711 if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0) in port_has_stv0367()
1712 return 0; in port_has_stv0367()
1713 if (val != 0x60) in port_has_stv0367()
1714 return 0; in port_has_stv0367()
1725 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); in init_xo2()
1726 if (res < 0) in init_xo2()
1729 if (data[0] != 0x01) { in init_xo2()
1734 i2c_read_reg(i2c, 0x10, 0x08, &val); in init_xo2()
1735 if (val != 0) { in init_xo2()
1736 i2c_write_reg(i2c, 0x10, 0x08, 0x00); in init_xo2()
1740 i2c_write_reg(i2c, 0x10, 0x08, 0x04); in init_xo2()
1743 i2c_write_reg(i2c, 0x10, 0x08, 0x07); in init_xo2()
1745 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ in init_xo2()
1746 i2c_write_reg(i2c, 0x10, 0x09, xo2_speed); in init_xo2()
1750 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); in init_xo2()
1751 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); in init_xo2()
1753 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); in init_xo2()
1754 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); in init_xo2()
1759 i2c_write_reg(i2c, 0x10, 0x08, 0x87); in init_xo2()
1761 return 0; in init_xo2()
1771 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2); in init_xo2_ci()
1772 if (res < 0) in init_xo2_ci()
1775 if (data[0] > 1) { in init_xo2_ci()
1777 port->nr, data[0]); in init_xo2_ci()
1781 port->nr, data[0], data[1]); in init_xo2_ci()
1783 i2c_read_reg(i2c, 0x10, 0x08, &val); in init_xo2_ci()
1784 if (val != 0) { in init_xo2_ci()
1785 i2c_write_reg(i2c, 0x10, 0x08, 0x00); in init_xo2_ci()
1789 i2c_write_reg(i2c, 0x10, 0x08, 3); in init_xo2_ci()
1792 /* speed: 0=55,1=75,2=90,3=104 MBit/s */ in init_xo2_ci()
1793 i2c_write_reg(i2c, 0x10, 0x09, 1); in init_xo2_ci()
1795 i2c_write_reg(i2c, 0x10, 0x08, 0x83); in init_xo2_ci()
1800 i2c_write_reg(i2c, 0x10, 0x0a, 0x03); in init_xo2_ci()
1801 i2c_write_reg(i2c, 0x10, 0x0b, 0x03); in init_xo2_ci()
1803 i2c_write_reg(i2c, 0x10, 0x0a, 0x01); in init_xo2_ci()
1804 i2c_write_reg(i2c, 0x10, 0x0b, 0x01); in init_xo2_ci()
1806 return 0; in init_xo2_ci()
1814 status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0); in port_has_cxd28xx()
1816 return 0; in port_has_cxd28xx()
1817 status = i2c_read_reg(i2c, 0x6e, 0xfd, id); in port_has_cxd28xx()
1819 return 0; in port_has_cxd28xx()
1850 link->ids.device == 0x0005) { in ddb_port_probe()
1941 case 0xa4: in ddb_port_probe()
1946 case 0xb1: in ddb_port_probe()
1951 case 0xb0: in ddb_port_probe()
1956 case 0xc1: in ddb_port_probe()
1975 if (id == 0x51) { in ddb_port_probe()
1976 if (port->nr == 0 && in ddb_port_probe()
2011 int ret = 0; in ddb_port_attach()
2015 ret = dvb_input_attach(port->input[0]); in ddb_port_attach()
2016 if (ret < 0) in ddb_port_attach()
2019 if (ret < 0) { in ddb_port_attach()
2020 dvb_input_detach(port->input[0]); in ddb_port_attach()
2023 port->input[0]->redi = port->input[0]; in ddb_port_attach()
2028 if (ret < 0) in ddb_port_attach()
2032 ret = dvb_register_device(port->dvb[0].adap, in ddb_port_attach()
2033 &port->dvb[0].dev, in ddb_port_attach()
2035 DVB_DEVICE_SEC, 0); in ddb_port_attach()
2040 if (ret < 0) in ddb_port_attach()
2048 int i, numports, err_ports = 0, ret = 0; in ddb_ports_attach()
2053 if (ret < 0) { in ddb_ports_attach()
2061 for (i = 0; i < dev->port_num; i++) { in ddb_ports_attach()
2082 return 0; in ddb_ports_attach()
2090 for (i = 0; i < dev->port_num; i++) { in ddb_ports_detach()
2096 dvb_input_detach(port->input[0]); in ddb_ports_detach()
2114 output->dma->cbuf = (input->dma->stat >> 11) & 0x1f; in input_write_output()
2115 output->dma->coff = (input->dma->stat & 0x7ff) << 7; in input_write_output()
2141 ack = 0; in input_write_dvb()
2143 while (dma->cbuf != ((dma->stat >> 11) & 0x1f) || in input_write_dvb()
2232 info = io->port->dev->link[0].info; in io_regmap()
2243 const struct ddb_regmap *rm = io_regmap(io, 0); in ddb_dma_init()
2266 ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma)); in ddb_dma_init()
2287 const struct ddb_regmap *rm0 = io_regmap(input, 0); in ddb_input_init()
2297 ddb_irq_set(dev, 0, dma_nr + base, &input_handler, input); in ddb_input_init()
2298 ddb_dma_init(input, dma_nr, 0); in ddb_input_init()
2319 const struct ddb_regmap *rm0 = io_regmap(output, 0); in ddb_output_init()
2322 ddb_irq_set(dev, 0, nr + base, &output_handler, output); in ddb_output_init()
2332 for (i = 0; i < dev->i2c_num; i++) { in ddb_port_match_i2c()
2339 return 0; in ddb_port_match_i2c()
2347 for (i = 0; i < dev->i2c_num; i++) { in ddb_port_match_link_i2c()
2353 return 0; in ddb_port_match_link_i2c()
2363 for (p = l = 0; l < DDB_MAX_LINK; l++) { in ddb_ports_init()
2370 for (i = 0; i < info->port_num; i++, p++) { in ddb_ports_init()
2376 port->gap = 0xffffffff; in ddb_ports_init()
2387 port->dvb[0].adap = &dev->adap[2 * p]; in ddb_ports_init()
2404 ddb_input_init(port, 2 * i, 0, 2 * i); in ddb_ports_init()
2411 ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1); in ddb_ports_init()
2422 ddb_input_init(port, 2 + i, 0, 2 + i); in ddb_ports_init()
2429 ddb_input_init(port, 2 * i, 0, 2 * i); in ddb_ports_init()
2436 ddb_input_init(port, 2 * i, 0, 2 * p); in ddb_ports_init()
2452 for (i = 0; i < dev->port_num; i++) { in ddb_ports_release()
2454 if (port->input[0] && port->input[0]->dma) in ddb_ports_release()
2455 cancel_work_sync(&port->input[0]->dma->work); in ddb_ports_release()
2468 do { if ((s & (1UL << ((_nr) & 0x1f))) && \
2469 dev->link[0].irq[_nr].handler) \
2470 dev->link[0].irq[_nr].handler(dev->link[0].irq[_nr].data); } \
2471 while (0)
2474 if (s & (0x0000000f << ((_shift) & 0x1f))) { \
2475 IRQ_HANDLE(0 + (_shift)); \
2483 if (s & (0x000000ff << ((_shift) & 0x1f))) { \
2484 IRQ_HANDLE(0 + (_shift)); \
2498 IRQ_HANDLE_NIBBLE(0); in irq_handle_msg()
2513 u32 mask = 0x8fffff00; in ddb_irq_handler0()
2519 if (s & 0x80000000) in ddb_irq_handler0()
2531 u32 mask = 0x8000000f; in ddb_irq_handler1()
2537 if (s & 0x80000000) in ddb_irq_handler1()
2555 if (s & 0x80000000) in ddb_irq_handler()
2559 if (s & 0x0000000f) in ddb_irq_handler()
2561 if (s & 0x0fffff00) in ddb_irq_handler()
2574 u32 count = 0; in reg_wait()
2581 return 0; in reg_wait()
2604 ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00), in flashio()
2607 ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00), in flashio()
2610 data = 0; in flashio()
2625 ddbwritel(dev, 0, tag | SPI_CONTROL); in flashio()
2632 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); in flashio()
2640 ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00), in flashio()
2642 ddbwritel(dev, 0xffffffff, tag | SPI_DATA); in flashio()
2647 ddbwritel(dev, 0, tag | SPI_CONTROL); in flashio()
2652 while (rlen > 0) { in flashio()
2653 *rbuf = ((data >> 24) & 0xff); in flashio()
2660 return 0; in flashio()
2668 u8 cmd[4] = {0x03, (addr >> 16) & 0xff, in ddbridge_flashread()
2669 (addr >> 8) & 0xff, addr & 0xff}; in ddbridge_flashread()
2689 return 0; in ddb_release()
2700 return 0; in ddb_open()
2787 int num = attr->attr.name[8] - 0x30; in fanspeed_show()
2791 spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff; in fanspeed_show()
2799 struct ddb_link *link = &dev->link[0]; in temp_show()
2807 if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0) in temp_show()
2809 temp = (tmp[0] << 3) | (tmp[1] >> 5); in temp_show()
2812 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) in temp_show()
2814 temp2 = (tmp[0] << 3) | (tmp[1] >> 5); in temp_show()
2828 int num = attr->attr.name[4] - 0x30; in ctemp_show()
2832 return 0; in ctemp_show()
2833 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0) in ctemp_show()
2834 if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0) in ctemp_show()
2836 temp = tmp[0] * 1000; in ctemp_show()
2844 int num = attr->attr.name[3] - 0x30; in led_show()
2846 return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0); in led_show()
2851 if (!dev->link[0].info->led_num) in ddb_set_led()
2858 0x69, 0xf14c, val ? 2 : 0); in ddb_set_led()
2862 0x1f, 0xf00e, 0); in ddb_set_led()
2864 0x1f, 0xf00f, val ? 1 : 0); in ddb_set_led()
2870 i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v); in ddb_set_led()
2871 v = (v & ~0x10) | (val ? 0x10 : 0); in ddb_set_led()
2872 i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v); in ddb_set_led()
2887 int num = attr->attr.name[3] - 0x30; in led_store()
2905 int num = attr->attr.name[3] - 0x30; in snr_show()
2908 if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0) in snr_show()
2910 snr[16] = 0; in snr_show()
2912 /* serial number at 0x100-0x11f */ in snr_show()
2914 0x57, 0x100, snr, 32) < 0) in snr_show()
2916 0x50, 0x100, snr, 32) < 0) in snr_show()
2918 snr[31] = 0; /* in case it is not terminated on EEPROM */ in snr_show()
2929 ddbridge_flashread(dev, 0, snr, 0x10, 15); in bsnr_show()
2930 snr[15] = 0; /* in case it is not terminated on EEPROM */ in bsnr_show()
2941 return 0; in bpsnr_show()
2943 if (i2c_read_regs16(&dev->i2c[0].adap, in bpsnr_show()
2944 0x50, 0x0000, snr, 32) < 0 || in bpsnr_show()
2945 snr[0] == 0xff) in bpsnr_show()
2947 snr[31] = 0; /* in case it is not terminated on EEPROM */ in bpsnr_show()
2954 return 0; in redirect_show()
2967 if (res < 0) in redirect_store()
2977 int num = attr->attr.name[3] - 0x30; in gap_show()
2986 int num = attr->attr.name[3] - 0x30; in gap_store()
2994 val = 0xffffffff; in gap_store()
3005 dev->link[0].ids.hwid, dev->link[0].ids.regmapid); in version_show()
3013 return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid); in hwid_show()
3021 return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid); in regmap_show()
3027 int num = attr->attr.name[5] - 0x30; in fmode_show()
3036 int num = attr->attr.name[5] - 0x30; in devid_show()
3046 int num = attr->attr.name[5] - 0x30; in fmode_store()
3126 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops); in ddb_class_create()
3127 if (ddb_major < 0) in ddb_class_create()
3129 if (class_register(&ddb_class) < 0) in ddb_class_create()
3131 return 0; in ddb_class_create()
3144 for (i = 0; i < 4; i++) in ddb_device_attrs_del()
3148 for (i = 0; i < dev->link[0].info->temp_num; i++) in ddb_device_attrs_del()
3150 for (i = 0; i < dev->link[0].info->fan_num; i++) in ddb_device_attrs_del()
3152 for (i = 0; i < dev->i2c_num && i < 4; i++) { in ddb_device_attrs_del()
3153 if (dev->link[0].info->led_num) in ddb_device_attrs_del()
3158 for (i = 0; ddb_attrs[i].attr.name; i++) in ddb_device_attrs_del()
3166 for (i = 0; ddb_attrs[i].attr.name; i++) in ddb_device_attrs_add()
3169 for (i = 0; i < dev->link[0].info->temp_num; i++) in ddb_device_attrs_add()
3172 for (i = 0; i < dev->link[0].info->fan_num; i++) in ddb_device_attrs_add()
3175 for (i = 0; (i < dev->i2c_num) && (i < 4); i++) { in ddb_device_attrs_add()
3180 if (dev->link[0].info->led_num) in ddb_device_attrs_add()
3185 for (i = 0; i < 4; i++) in ddb_device_attrs_add()
3190 return 0; in ddb_device_attrs_add()
3197 int res = 0; in ddb_device_create()
3243 TEMPMON_CONTROL_OVERTEMP) != 0) { in tempmon_setfan()
3247 temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF; in tempmon_setfan()
3248 if (temp & 0x80) in tempmon_setfan()
3249 temp = 0; in tempmon_setfan()
3250 temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF; in tempmon_setfan()
3251 if (temp2 & 0x80) in tempmon_setfan()
3252 temp2 = 0; in tempmon_setfan()
3256 pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F; in tempmon_setfan()
3282 int status = 0; in tempmon_init()
3301 TEMPMON_CONTROL_OVERTEMP) != 0); in tempmon_init()
3316 return 0; in ddb_init_tempmon()
3318 if (link->ids.regmapid < 0x00010002) in ddb_init_tempmon()
3319 return 0; in ddb_init_tempmon()
3335 for (l = 0; l < DDB_MAX_LINK; l++) { in ddb_init_boards()
3342 ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL); in ddb_init_boards()
3354 return 0; in ddb_init_boards()
3359 mutex_init(&dev->link[0].lnb.lock); in ddb_init()
3360 mutex_init(&dev->link[0].flash_mutex); in ddb_init()
3363 return 0; in ddb_init()
3368 if (ddb_i2c_init(dev) < 0) in ddb_init()
3371 if (ddb_buffers_alloc(dev) < 0) { in ddb_init()
3375 if (ddb_ports_attach(dev) < 0) in ddb_init()
3380 if (dev->link[0].info->fan_num) { in ddb_init()
3384 return 0; in ddb_init()
3432 if (ddb_class_create() < 0) in ddb_init_ddbridge()
3434 ddb_wq = alloc_workqueue("ddbridge", 0, 0); in ddb_init_ddbridge()
3438 return 0; in ddb_init_ddbridge()