Lines Matching +full:rx +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2015 Cisco Systems, Inc. and/or its affiliates.
11 #include "cobalt-driver.h"
12 #include "cobalt-irq.h"
13 #include "cobalt-omnitek.h"
17 struct cobalt *cobalt = s->cobalt; in cobalt_dma_stream_queue_handler()
18 int rx = s->video_channel; in cobalt_dma_stream_queue_handler() local
20 COBALT_CVI_FREEWHEEL(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
22 COBALT_CVI_VMR(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
24 COBALT_CVI(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
26 COBALT_CVI_CLK_LOSS(s->cobalt, rx); in cobalt_dma_stream_queue_handler()
30 spin_lock(&s->irqlock); in cobalt_dma_stream_queue_handler()
32 if (list_empty(&s->bufs)) { in cobalt_dma_stream_queue_handler()
34 spin_unlock(&s->irqlock); in cobalt_dma_stream_queue_handler()
42 cb = list_first_entry(&s->bufs, struct cobalt_buffer, list); in cobalt_dma_stream_queue_handler()
43 list_del(&cb->list); in cobalt_dma_stream_queue_handler()
44 spin_unlock(&s->irqlock); in cobalt_dma_stream_queue_handler()
46 if (s->is_audio || s->is_output) in cobalt_dma_stream_queue_handler()
49 if (s->unstable_frame) { in cobalt_dma_stream_queue_handler()
50 uint32_t stat = ioread32(&vmr->irq_status); in cobalt_dma_stream_queue_handler()
52 iowrite32(stat, &vmr->irq_status); in cobalt_dma_stream_queue_handler()
53 if (!(ioread32(&vmr->status) & in cobalt_dma_stream_queue_handler()
56 if (s->enable_freewheel) in cobalt_dma_stream_queue_handler()
61 if (ioread32(&clkloss->status) & in cobalt_dma_stream_queue_handler()
63 iowrite32(0, &clkloss->ctrl); in cobalt_dma_stream_queue_handler()
64 iowrite32(M00479_CTRL_BITMAP_ENABLE_MSK, &clkloss->ctrl); in cobalt_dma_stream_queue_handler()
66 if (s->enable_freewheel) in cobalt_dma_stream_queue_handler()
72 ioread32(&vmr->vactive_area) != s->timings.bt.height || in cobalt_dma_stream_queue_handler()
73 ioread32(&vmr->hactive_area) != s->timings.bt.width) { in cobalt_dma_stream_queue_handler()
75 if (s->enable_freewheel) in cobalt_dma_stream_queue_handler()
79 if (!s->enable_cvi) { in cobalt_dma_stream_queue_handler()
80 s->enable_cvi = true; in cobalt_dma_stream_queue_handler()
81 iowrite32(M00389_CONTROL_BITMAP_ENABLE_MSK, &cvi->control); in cobalt_dma_stream_queue_handler()
84 if (!(ioread32(&cvi->status) & M00389_STATUS_BITMAP_LOCK_MSK)) { in cobalt_dma_stream_queue_handler()
86 if (s->enable_freewheel) in cobalt_dma_stream_queue_handler()
90 if (!s->enable_freewheel) { in cobalt_dma_stream_queue_handler()
92 s->enable_freewheel = true; in cobalt_dma_stream_queue_handler()
93 iowrite32(0, &fw->ctrl); in cobalt_dma_stream_queue_handler()
99 &vmr->control); in cobalt_dma_stream_queue_handler()
100 iowrite32(M00473_CTRL_BITMAP_ENABLE_MSK, &fw->ctrl); in cobalt_dma_stream_queue_handler()
101 s->enable_freewheel = false; in cobalt_dma_stream_queue_handler()
102 s->unstable_frame = false; in cobalt_dma_stream_queue_handler()
103 s->skip_first_frames = 2; in cobalt_dma_stream_queue_handler()
107 if (ioread32(&fw->status) & M00473_STATUS_BITMAP_FREEWHEEL_MODE_MSK) { in cobalt_dma_stream_queue_handler()
111 &vmr->control); in cobalt_dma_stream_queue_handler()
114 &fw->ctrl); in cobalt_dma_stream_queue_handler()
115 iowrite32(0, &cvi->control); in cobalt_dma_stream_queue_handler()
116 s->unstable_frame = true; in cobalt_dma_stream_queue_handler()
117 s->enable_freewheel = false; in cobalt_dma_stream_queue_handler()
118 s->enable_cvi = false; in cobalt_dma_stream_queue_handler()
121 if (s->skip_first_frames) { in cobalt_dma_stream_queue_handler()
123 s->skip_first_frames--; in cobalt_dma_stream_queue_handler()
125 cb->vb.vb2_buf.timestamp = ktime_get_ns(); in cobalt_dma_stream_queue_handler()
128 cb->vb.sequence = s->sequence++; in cobalt_dma_stream_queue_handler()
129 vb2_buffer_done(&cb->vb.vb2_buf, in cobalt_dma_stream_queue_handler()
130 (skip || s->unstable_frame) ? in cobalt_dma_stream_queue_handler()
149 struct cobalt_stream *s = &cobalt->streams[i]; in cobalt_irq_handler()
150 unsigned dma_fifo_mask = s->dma_fifo_mask; in cobalt_irq_handler()
152 if (dma_interrupt & (1 << s->dma_channel)) { in cobalt_irq_handler()
153 cobalt->irq_dma[i]++; in cobalt_irq_handler()
157 if (!s->is_audio) { in cobalt_irq_handler()
163 if (s->is_audio) in cobalt_irq_handler()
165 if (edge & s->adv_irq_mask) in cobalt_irq_handler()
166 set_bit(COBALT_STREAM_FL_ADV_IRQ, &s->flags); in cobalt_irq_handler()
167 if ((edge & mask & dma_fifo_mask) && vb2_is_streaming(&s->q)) { in cobalt_irq_handler()
168 cobalt_info("full rx FIFO %d\n", i); in cobalt_irq_handler()
169 cobalt->irq_full_fifo++; in cobalt_irq_handler()
173 queue_work(cobalt->irq_work_queues, &cobalt->irq_work_queue); in cobalt_irq_handler()
181 cobalt->irq_adv1++; in cobalt_irq_handler()
187 cobalt->irq_adv2++; in cobalt_irq_handler()
189 cobalt->irq_advout++; in cobalt_irq_handler()
191 cobalt->irq_dma_tot++; in cobalt_irq_handler()
193 cobalt->irq_none++; in cobalt_irq_handler()
206 struct cobalt_stream *s = &cobalt->streams[i]; in cobalt_irq_work_handler()
208 if (test_and_clear_bit(COBALT_STREAM_FL_ADV_IRQ, &s->flags)) { in cobalt_irq_work_handler()
211 v4l2_subdev_call(cobalt->streams[i].sd, core, in cobalt_irq_work_handler()
215 mask | s->adv_irq_mask); in cobalt_irq_work_handler()
226 cobalt->irq_adv1, cobalt->irq_adv2, cobalt->irq_advout, in cobalt_irq_log_status()
227 cobalt->irq_none, cobalt->irq_full_fifo); in cobalt_irq_log_status()
228 cobalt_info("irq: dma_tot=%u (", cobalt->irq_dma_tot); in cobalt_irq_log_status()
230 pr_cont("%s%u", i ? "/" : "", cobalt->irq_dma[i]); in cobalt_irq_log_status()
232 cobalt->irq_dma_tot = cobalt->irq_adv1 = cobalt->irq_adv2 = 0; in cobalt_irq_log_status()
233 cobalt->irq_advout = cobalt->irq_none = cobalt->irq_full_fifo = 0; in cobalt_irq_log_status()
234 memset(cobalt->irq_dma, 0, sizeof(cobalt->irq_dma)); in cobalt_irq_log_status()