34 #define OV5693_REG_ADDR_MASK			0xffff
37 #define OV5693_SW_RESET_REG			OV5693_REG_8BIT(0x0103)
38 #define OV5693_SW_STREAM_REG			OV5693_REG_8BIT(0x0100)
39 #define OV5693_START_STREAMING			0x01
40 #define OV5693_STOP_STREAMING			0x00
41 #define OV5693_SW_RESET				0x01
43 #define OV5693_REG_CHIP_ID			OV5693_REG_16BIT(0x300a)
44 /* Yes, this is right. The datasheet for the OV5693 gives its ID as 0x5690 */
45 #define OV5693_CHIP_ID				0x5690
48 #define OV5693_EXPOSURE_CTRL_REG		OV5693_REG_24BIT(0x3500)
55 #define OV5693_GAIN_CTRL_REG			OV5693_REG_16BIT(0x350a)
63 #define OV5693_MWB_RED_GAIN_REG			OV5693_REG_16BIT(0x3400)
64 #define OV5693_MWB_GREEN_GAIN_REG		OV5693_REG_16BIT(0x3402)
65 #define OV5693_MWB_BLUE_GAIN_REG		OV5693_REG_16BIT(0x3404)
66 #define OV5693_MWB_GAIN_MASK			GENMASK(11, 0)
67 #define OV5693_MWB_GAIN_MAX			0x0fff
74 #define OV5693_CROP_START_X_REG			OV5693_REG_16BIT(0x3800)
75 #define OV5693_CROP_START_Y_REG			OV5693_REG_16BIT(0x3802)
76 #define OV5693_CROP_END_X_REG			OV5693_REG_16BIT(0x3804)
77 #define OV5693_CROP_END_Y_REG			OV5693_REG_16BIT(0x3806)
78 #define OV5693_OUTPUT_SIZE_X_REG		OV5693_REG_16BIT(0x3808)
79 #define OV5693_OUTPUT_SIZE_Y_REG		OV5693_REG_16BIT(0x380a)
81 #define OV5693_TIMING_HTS_REG			OV5693_REG_16BIT(0x380c)
83 #define OV5693_TIMING_VTS_REG			OV5693_REG_16BIT(0x380e)
84 #define OV5693_TIMING_MAX_VTS			0xffff
85 #define OV5693_TIMING_MIN_VTS			0x04
87 #define OV5693_OFFSET_START_X_REG		OV5693_REG_16BIT(0x3810)
88 #define OV5693_OFFSET_START_Y_REG		OV5693_REG_16BIT(0x3812)
90 #define OV5693_SUB_INC_X_REG			OV5693_REG_8BIT(0x3814)
91 #define OV5693_SUB_INC_Y_REG			OV5693_REG_8BIT(0x3815)
93 #define OV5693_FORMAT1_REG			OV5693_REG_8BIT(0x3820)
96 #define OV5693_FORMAT1_VBIN_EN			BIT(0)
97 #define OV5693_FORMAT2_REG			OV5693_REG_8BIT(0x3821)
101 #define OV5693_FORMAT2_HBIN_EN			BIT(0)
103 #define OV5693_ISP_CTRL2_REG			OV5693_REG_8BIT(0x5002)
109 #define OV5693_NATIVE_START_LEFT		0
110 #define OV5693_NATIVE_START_TOP			0
119 #define OV5693_TEST_PATTERN_REG			OV5693_REG_8BIT(0x5e00)
122 #define OV5693_TEST_PATTERN_RANDOM		0x01
123 #define OV5693_TEST_PATTERN_BARS		0x00
192 	{OV5693_REG_8BIT(0x3016), 0xf0},
193 	{OV5693_REG_8BIT(0x3017), 0xf0},
194 	{OV5693_REG_8BIT(0x3018), 0xf0},
195 	{OV5693_REG_8BIT(0x3022), 0x01},
196 	{OV5693_REG_8BIT(0x3028), 0x44},
197 	{OV5693_REG_8BIT(0x3098), 0x02},
198 	{OV5693_REG_8BIT(0x3099), 0x19},
199 	{OV5693_REG_8BIT(0x309a), 0x02},
200 	{OV5693_REG_8BIT(0x309b), 0x01},
201 	{OV5693_REG_8BIT(0x309c), 0x00},
202 	{OV5693_REG_8BIT(0x30a0), 0xd2},
203 	{OV5693_REG_8BIT(0x30a2), 0x01},
204 	{OV5693_REG_8BIT(0x30b2), 0x00},
205 	{OV5693_REG_8BIT(0x30b3), 0x83},
206 	{OV5693_REG_8BIT(0x30b4), 0x03},
207 	{OV5693_REG_8BIT(0x30b5), 0x04},
208 	{OV5693_REG_8BIT(0x30b6), 0x01},
209 	{OV5693_REG_8BIT(0x3080), 0x01},
210 	{OV5693_REG_8BIT(0x3104), 0x21},
211 	{OV5693_REG_8BIT(0x3106), 0x00},
212 	{OV5693_REG_8BIT(0x3406), 0x01},
213 	{OV5693_REG_8BIT(0x3503), 0x07},
214 	{OV5693_REG_8BIT(0x350b), 0x40},
215 	{OV5693_REG_8BIT(0x3601), 0x0a},
216 	{OV5693_REG_8BIT(0x3602), 0x38},
217 	{OV5693_REG_8BIT(0x3612), 0x80},
218 	{OV5693_REG_8BIT(0x3620), 0x54},
219 	{OV5693_REG_8BIT(0x3621), 0xc7},
220 	{OV5693_REG_8BIT(0x3622), 0x0f},
221 	{OV5693_REG_8BIT(0x3625), 0x10},
222 	{OV5693_REG_8BIT(0x3630), 0x55},
223 	{OV5693_REG_8BIT(0x3631), 0xf4},
224 	{OV5693_REG_8BIT(0x3632), 0x00},
225 	{OV5693_REG_8BIT(0x3633), 0x34},
226 	{OV5693_REG_8BIT(0x3634), 0x02},
227 	{OV5693_REG_8BIT(0x364d), 0x0d},
228 	{OV5693_REG_8BIT(0x364f), 0xdd},
229 	{OV5693_REG_8BIT(0x3660), 0x04},
230 	{OV5693_REG_8BIT(0x3662), 0x10},
231 	{OV5693_REG_8BIT(0x3663), 0xf1},
232 	{OV5693_REG_8BIT(0x3665), 0x00},
233 	{OV5693_REG_8BIT(0x3666), 0x20},
234 	{OV5693_REG_8BIT(0x3667), 0x00},
235 	{OV5693_REG_8BIT(0x366a), 0x80},
236 	{OV5693_REG_8BIT(0x3680), 0xe0},
237 	{OV5693_REG_8BIT(0x3681), 0x00},
238 	{OV5693_REG_8BIT(0x3700), 0x42},
239 	{OV5693_REG_8BIT(0x3701), 0x14},
240 	{OV5693_REG_8BIT(0x3702), 0xa0},
241 	{OV5693_REG_8BIT(0x3703), 0xd8},
242 	{OV5693_REG_8BIT(0x3704), 0x78},
243 	{OV5693_REG_8BIT(0x3705), 0x02},
244 	{OV5693_REG_8BIT(0x370a), 0x00},
245 	{OV5693_REG_8BIT(0x370b), 0x20},
246 	{OV5693_REG_8BIT(0x370c), 0x0c},
247 	{OV5693_REG_8BIT(0x370d), 0x11},
248 	{OV5693_REG_8BIT(0x370e), 0x00},
249 	{OV5693_REG_8BIT(0x370f), 0x40},
250 	{OV5693_REG_8BIT(0x3710), 0x00},
251 	{OV5693_REG_8BIT(0x371a), 0x1c},
252 	{OV5693_REG_8BIT(0x371b), 0x05},
253 	{OV5693_REG_8BIT(0x371c), 0x01},
254 	{OV5693_REG_8BIT(0x371e), 0xa1},
255 	{OV5693_REG_8BIT(0x371f), 0x0c},
256 	{OV5693_REG_8BIT(0x3721), 0x00},
257 	{OV5693_REG_8BIT(0x3724), 0x10},
258 	{OV5693_REG_8BIT(0x3726), 0x00},
259 	{OV5693_REG_8BIT(0x372a), 0x01},
260 	{OV5693_REG_8BIT(0x3730), 0x10},
261 	{OV5693_REG_8BIT(0x3738), 0x22},
262 	{OV5693_REG_8BIT(0x3739), 0xe5},
263 	{OV5693_REG_8BIT(0x373a), 0x50},
264 	{OV5693_REG_8BIT(0x373b), 0x02},
265 	{OV5693_REG_8BIT(0x373c), 0x41},
266 	{OV5693_REG_8BIT(0x373f), 0x02},
267 	{OV5693_REG_8BIT(0x3740), 0x42},
268 	{OV5693_REG_8BIT(0x3741), 0x02},
269 	{OV5693_REG_8BIT(0x3742), 0x18},
270 	{OV5693_REG_8BIT(0x3743), 0x01},
271 	{OV5693_REG_8BIT(0x3744), 0x02},
272 	{OV5693_REG_8BIT(0x3747), 0x10},
273 	{OV5693_REG_8BIT(0x374c), 0x04},
274 	{OV5693_REG_8BIT(0x3751), 0xf0},
275 	{OV5693_REG_8BIT(0x3752), 0x00},
276 	{OV5693_REG_8BIT(0x3753), 0x00},
277 	{OV5693_REG_8BIT(0x3754), 0xc0},
278 	{OV5693_REG_8BIT(0x3755), 0x00},
279 	{OV5693_REG_8BIT(0x3756), 0x1a},
280 	{OV5693_REG_8BIT(0x3758), 0x00},
281 	{OV5693_REG_8BIT(0x3759), 0x0f},
282 	{OV5693_REG_8BIT(0x376b), 0x44},
283 	{OV5693_REG_8BIT(0x375c), 0x04},
284 	{OV5693_REG_8BIT(0x3774), 0x10},
285 	{OV5693_REG_8BIT(0x3776), 0x00},
286 	{OV5693_REG_8BIT(0x377f), 0x08},
287 	{OV5693_REG_8BIT(0x3780), 0x22},
288 	{OV5693_REG_8BIT(0x3781), 0x0c},
289 	{OV5693_REG_8BIT(0x3784), 0x2c},
290 	{OV5693_REG_8BIT(0x3785), 0x1e},
291 	{OV5693_REG_8BIT(0x378f), 0xf5},
292 	{OV5693_REG_8BIT(0x3791), 0xb0},
293 	{OV5693_REG_8BIT(0x3795), 0x00},
294 	{OV5693_REG_8BIT(0x3796), 0x64},
295 	{OV5693_REG_8BIT(0x3797), 0x11},
296 	{OV5693_REG_8BIT(0x3798), 0x30},
297 	{OV5693_REG_8BIT(0x3799), 0x41},
298 	{OV5693_REG_8BIT(0x379a), 0x07},
299 	{OV5693_REG_8BIT(0x379b), 0xb0},
300 	{OV5693_REG_8BIT(0x379c), 0x0c},
301 	{OV5693_REG_8BIT(0x3a04), 0x06},
302 	{OV5693_REG_8BIT(0x3a05), 0x14},
303 	{OV5693_REG_8BIT(0x3e07), 0x20},
304 	{OV5693_REG_8BIT(0x4000), 0x08},
305 	{OV5693_REG_8BIT(0x4001), 0x04},
306 	{OV5693_REG_8BIT(0x4004), 0x08},
307 	{OV5693_REG_8BIT(0x4006), 0x20},
308 	{OV5693_REG_8BIT(0x4008), 0x24},
309 	{OV5693_REG_8BIT(0x4009), 0x10},
310 	{OV5693_REG_8BIT(0x4058), 0x00},
311 	{OV5693_REG_8BIT(0x4101), 0xb2},
312 	{OV5693_REG_8BIT(0x4307), 0x31},
313 	{OV5693_REG_8BIT(0x4511), 0x05},
314 	{OV5693_REG_8BIT(0x4512), 0x01},
315 	{OV5693_REG_8BIT(0x481f), 0x30},
316 	{OV5693_REG_8BIT(0x4826), 0x2c},
317 	{OV5693_REG_8BIT(0x4d02), 0xfd},
318 	{OV5693_REG_8BIT(0x4d03), 0xf5},
319 	{OV5693_REG_8BIT(0x4d04), 0x0c},
320 	{OV5693_REG_8BIT(0x4d05), 0xcc},
321 	{OV5693_REG_8BIT(0x4837), 0x0a},
322 	{OV5693_REG_8BIT(0x5003), 0x20},
323 	{OV5693_REG_8BIT(0x5013), 0x00},
324 	{OV5693_REG_8BIT(0x5842), 0x01},
325 	{OV5693_REG_8BIT(0x5843), 0x2b},
326 	{OV5693_REG_8BIT(0x5844), 0x01},
327 	{OV5693_REG_8BIT(0x5845), 0x92},
328 	{OV5693_REG_8BIT(0x5846), 0x01},
329 	{OV5693_REG_8BIT(0x5847), 0x8f},
330 	{OV5693_REG_8BIT(0x5848), 0x01},
331 	{OV5693_REG_8BIT(0x5849), 0x0c},
332 	{OV5693_REG_8BIT(0x5e10), 0x0c},
333 	{OV5693_REG_8BIT(0x3820), 0x00},
334 	{OV5693_REG_8BIT(0x3821), 0x1e},
335 	{OV5693_REG_8BIT(0x5041), 0x14}
368 	0,
385 			.flags	= 0,  in ov5693_read_reg()
404 	if (ret < 0)  in ov5693_read_reg()
406 				     "Failed to read register 0x%04x: %d\n",  in ov5693_read_reg()
409 	*value = 0;  in ov5693_read_reg()
410 	for (i = 0; i < len; ++i) {  in ov5693_read_reg()
415 	return 0;  in ov5693_read_reg()
434 	if (*error < 0)  in ov5693_write_reg()
438 	for (i = 0; i < len; ++i) {  in ov5693_write_reg()
439 		buf.val[len - i - 1] = value & 0xff;  in ov5693_write_reg()
446 	if (ret < 0) {  in ov5693_write_reg()
447 		dev_err(&client->dev, "Failed to write register 0x%04x: %d\n",  in ov5693_write_reg()
457 	int ret = 0;  in ov5693_write_reg_array()
459 	for (i = 0; i < reglist->num_regs; i++)  in ov5693_write_reg_array()
469 	u32 value = 0;  in ov5693_update_bits()
494 				 enable ? bits : 0);  in ov5693_flip_vert_configure()
498 	return 0;  in ov5693_flip_vert_configure()
509 				 enable ? bits : 0);  in ov5693_flip_horz_configure()
513 	return 0;  in ov5693_flip_horz_configure()
528 	return 0;  in ov5693_get_exposure()
534 	int ret = 0;  in ov5693_exposure_configure()
561 	int ret = 0;  in ov5693_digital_gain_configure()
574 	int ret = 0;  in ov5693_analog_gain_configure()
586 	int ret = 0;  in ov5693_vts_configure()
595 	int ret = 0;  in ov5693_test_pattern_configure()
607 	int ret = 0;  in ov5693_s_ctrl()
625 		return 0;  in ov5693_s_ctrl()
684 	int ret = 0;  in ov5693_mode_configure()
691 	ov5693_write_reg(ov5693, OV5693_OFFSET_START_X_REG, 0, &ret);  in ov5693_mode_configure()
710 	ov5693_write_reg(ov5693, OV5693_OFFSET_START_Y_REG, 0, &ret);  in ov5693_mode_configure()
722 			 ((mode->inc_x_odd << 4) & 0xf0) | 0x01, &ret);  in ov5693_mode_configure()
725 			 ((mode->inc_y_odd << 4) & 0xf0) | 0x01, &ret);  in ov5693_mode_configure()
733 				 mode->binning_y ? OV5693_FORMAT1_VBIN_EN : 0);  in ov5693_mode_configure()
739 				 mode->binning_x ? OV5693_FORMAT2_HBIN_EN : 0);  in ov5693_mode_configure()
746 	int ret = 0;  in ov5693_enable_streaming()
757 	int ret = 0;  in ov5693_sw_reset()
819 	gpiod_set_value_cansleep(ov5693->powerdown, 0);  in ov5693_sensor_powerup()
820 	gpiod_set_value_cansleep(ov5693->reset, 0);  in ov5693_sensor_powerup()
824 	return 0;  in ov5693_sensor_powerup()
838 	return 0;  in ov5693_sensor_suspend()
879 				     "sensor ID mismatch. Found 0x%04x\n", id);  in ov5693_detect()
881 	return 0;  in ov5693_detect()
939 	return 0;  in ov5693_get_fmt()
984 		return 0;  in ov5693_set_fmt()
1014 	return 0;  in ov5693_set_fmt()
1031 		sel->r.top = 0;  in ov5693_get_selection()
1032 		sel->r.left = 0;  in ov5693_get_selection()
1047 	return 0;  in ov5693_get_selection()
1098 	return 0;  in ov5693_set_selection()
1108 		if (ret < 0)  in ov5693_s_stream()
1133 	return 0;  in ov5693_s_stream()
1150 	return 0;  in ov5693_g_frame_interval()
1158 	if (code->index > 0)  in ov5693_enum_mbus_code()
1162 	return 0;  in ov5693_enum_mbus_code()
1184 	return 0;  in ov5693_enum_frame_size()
1225 						  0, 0, link_freq_menu_items);  in ov5693_init_controls()
1231 					      V4L2_CID_PIXEL_RATE, 0,  in ov5693_init_controls()
1259 					 V4L2_CID_HFLIP, 0, 1, 1, 0);  in ov5693_init_controls()
1262 					 V4L2_CID_VFLIP, 0, 1, 1, 0);  in ov5693_init_controls()
1283 					0, 0, ov5693_test_pattern_menu);  in ov5693_init_controls()
1305 	return 0;  in ov5693_init_controls()
1328 	return 0;  in ov5693_configure_gpios()
1335 	for (i = 0; i < OV5693_NUM_SUPPLIES; i++)  in ov5693_get_regulators()
1373 	for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++)  in ov5693_check_hwcfg()
1394 	int ret = 0;  in ov5693_probe()