Lines Matching refs:ADV76XX_REG
618 #define ADV76XX_REG(page, offset) (((page) << 8) | (offset)) macro
2946 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x04 }, /* HDMI filter optimization */
2947 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x04 }, /* HDMI filter optimization */
2948 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x00 }, /* DDC bus active pull-up control */
2949 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3e), 0x74 }, /* TMDS PLL optimization */
2950 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4e), 0x3b }, /* TMDS PLL optimization */
2951 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0x74 }, /* TMDS PLL optimization */
2952 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x63 }, /* TMDS PLL optimization */
2953 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x18 }, /* equaliser */
2954 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x34 }, /* equaliser */
2955 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x93), 0x88 }, /* equaliser */
2956 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x94), 0x2e }, /* equaliser */
2957 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x96), 0x00 }, /* enable automatic EQ changing */
2961 { ADV76XX_REG(ADV76XX_PAGE_AFE, 0x12), 0x7b }, /* ADC noise shaping filter controls */
2962 { ADV76XX_REG(ADV76XX_PAGE_AFE, 0x0c), 0x1f }, /* CP core gain controls */
2963 { ADV76XX_REG(ADV76XX_PAGE_CP, 0x3e), 0x04 }, /* CP core pre-gain control */
2964 { ADV76XX_REG(ADV76XX_PAGE_CP, 0xc3), 0x39 }, /* CP coast control. Graphics mode */
2965 { ADV76XX_REG(ADV76XX_PAGE_CP, 0x40), 0x5c }, /* CP core pre-gain control. Graphics mode */
2973 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x0d), 0x84 }, /* HDMI filter optimization */
2974 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3d), 0x10 }, /* DDC bus active pull-up control */
2975 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3e), 0x39 }, /* TMDS PLL optimization */
2976 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4e), 0x3b }, /* TMDS PLL optimization */
2977 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xb6 }, /* TMDS PLL optimization */
2978 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x03 }, /* TMDS PLL optimization */
2979 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x18 }, /* equaliser */
2980 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x34 }, /* equaliser */
2981 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x93), 0x8b }, /* equaliser */
2982 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x94), 0x2d }, /* equaliser */
2983 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x96), 0x01 }, /* enable automatic EQ changing */
2987 { ADV76XX_REG(ADV76XX_PAGE_AFE, 0x12), 0xfb }, /* ADC noise shaping filter controls */
2988 { ADV76XX_REG(ADV76XX_PAGE_AFE, 0x0c), 0x0d }, /* CP core gain controls */
2995 { ADV76XX_REG(ADV76XX_PAGE_CP, 0x6c), 0x00 },
2996 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9b), 0x03 },
2997 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x6f), 0x08 },
2998 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x85), 0x1f },
2999 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x87), 0x70 },
3000 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xda },
3001 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x01 },
3002 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x03), 0x98 },
3003 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4c), 0x44 },
3004 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8d), 0x04 },
3005 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x8e), 0x1e },
3011 { ADV76XX_REG(ADV76XX_PAGE_CP, 0x6c), 0x00 },
3012 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9b), 0x03 },
3013 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x6f), 0x08 },
3014 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x85), 0x1f },
3015 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x87), 0x70 },
3016 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xda },
3017 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x01 },
3018 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x03), 0x98 },
3019 { ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4c), 0x44 },