Lines Matching full:intp
24 int stv0900_check_signal_presence(struct stv0900_internal *intp, in stv0900_check_signal_presence() argument
33 carr_offset = (stv0900_read_reg(intp, CFR2) << 8) in stv0900_check_signal_presence()
34 | stv0900_read_reg(intp, CFR1); in stv0900_check_signal_presence()
36 agc2_integr = (stv0900_read_reg(intp, AGC2I1) << 8) in stv0900_check_signal_presence()
37 | stv0900_read_reg(intp, AGC2I0); in stv0900_check_signal_presence()
38 max_carrier = intp->srch_range[demod] / 1000; in stv0900_check_signal_presence()
42 max_carrier /= intp->mclk / 1000; in stv0900_check_signal_presence()
54 static void stv0900_get_sw_loop_params(struct stv0900_internal *intp, in stv0900_get_sw_loop_params() argument
63 srate = intp->symbol_rate[demod]; in stv0900_get_sw_loop_params()
64 max_carrier = intp->srch_range[demod] / 1000; in stv0900_get_sw_loop_params()
66 standard = intp->srch_standard[demod]; in stv0900_get_sw_loop_params()
69 max_carrier /= intp->mclk / 1000; in stv0900_get_sw_loop_params()
75 freq_inc /= intp->mclk >> 10; in stv0900_get_sw_loop_params()
121 static int stv0900_search_carr_sw_loop(struct stv0900_internal *intp, in stv0900_search_carr_sw_loop() argument
131 max_carrier = intp->srch_range[demod] / 1000; in stv0900_search_carr_sw_loop()
135 max_carrier /= intp->mclk / 1000; in stv0900_search_carr_sw_loop()
148 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_search_carr_sw_loop()
149 stv0900_write_reg(intp, CFRINIT1, (freqOffset / 256) & 0xff); in stv0900_search_carr_sw_loop()
150 stv0900_write_reg(intp, CFRINIT0, freqOffset & 0xff); in stv0900_search_carr_sw_loop()
151 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_search_carr_sw_loop()
152 stv0900_write_bits(intp, ALGOSWRST, 1); in stv0900_search_carr_sw_loop()
154 if (intp->chip_id == 0x12) { in stv0900_search_carr_sw_loop()
155 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_search_carr_sw_loop()
156 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_search_carr_sw_loop()
168 lock = stv0900_get_demod_lock(intp, demod, Timeout); in stv0900_search_carr_sw_loop()
169 no_signal = stv0900_check_signal_presence(intp, demod); in stv0900_search_carr_sw_loop()
177 stv0900_write_bits(intp, ALGOSWRST, 0); in stv0900_search_carr_sw_loop()
182 static int stv0900_sw_algo(struct stv0900_internal *intp, in stv0900_sw_algo() argument
194 stv0900_get_sw_loop_params(intp, &fqc_inc, &sft_stp_tout, in stv0900_sw_algo()
196 switch (intp->srch_standard[demod]) { in stv0900_sw_algo()
199 if (intp->chip_id >= 0x20) in stv0900_sw_algo()
200 stv0900_write_reg(intp, CARFREQ, 0x3b); in stv0900_sw_algo()
202 stv0900_write_reg(intp, CARFREQ, 0xef); in stv0900_sw_algo()
204 stv0900_write_reg(intp, DMDCFGMD, 0x49); in stv0900_sw_algo()
208 if (intp->chip_id >= 0x20) in stv0900_sw_algo()
209 stv0900_write_reg(intp, CORRELABS, 0x79); in stv0900_sw_algo()
211 stv0900_write_reg(intp, CORRELABS, 0x68); in stv0900_sw_algo()
213 stv0900_write_reg(intp, DMDCFGMD, 0x89); in stv0900_sw_algo()
219 if (intp->chip_id >= 0x20) { in stv0900_sw_algo()
220 stv0900_write_reg(intp, CARFREQ, 0x3b); in stv0900_sw_algo()
221 stv0900_write_reg(intp, CORRELABS, 0x79); in stv0900_sw_algo()
223 stv0900_write_reg(intp, CARFREQ, 0xef); in stv0900_sw_algo()
224 stv0900_write_reg(intp, CORRELABS, 0x68); in stv0900_sw_algo()
227 stv0900_write_reg(intp, DMDCFGMD, 0xc9); in stv0900_sw_algo()
234 lock = stv0900_search_carr_sw_loop(intp, in stv0900_sw_algo()
240 no_signal = stv0900_check_signal_presence(intp, demod); in stv0900_sw_algo()
246 if (intp->chip_id >= 0x20) { in stv0900_sw_algo()
247 stv0900_write_reg(intp, CARFREQ, 0x49); in stv0900_sw_algo()
248 stv0900_write_reg(intp, CORRELABS, 0x9e); in stv0900_sw_algo()
250 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_sw_algo()
251 stv0900_write_reg(intp, CORRELABS, 0x88); in stv0900_sw_algo()
254 if ((stv0900_get_bits(intp, HEADER_MODE) == in stv0900_sw_algo()
258 s2fw = stv0900_get_bits(intp, FLYWHEEL_CPT); in stv0900_sw_algo()
262 s2fw = stv0900_get_bits(intp, in stv0900_sw_algo()
270 if (intp->chip_id >= 0x20) in stv0900_sw_algo()
271 stv0900_write_reg(intp, in stv0900_sw_algo()
275 stv0900_write_reg(intp, in stv0900_sw_algo()
279 stv0900_write_reg(intp, in stv0900_sw_algo()
294 static u32 stv0900_get_symbol_rate(struct stv0900_internal *intp, in stv0900_get_symbol_rate() argument
300 srate = (stv0900_get_bits(intp, SYMB_FREQ3) << 24) + in stv0900_get_symbol_rate()
301 (stv0900_get_bits(intp, SYMB_FREQ2) << 16) + in stv0900_get_symbol_rate()
302 (stv0900_get_bits(intp, SYMB_FREQ1) << 8) + in stv0900_get_symbol_rate()
303 (stv0900_get_bits(intp, SYMB_FREQ0)); in stv0900_get_symbol_rate()
305 srate, stv0900_get_bits(intp, SYMB_FREQ0), in stv0900_get_symbol_rate()
306 stv0900_get_bits(intp, SYMB_FREQ1), in stv0900_get_symbol_rate()
307 stv0900_get_bits(intp, SYMB_FREQ2), in stv0900_get_symbol_rate()
308 stv0900_get_bits(intp, SYMB_FREQ3)); in stv0900_get_symbol_rate()
322 static void stv0900_set_symbol_rate(struct stv0900_internal *intp, in stv0900_set_symbol_rate() argument
342 stv0900_write_reg(intp, SFRINIT1, (symb >> 8) & 0x7f); in stv0900_set_symbol_rate()
343 stv0900_write_reg(intp, SFRINIT1 + 1, (symb & 0xff)); in stv0900_set_symbol_rate()
346 static void stv0900_set_max_symbol_rate(struct stv0900_internal *intp, in stv0900_set_max_symbol_rate() argument
366 stv0900_write_reg(intp, SFRUP1, (symb >> 8) & 0x7f); in stv0900_set_max_symbol_rate()
367 stv0900_write_reg(intp, SFRUP1 + 1, (symb & 0xff)); in stv0900_set_max_symbol_rate()
369 stv0900_write_reg(intp, SFRUP1, 0x7f); in stv0900_set_max_symbol_rate()
370 stv0900_write_reg(intp, SFRUP1 + 1, 0xff); in stv0900_set_max_symbol_rate()
374 static void stv0900_set_min_symbol_rate(struct stv0900_internal *intp, in stv0900_set_min_symbol_rate() argument
394 stv0900_write_reg(intp, SFRLOW1, (symb >> 8) & 0xff); in stv0900_set_min_symbol_rate()
395 stv0900_write_reg(intp, SFRLOW1 + 1, (symb & 0xff)); in stv0900_set_min_symbol_rate()
398 static s32 stv0900_get_timing_offst(struct stv0900_internal *intp, in stv0900_get_timing_offst() argument
405 timingoffset = (stv0900_read_reg(intp, TMGREG2) << 16) + in stv0900_get_timing_offst()
406 (stv0900_read_reg(intp, TMGREG2 + 1) << 8) + in stv0900_get_timing_offst()
407 (stv0900_read_reg(intp, TMGREG2 + 2)); in stv0900_get_timing_offst()
421 static void stv0900_set_dvbs2_rolloff(struct stv0900_internal *intp, in stv0900_set_dvbs2_rolloff() argument
426 if (intp->chip_id == 0x10) { in stv0900_set_dvbs2_rolloff()
427 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 1); in stv0900_set_dvbs2_rolloff()
428 rolloff = stv0900_read_reg(intp, MATSTR1) & 0x03; in stv0900_set_dvbs2_rolloff()
429 stv0900_write_bits(intp, ROLLOFF_CONTROL, rolloff); in stv0900_set_dvbs2_rolloff()
430 } else if (intp->chip_id <= 0x20) in stv0900_set_dvbs2_rolloff()
431 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 0); in stv0900_set_dvbs2_rolloff()
433 stv0900_write_bits(intp, MANUALS2_ROLLOFF, 0); in stv0900_set_dvbs2_rolloff()
456 static int stv0900_check_timing_lock(struct stv0900_internal *intp, in stv0900_check_timing_lock() argument
466 car_freq = stv0900_read_reg(intp, CARFREQ); in stv0900_check_timing_lock()
467 tmg_th_high = stv0900_read_reg(intp, TMGTHRISE); in stv0900_check_timing_lock()
468 tmg_th_low = stv0900_read_reg(intp, TMGTHFALL); in stv0900_check_timing_lock()
469 stv0900_write_reg(intp, TMGTHRISE, 0x20); in stv0900_check_timing_lock()
470 stv0900_write_reg(intp, TMGTHFALL, 0x0); in stv0900_check_timing_lock()
471 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_check_timing_lock()
472 stv0900_write_reg(intp, RTC, 0x80); in stv0900_check_timing_lock()
473 stv0900_write_reg(intp, RTCS2, 0x40); in stv0900_check_timing_lock()
474 stv0900_write_reg(intp, CARFREQ, 0x0); in stv0900_check_timing_lock()
475 stv0900_write_reg(intp, CFRINIT1, 0x0); in stv0900_check_timing_lock()
476 stv0900_write_reg(intp, CFRINIT0, 0x0); in stv0900_check_timing_lock()
477 stv0900_write_reg(intp, AGC2REF, 0x65); in stv0900_check_timing_lock()
478 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_check_timing_lock()
482 if (stv0900_get_bits(intp, TMGLOCK_QUALITY) >= 2) in stv0900_check_timing_lock()
491 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_check_timing_lock()
492 stv0900_write_reg(intp, RTC, 0x88); in stv0900_check_timing_lock()
493 stv0900_write_reg(intp, RTCS2, 0x68); in stv0900_check_timing_lock()
494 stv0900_write_reg(intp, CARFREQ, car_freq); in stv0900_check_timing_lock()
495 stv0900_write_reg(intp, TMGTHRISE, tmg_th_high); in stv0900_check_timing_lock()
496 stv0900_write_reg(intp, TMGTHFALL, tmg_th_low); in stv0900_check_timing_lock()
505 struct stv0900_internal *intp = state->internal; in stv0900_get_demod_cold_lock() local
520 srate = intp->symbol_rate[d]; in stv0900_get_demod_cold_lock()
521 search_range = intp->srch_range[d]; in stv0900_get_demod_cold_lock()
528 lock = stv0900_get_demod_lock(intp, d, locktimeout); in stv0900_get_demod_cold_lock()
534 if (stv0900_check_timing_lock(intp, d) == TRUE) { in stv0900_get_demod_cold_lock()
535 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_get_demod_cold_lock()
536 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_get_demod_cold_lock()
537 lock = stv0900_get_demod_lock(intp, d, demod_timeout); in stv0900_get_demod_cold_lock()
544 if (intp->chip_id <= 0x20) { in stv0900_get_demod_cold_lock()
581 if (intp->chip_id <= 0x20) { in stv0900_get_demod_cold_lock()
582 tuner_freq = intp->freq[d]; in stv0900_get_demod_cold_lock()
583 intp->bw[d] = stv0900_carrier_width(intp->symbol_rate[d], in stv0900_get_demod_cold_lock()
584 intp->rolloff) + intp->symbol_rate[d]; in stv0900_get_demod_cold_lock()
594 if (intp->chip_id <= 0x20) { in stv0900_get_demod_cold_lock()
595 if (intp->tuner_type[d] == 3) in stv0900_get_demod_cold_lock()
596 stv0900_set_tuner_auto(intp, tuner_freq, in stv0900_get_demod_cold_lock()
597 intp->bw[d], demod); in stv0900_get_demod_cold_lock()
599 stv0900_set_tuner(fe, tuner_freq, intp->bw[d]); in stv0900_get_demod_cold_lock()
601 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_get_demod_cold_lock()
602 stv0900_write_reg(intp, CFRINIT1, 0); in stv0900_get_demod_cold_lock()
603 stv0900_write_reg(intp, CFRINIT0, 0); in stv0900_get_demod_cold_lock()
604 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_get_demod_cold_lock()
605 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_get_demod_cold_lock()
607 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_get_demod_cold_lock()
608 freq = (tuner_freq * 65536) / (intp->mclk / 1000); in stv0900_get_demod_cold_lock()
609 stv0900_write_bits(intp, CFR_INIT1, MSB(freq)); in stv0900_get_demod_cold_lock()
610 stv0900_write_bits(intp, CFR_INIT0, LSB(freq)); in stv0900_get_demod_cold_lock()
611 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_get_demod_cold_lock()
612 stv0900_write_reg(intp, DMDISTATE, 0x05); in stv0900_get_demod_cold_lock()
615 lock = stv0900_get_demod_lock(intp, d, timeout); in stv0900_get_demod_cold_lock()
672 static void stv0900_set_viterbi_tracq(struct stv0900_internal *intp, in stv0900_set_viterbi_tracq() argument
680 stv0900_write_reg(intp, vth_reg++, 0xd0); in stv0900_set_viterbi_tracq()
681 stv0900_write_reg(intp, vth_reg++, 0x7d); in stv0900_set_viterbi_tracq()
682 stv0900_write_reg(intp, vth_reg++, 0x53); in stv0900_set_viterbi_tracq()
683 stv0900_write_reg(intp, vth_reg++, 0x2f); in stv0900_set_viterbi_tracq()
684 stv0900_write_reg(intp, vth_reg++, 0x24); in stv0900_set_viterbi_tracq()
685 stv0900_write_reg(intp, vth_reg++, 0x1f); in stv0900_set_viterbi_tracq()
688 static void stv0900_set_viterbi_standard(struct stv0900_internal *intp, in stv0900_set_viterbi_standard() argument
698 stv0900_write_reg(intp, FECM, 0x10); in stv0900_set_viterbi_standard()
699 stv0900_write_reg(intp, PRVIT, 0x3f); in stv0900_set_viterbi_standard()
703 stv0900_write_reg(intp, FECM, 0x00); in stv0900_set_viterbi_standard()
707 stv0900_write_reg(intp, PRVIT, 0x2f); in stv0900_set_viterbi_standard()
710 stv0900_write_reg(intp, PRVIT, 0x01); in stv0900_set_viterbi_standard()
713 stv0900_write_reg(intp, PRVIT, 0x02); in stv0900_set_viterbi_standard()
716 stv0900_write_reg(intp, PRVIT, 0x04); in stv0900_set_viterbi_standard()
719 stv0900_write_reg(intp, PRVIT, 0x08); in stv0900_set_viterbi_standard()
722 stv0900_write_reg(intp, PRVIT, 0x20); in stv0900_set_viterbi_standard()
729 stv0900_write_reg(intp, FECM, 0x80); in stv0900_set_viterbi_standard()
733 stv0900_write_reg(intp, PRVIT, 0x13); in stv0900_set_viterbi_standard()
736 stv0900_write_reg(intp, PRVIT, 0x01); in stv0900_set_viterbi_standard()
739 stv0900_write_reg(intp, PRVIT, 0x02); in stv0900_set_viterbi_standard()
742 stv0900_write_reg(intp, PRVIT, 0x10); in stv0900_set_viterbi_standard()
751 static enum fe_stv0900_fec stv0900_get_vit_fec(struct stv0900_internal *intp, in stv0900_get_vit_fec() argument
755 s32 rate_fld = stv0900_get_bits(intp, VIT_CURPUN); in stv0900_get_vit_fec()
784 static void stv0900_set_dvbs1_track_car_loop(struct stv0900_internal *intp, in stv0900_set_dvbs1_track_car_loop() argument
788 if (intp->chip_id >= 0x30) { in stv0900_set_dvbs1_track_car_loop()
790 stv0900_write_reg(intp, ACLC, 0x2b); in stv0900_set_dvbs1_track_car_loop()
791 stv0900_write_reg(intp, BCLC, 0x1a); in stv0900_set_dvbs1_track_car_loop()
793 stv0900_write_reg(intp, ACLC, 0x0c); in stv0900_set_dvbs1_track_car_loop()
794 stv0900_write_reg(intp, BCLC, 0x1b); in stv0900_set_dvbs1_track_car_loop()
796 stv0900_write_reg(intp, ACLC, 0x2c); in stv0900_set_dvbs1_track_car_loop()
797 stv0900_write_reg(intp, BCLC, 0x1c); in stv0900_set_dvbs1_track_car_loop()
801 stv0900_write_reg(intp, ACLC, 0x1a); in stv0900_set_dvbs1_track_car_loop()
802 stv0900_write_reg(intp, BCLC, 0x09); in stv0900_set_dvbs1_track_car_loop()
810 struct stv0900_internal *intp = state->internal; in stv0900_track_optimization() local
828 srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_track_optimization()
829 srate += stv0900_get_timing_offst(intp, srate, demod); in stv0900_track_optimization()
831 switch (intp->result[demod].standard) { in stv0900_track_optimization()
835 if (intp->srch_standard[demod] == STV0900_AUTO_SEARCH) { in stv0900_track_optimization()
836 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_track_optimization()
837 stv0900_write_bits(intp, DVBS2_ENABLE, 0); in stv0900_track_optimization()
840 stv0900_write_bits(intp, ROLLOFF_CONTROL, intp->rolloff); in stv0900_track_optimization()
841 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 1); in stv0900_track_optimization()
843 if (intp->chip_id < 0x30) { in stv0900_track_optimization()
844 stv0900_write_reg(intp, ERRCTRL1, 0x75); in stv0900_track_optimization()
848 if (stv0900_get_vit_fec(intp, demod) == STV0900_FEC_1_2) { in stv0900_track_optimization()
849 stv0900_write_reg(intp, GAUSSR0, 0x98); in stv0900_track_optimization()
850 stv0900_write_reg(intp, CCIR0, 0x18); in stv0900_track_optimization()
852 stv0900_write_reg(intp, GAUSSR0, 0x18); in stv0900_track_optimization()
853 stv0900_write_reg(intp, CCIR0, 0x18); in stv0900_track_optimization()
856 stv0900_write_reg(intp, ERRCTRL1, 0x75); in stv0900_track_optimization()
860 stv0900_write_bits(intp, DVBS1_ENABLE, 0); in stv0900_track_optimization()
861 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_track_optimization()
862 stv0900_write_reg(intp, ACLC, 0); in stv0900_track_optimization()
863 stv0900_write_reg(intp, BCLC, 0); in stv0900_track_optimization()
864 if (intp->result[demod].frame_len == STV0900_LONG_FRAME) { in stv0900_track_optimization()
865 foundModcod = stv0900_get_bits(intp, DEMOD_MODCOD); in stv0900_track_optimization()
866 pilots = stv0900_get_bits(intp, DEMOD_TYPE) & 0x01; in stv0900_track_optimization()
870 intp->chip_id); in stv0900_track_optimization()
872 stv0900_write_reg(intp, ACLC2S2Q, aclc); in stv0900_track_optimization()
874 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
875 stv0900_write_reg(intp, ACLC2S28, aclc); in stv0900_track_optimization()
878 if ((intp->demod_mode == STV0900_SINGLE) && in stv0900_track_optimization()
881 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
882 stv0900_write_reg(intp, ACLC2S216A, in stv0900_track_optimization()
885 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
886 stv0900_write_reg(intp, ACLC2S232A, in stv0900_track_optimization()
892 modulation = intp->result[demod].modulation; in stv0900_track_optimization()
894 modulation, intp->chip_id); in stv0900_track_optimization()
896 stv0900_write_reg(intp, ACLC2S2Q, aclc); in stv0900_track_optimization()
898 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
899 stv0900_write_reg(intp, ACLC2S28, aclc); in stv0900_track_optimization()
901 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
902 stv0900_write_reg(intp, ACLC2S216A, aclc); in stv0900_track_optimization()
904 stv0900_write_reg(intp, ACLC2S2Q, 0x2a); in stv0900_track_optimization()
905 stv0900_write_reg(intp, ACLC2S232A, aclc); in stv0900_track_optimization()
910 if (intp->chip_id <= 0x11) { in stv0900_track_optimization()
911 if (intp->demod_mode != STV0900_SINGLE) in stv0900_track_optimization()
912 stv0900_activate_s2_modcod(intp, demod); in stv0900_track_optimization()
916 stv0900_write_reg(intp, ERRCTRL1, 0x67); in stv0900_track_optimization()
921 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_track_optimization()
922 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_track_optimization()
926 freq1 = stv0900_read_reg(intp, CFR2); in stv0900_track_optimization()
927 freq0 = stv0900_read_reg(intp, CFR1); in stv0900_track_optimization()
928 if (intp->srch_algo[demod] == STV0900_BLIND_SEARCH) { in stv0900_track_optimization()
929 stv0900_write_reg(intp, SFRSTEP, 0x00); in stv0900_track_optimization()
930 stv0900_write_bits(intp, SCAN_ENABLE, 0); in stv0900_track_optimization()
931 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_track_optimization()
932 stv0900_write_reg(intp, TMGCFG2, 0xc1); in stv0900_track_optimization()
933 stv0900_set_symbol_rate(intp, intp->mclk, srate, demod); in stv0900_track_optimization()
935 if (intp->result[demod].standard != STV0900_DVBS2_STANDARD) in stv0900_track_optimization()
936 stv0900_set_dvbs1_track_car_loop(intp, demod, srate); in stv0900_track_optimization()
940 if (intp->chip_id >= 0x20) { in stv0900_track_optimization()
941 if ((intp->srch_standard[demod] == STV0900_SEARCH_DVBS1) || in stv0900_track_optimization()
942 (intp->srch_standard[demod] == in stv0900_track_optimization()
944 (intp->srch_standard[demod] == in stv0900_track_optimization()
946 stv0900_write_reg(intp, VAVSRVIT, 0x0a); in stv0900_track_optimization()
947 stv0900_write_reg(intp, VITSCALE, 0x0); in stv0900_track_optimization()
951 if (intp->chip_id < 0x20) in stv0900_track_optimization()
952 stv0900_write_reg(intp, CARHDR, 0x08); in stv0900_track_optimization()
954 if (intp->chip_id == 0x10) in stv0900_track_optimization()
955 stv0900_write_reg(intp, CORRELEXP, 0x0a); in stv0900_track_optimization()
957 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_track_optimization()
959 if ((intp->chip_id >= 0x20) || in stv0900_track_optimization()
961 (intp->symbol_rate[demod] < 10000000)) { in stv0900_track_optimization()
962 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_track_optimization()
963 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_track_optimization()
964 intp->bw[demod] = stv0900_carrier_width(srate, in stv0900_track_optimization()
965 intp->rolloff) + 10000000; in stv0900_track_optimization()
967 if ((intp->chip_id >= 0x20) || (blind_tun_sw == 1)) { in stv0900_track_optimization()
968 if (intp->srch_algo[demod] != STV0900_WARM_START) { in stv0900_track_optimization()
969 if (intp->tuner_type[demod] == 3) in stv0900_track_optimization()
970 stv0900_set_tuner_auto(intp, in stv0900_track_optimization()
971 intp->freq[demod], in stv0900_track_optimization()
972 intp->bw[demod], in stv0900_track_optimization()
976 intp->bw[demod]); in stv0900_track_optimization()
980 if ((intp->srch_algo[demod] == STV0900_BLIND_SEARCH) || in stv0900_track_optimization()
981 (intp->symbol_rate[demod] < 10000000)) in stv0900_track_optimization()
989 if (stv0900_get_demod_lock(intp, demod, timed / 2) == FALSE) { in stv0900_track_optimization()
990 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_track_optimization()
991 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_track_optimization()
992 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_track_optimization()
993 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_track_optimization()
995 while ((stv0900_get_demod_lock(intp, in stv0900_track_optimization()
999 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_track_optimization()
1000 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_track_optimization()
1001 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_track_optimization()
1002 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_track_optimization()
1009 if (intp->chip_id >= 0x20) in stv0900_track_optimization()
1010 stv0900_write_reg(intp, CARFREQ, 0x49); in stv0900_track_optimization()
1012 if ((intp->result[demod].standard == STV0900_DVBS1_STANDARD) || in stv0900_track_optimization()
1013 (intp->result[demod].standard == STV0900_DSS_STANDARD)) in stv0900_track_optimization()
1014 stv0900_set_viterbi_tracq(intp, demod); in stv0900_track_optimization()
1018 static int stv0900_get_fec_lock(struct stv0900_internal *intp, in stv0900_get_fec_lock() argument
1027 dmd_state = stv0900_get_bits(intp, HEADER_MODE); in stv0900_get_fec_lock()
1037 lock = stv0900_get_bits(intp, PKTDELIN_LOCK); in stv0900_get_fec_lock()
1040 lock = stv0900_get_bits(intp, LOCKEDVIT); in stv0900_get_fec_lock()
1058 static int stv0900_wait_for_lock(struct stv0900_internal *intp, in stv0900_wait_for_lock() argument
1067 lock = stv0900_get_demod_lock(intp, demod, dmd_timeout); in stv0900_wait_for_lock()
1070 lock = stv0900_get_fec_lock(intp, demod, fec_timeout); in stv0900_wait_for_lock()
1079 lock = stv0900_get_bits(intp, TSFIFO_LINEOK); in stv0900_wait_for_lock()
1100 struct stv0900_internal *intp = state->internal; in stv0900_get_standard() local
1103 int hdr_mode = stv0900_get_bits(intp, HEADER_MODE); in stv0900_get_standard()
1110 if (stv0900_get_bits(intp, DSS_DVB) == 1) in stv0900_get_standard()
1125 static s32 stv0900_get_carr_freq(struct stv0900_internal *intp, u32 mclk, in stv0900_get_carr_freq() argument
1134 derot = (stv0900_get_bits(intp, CAR_FREQ2) << 16) + in stv0900_get_carr_freq()
1135 (stv0900_get_bits(intp, CAR_FREQ1) << 8) + in stv0900_get_carr_freq()
1136 (stv0900_get_bits(intp, CAR_FREQ0)); in stv0900_get_carr_freq()
1174 struct stv0900_internal *intp = state->internal; in stv0900_get_signal_params() local
1177 struct stv0900_signal_info *result = &intp->result[demod]; in stv0900_get_signal_params()
1186 if (intp->srch_algo[d] == STV0900_BLIND_SEARCH) { in stv0900_get_signal_params()
1187 timing = stv0900_read_reg(intp, TMGREG2); in stv0900_get_signal_params()
1189 stv0900_write_reg(intp, SFRSTEP, 0x5c); in stv0900_get_signal_params()
1192 timing = stv0900_read_reg(intp, TMGREG2); in stv0900_get_signal_params()
1199 if (intp->tuner_type[demod] == 3) in stv0900_get_signal_params()
1200 result->frequency = stv0900_get_freq_auto(intp, d); in stv0900_get_signal_params()
1204 offsetFreq = stv0900_get_carr_freq(intp, intp->mclk, d) / 1000; in stv0900_get_signal_params()
1206 result->symbol_rate = stv0900_get_symbol_rate(intp, intp->mclk, d); in stv0900_get_signal_params()
1207 srate_offset = stv0900_get_timing_offst(intp, result->symbol_rate, d); in stv0900_get_signal_params()
1209 result->fec = stv0900_get_vit_fec(intp, d); in stv0900_get_signal_params()
1210 result->modcode = stv0900_get_bits(intp, DEMOD_MODCOD); in stv0900_get_signal_params()
1211 result->pilot = stv0900_get_bits(intp, DEMOD_TYPE) & 0x01; in stv0900_get_signal_params()
1212 result->frame_len = ((u32)stv0900_get_bits(intp, DEMOD_TYPE)) >> 1; in stv0900_get_signal_params()
1213 result->rolloff = stv0900_get_bits(intp, ROLLOFF_STATUS); in stv0900_get_signal_params()
1219 result->spectrum = stv0900_get_bits(intp, SPECINV_DEMOD); in stv0900_get_signal_params()
1233 result->spectrum = stv0900_get_bits(intp, IQINV); in stv0900_get_signal_params()
1240 if ((intp->srch_algo[d] == STV0900_BLIND_SEARCH) || in stv0900_get_signal_params()
1241 (intp->symbol_rate[d] < 10000000)) { in stv0900_get_signal_params()
1242 offsetFreq = result->frequency - intp->freq[d]; in stv0900_get_signal_params()
1243 if (intp->tuner_type[demod] == 3) in stv0900_get_signal_params()
1244 intp->freq[d] = stv0900_get_freq_auto(intp, d); in stv0900_get_signal_params()
1246 intp->freq[d] = stv0900_get_tuner_freq(fe); in stv0900_get_signal_params()
1248 if (abs(offsetFreq) <= ((intp->srch_range[d] / 2000) + 500)) in stv0900_get_signal_params()
1255 } else if (abs(offsetFreq) <= ((intp->srch_range[d] / 2000) + 500)) in stv0900_get_signal_params()
1267 struct stv0900_internal *intp = state->internal; in stv0900_dvbs1_acq_workaround() local
1277 intp->result[demod].locked = FALSE; in stv0900_dvbs1_acq_workaround()
1279 if (stv0900_get_bits(intp, HEADER_MODE) == STV0900_DVBS_FOUND) { in stv0900_dvbs1_acq_workaround()
1280 srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_dvbs1_acq_workaround()
1281 srate += stv0900_get_timing_offst(intp, srate, demod); in stv0900_dvbs1_acq_workaround()
1282 if (intp->srch_algo[demod] == STV0900_BLIND_SEARCH) in stv0900_dvbs1_acq_workaround()
1283 stv0900_set_symbol_rate(intp, intp->mclk, srate, demod); in stv0900_dvbs1_acq_workaround()
1287 freq1 = stv0900_read_reg(intp, CFR2); in stv0900_dvbs1_acq_workaround()
1288 freq0 = stv0900_read_reg(intp, CFR1); in stv0900_dvbs1_acq_workaround()
1289 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_dvbs1_acq_workaround()
1290 stv0900_write_bits(intp, SPECINV_CONTROL, in stv0900_dvbs1_acq_workaround()
1292 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_dvbs1_acq_workaround()
1293 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_dvbs1_acq_workaround()
1294 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_dvbs1_acq_workaround()
1295 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_dvbs1_acq_workaround()
1296 if (stv0900_wait_for_lock(intp, demod, in stv0900_dvbs1_acq_workaround()
1298 intp->result[demod].locked = TRUE; in stv0900_dvbs1_acq_workaround()
1302 stv0900_write_bits(intp, SPECINV_CONTROL, in stv0900_dvbs1_acq_workaround()
1304 stv0900_write_reg(intp, DMDISTATE, 0x1c); in stv0900_dvbs1_acq_workaround()
1305 stv0900_write_reg(intp, CFRINIT1, freq1); in stv0900_dvbs1_acq_workaround()
1306 stv0900_write_reg(intp, CFRINIT0, freq0); in stv0900_dvbs1_acq_workaround()
1307 stv0900_write_reg(intp, DMDISTATE, 0x18); in stv0900_dvbs1_acq_workaround()
1308 if (stv0900_wait_for_lock(intp, demod, in stv0900_dvbs1_acq_workaround()
1310 intp->result[demod].locked = TRUE; in stv0900_dvbs1_acq_workaround()
1318 intp->result[demod].locked = FALSE; in stv0900_dvbs1_acq_workaround()
1323 static u16 stv0900_blind_check_agc2_min_level(struct stv0900_internal *intp, in stv0900_blind_check_agc2_min_level() argument
1334 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_blind_check_agc2_min_level()
1335 stv0900_write_bits(intp, SCAN_ENABLE, 0); in stv0900_blind_check_agc2_min_level()
1336 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_blind_check_agc2_min_level()
1338 stv0900_write_bits(intp, AUTO_GUP, 1); in stv0900_blind_check_agc2_min_level()
1339 stv0900_write_bits(intp, AUTO_GLOW, 1); in stv0900_blind_check_agc2_min_level()
1341 stv0900_write_reg(intp, DMDT0M, 0x0); in stv0900_blind_check_agc2_min_level()
1343 stv0900_set_symbol_rate(intp, intp->mclk, 1000000, demod); in stv0900_blind_check_agc2_min_level()
1344 nb_steps = -1 + (intp->srch_range[demod] / 1000000); in stv0900_blind_check_agc2_min_level()
1353 freq_step = (1000000 << 8) / (intp->mclk >> 8); in stv0900_blind_check_agc2_min_level()
1364 stv0900_write_reg(intp, DMDISTATE, 0x5C); in stv0900_blind_check_agc2_min_level()
1365 stv0900_write_reg(intp, CFRINIT1, (init_freq >> 8) & 0xff); in stv0900_blind_check_agc2_min_level()
1366 stv0900_write_reg(intp, CFRINIT0, init_freq & 0xff); in stv0900_blind_check_agc2_min_level()
1367 stv0900_write_reg(intp, DMDISTATE, 0x58); in stv0900_blind_check_agc2_min_level()
1372 agc2level += (stv0900_read_reg(intp, AGC2I1) << 8) in stv0900_blind_check_agc2_min_level()
1373 | stv0900_read_reg(intp, AGC2I0); in stv0900_blind_check_agc2_min_level()
1388 struct stv0900_internal *intp = state->internal; in stv0900_search_srate_coarse() local
1401 if (intp->chip_id >= 0x30) in stv0900_search_srate_coarse()
1406 stv0900_write_bits(intp, DEMOD_MODE, 0x1f); in stv0900_search_srate_coarse()
1407 stv0900_write_reg(intp, TMGCFG, 0x12); in stv0900_search_srate_coarse()
1408 stv0900_write_reg(intp, TMGTHRISE, 0xf0); in stv0900_search_srate_coarse()
1409 stv0900_write_reg(intp, TMGTHFALL, 0xe0); in stv0900_search_srate_coarse()
1410 stv0900_write_bits(intp, SCAN_ENABLE, 1); in stv0900_search_srate_coarse()
1411 stv0900_write_bits(intp, CFR_AUTOSCAN, 1); in stv0900_search_srate_coarse()
1412 stv0900_write_reg(intp, SFRUP1, 0x83); in stv0900_search_srate_coarse()
1413 stv0900_write_reg(intp, SFRUP0, 0xc0); in stv0900_search_srate_coarse()
1414 stv0900_write_reg(intp, SFRLOW1, 0x82); in stv0900_search_srate_coarse()
1415 stv0900_write_reg(intp, SFRLOW0, 0xa0); in stv0900_search_srate_coarse()
1416 stv0900_write_reg(intp, DMDT0M, 0x0); in stv0900_search_srate_coarse()
1417 stv0900_write_reg(intp, AGC2REF, 0x50); in stv0900_search_srate_coarse()
1419 if (intp->chip_id >= 0x30) { in stv0900_search_srate_coarse()
1420 stv0900_write_reg(intp, CARFREQ, 0x99); in stv0900_search_srate_coarse()
1421 stv0900_write_reg(intp, SFRSTEP, 0x98); in stv0900_search_srate_coarse()
1422 } else if (intp->chip_id >= 0x20) { in stv0900_search_srate_coarse()
1423 stv0900_write_reg(intp, CARFREQ, 0x6a); in stv0900_search_srate_coarse()
1424 stv0900_write_reg(intp, SFRSTEP, 0x95); in stv0900_search_srate_coarse()
1426 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_search_srate_coarse()
1427 stv0900_write_reg(intp, SFRSTEP, 0x73); in stv0900_search_srate_coarse()
1430 if (intp->symbol_rate[demod] <= 2000000) in stv0900_search_srate_coarse()
1432 else if (intp->symbol_rate[demod] <= 5000000) in stv0900_search_srate_coarse()
1434 else if (intp->symbol_rate[demod] <= 12000000) in stv0900_search_srate_coarse()
1439 nb_steps = -1 + ((intp->srch_range[demod] / 1000) / currier_step); in stv0900_search_srate_coarse()
1447 currier_step = (intp->srch_range[demod] / 1000) / 10; in stv0900_search_srate_coarse()
1453 tuner_freq = intp->freq[demod]; in stv0900_search_srate_coarse()
1456 stv0900_write_reg(intp, DMDISTATE, 0x5f); in stv0900_search_srate_coarse()
1457 stv0900_write_bits(intp, DEMOD_MODE, 0); in stv0900_search_srate_coarse()
1462 if (stv0900_get_bits(intp, TMGLOCK_QUALITY) >= 2) in stv0900_search_srate_coarse()
1465 agc2_integr += (stv0900_read_reg(intp, AGC2I1) << 8) | in stv0900_search_srate_coarse()
1466 stv0900_read_reg(intp, AGC2I0); in stv0900_search_srate_coarse()
1470 coarse_srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_search_srate_coarse()
1488 if (intp->tuner_type[demod] == 3) in stv0900_search_srate_coarse()
1489 stv0900_set_tuner_auto(intp, tuner_freq, in stv0900_search_srate_coarse()
1490 intp->bw[demod], demod); in stv0900_search_srate_coarse()
1493 intp->bw[demod]); in stv0900_search_srate_coarse()
1500 coarse_srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_search_srate_coarse()
1508 struct stv0900_internal *intp = state->internal; in stv0900_search_srate_fine() local
1517 coarse_srate = stv0900_get_symbol_rate(intp, intp->mclk, demod); in stv0900_search_srate_fine()
1522 symbmax /= (intp->mclk / 1000); in stv0900_search_srate_fine()
1526 symbmin /= (intp->mclk / 1000); in stv0900_search_srate_fine()
1529 symb /= (intp->mclk / 1000); in stv0900_search_srate_fine()
1533 symbmax /= (intp->mclk / 100); in stv0900_search_srate_fine()
1537 symbmin /= (intp->mclk / 100); in stv0900_search_srate_fine()
1540 symb /= (intp->mclk / 100); in stv0900_search_srate_fine()
1544 coarse_freq = (stv0900_read_reg(intp, CFR2) << 8) in stv0900_search_srate_fine()
1545 | stv0900_read_reg(intp, CFR1); in stv0900_search_srate_fine()
1547 if (symbcomp < intp->symbol_rate[demod]) in stv0900_search_srate_fine()
1550 stv0900_write_reg(intp, DMDISTATE, 0x1f); in stv0900_search_srate_fine()
1551 stv0900_write_reg(intp, TMGCFG2, 0xc1); in stv0900_search_srate_fine()
1552 stv0900_write_reg(intp, TMGTHRISE, 0x20); in stv0900_search_srate_fine()
1553 stv0900_write_reg(intp, TMGTHFALL, 0x00); in stv0900_search_srate_fine()
1554 stv0900_write_reg(intp, TMGCFG, 0xd2); in stv0900_search_srate_fine()
1555 stv0900_write_bits(intp, CFR_AUTOSCAN, 0); in stv0900_search_srate_fine()
1556 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_search_srate_fine()
1558 if (intp->chip_id >= 0x30) in stv0900_search_srate_fine()
1559 stv0900_write_reg(intp, CARFREQ, 0x79); in stv0900_search_srate_fine()
1560 else if (intp->chip_id >= 0x20) in stv0900_search_srate_fine()
1561 stv0900_write_reg(intp, CARFREQ, 0x49); in stv0900_search_srate_fine()
1563 stv0900_write_reg(intp, CARFREQ, 0xed); in stv0900_search_srate_fine()
1565 stv0900_write_reg(intp, SFRUP1, (symbmax >> 8) & 0x7f); in stv0900_search_srate_fine()
1566 stv0900_write_reg(intp, SFRUP0, (symbmax & 0xff)); in stv0900_search_srate_fine()
1568 stv0900_write_reg(intp, SFRLOW1, (symbmin >> 8) & 0x7f); in stv0900_search_srate_fine()
1569 stv0900_write_reg(intp, SFRLOW0, (symbmin & 0xff)); in stv0900_search_srate_fine()
1571 stv0900_write_reg(intp, SFRINIT1, (symb >> 8) & 0xff); in stv0900_search_srate_fine()
1572 stv0900_write_reg(intp, SFRINIT0, (symb & 0xff)); in stv0900_search_srate_fine()
1574 stv0900_write_reg(intp, DMDT0M, 0x20); in stv0900_search_srate_fine()
1575 stv0900_write_reg(intp, CFRINIT1, (coarse_freq >> 8) & 0xff); in stv0900_search_srate_fine()
1576 stv0900_write_reg(intp, CFRINIT0, coarse_freq & 0xff); in stv0900_search_srate_fine()
1577 stv0900_write_reg(intp, DMDISTATE, 0x15); in stv0900_search_srate_fine()
1586 struct stv0900_internal *intp = state->internal; in stv0900_blind_search_algo() local
1605 if (intp->chip_id < 0x20) { in stv0900_blind_search_algo()
1613 if (intp->chip_id <= 0x20) in stv0900_blind_search_algo()
1618 agc2_int = stv0900_blind_check_agc2_min_level(intp, demod); in stv0900_blind_search_algo()
1624 if (intp->chip_id == 0x10) in stv0900_blind_search_algo()
1625 stv0900_write_reg(intp, CORRELEXP, 0xaa); in stv0900_blind_search_algo()
1627 if (intp->chip_id < 0x20) in stv0900_blind_search_algo()
1628 stv0900_write_reg(intp, CARHDR, 0x55); in stv0900_blind_search_algo()
1630 stv0900_write_reg(intp, CARHDR, 0x20); in stv0900_blind_search_algo()
1632 if (intp->chip_id <= 0x20) in stv0900_blind_search_algo()
1633 stv0900_write_reg(intp, CARCFG, 0xc4); in stv0900_blind_search_algo()
1635 stv0900_write_reg(intp, CARCFG, 0x6); in stv0900_blind_search_algo()
1637 stv0900_write_reg(intp, RTCS2, 0x44); in stv0900_blind_search_algo()
1639 if (intp->chip_id >= 0x20) { in stv0900_blind_search_algo()
1640 stv0900_write_reg(intp, EQUALCFG, 0x41); in stv0900_blind_search_algo()
1641 stv0900_write_reg(intp, FFECFG, 0x41); in stv0900_blind_search_algo()
1642 stv0900_write_reg(intp, VITSCALE, 0x82); in stv0900_blind_search_algo()
1643 stv0900_write_reg(intp, VAVSRVIT, 0x0); in stv0900_blind_search_algo()
1649 stv0900_write_reg(intp, KREFTMG, k_ref_tmg); in stv0900_blind_search_algo()
1658 lock = stv0900_get_demod_lock(intp, in stv0900_blind_search_algo()
1668 agc2_int = (stv0900_read_reg(intp, AGC2I1) << 8) in stv0900_blind_search_algo()
1669 | stv0900_read_reg(intp, AGC2I0); in stv0900_blind_search_algo()
1674 dstatus2 = stv0900_read_reg(intp, DSTATUS2); in stv0900_blind_search_algo()
1694 static void stv0900_set_viterbi_acq(struct stv0900_internal *intp, in stv0900_set_viterbi_acq() argument
1701 stv0900_write_reg(intp, vth_reg++, 0x96); in stv0900_set_viterbi_acq()
1702 stv0900_write_reg(intp, vth_reg++, 0x64); in stv0900_set_viterbi_acq()
1703 stv0900_write_reg(intp, vth_reg++, 0x36); in stv0900_set_viterbi_acq()
1704 stv0900_write_reg(intp, vth_reg++, 0x23); in stv0900_set_viterbi_acq()
1705 stv0900_write_reg(intp, vth_reg++, 0x1e); in stv0900_set_viterbi_acq()
1706 stv0900_write_reg(intp, vth_reg++, 0x19); in stv0900_set_viterbi_acq()
1709 static void stv0900_set_search_standard(struct stv0900_internal *intp, in stv0900_set_search_standard() argument
1715 switch (intp->srch_standard[demod]) { in stv0900_set_search_standard()
1731 switch (intp->srch_standard[demod]) { in stv0900_set_search_standard()
1734 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_set_search_standard()
1735 stv0900_write_bits(intp, DVBS2_ENABLE, 0); in stv0900_set_search_standard()
1736 stv0900_write_bits(intp, STOP_CLKVIT, 0); in stv0900_set_search_standard()
1737 stv0900_set_dvbs1_track_car_loop(intp, in stv0900_set_search_standard()
1739 intp->symbol_rate[demod]); in stv0900_set_search_standard()
1740 stv0900_write_reg(intp, CAR2CFG, 0x22); in stv0900_set_search_standard()
1742 stv0900_set_viterbi_acq(intp, demod); in stv0900_set_search_standard()
1743 stv0900_set_viterbi_standard(intp, in stv0900_set_search_standard()
1744 intp->srch_standard[demod], in stv0900_set_search_standard()
1745 intp->fec[demod], demod); in stv0900_set_search_standard()
1749 stv0900_write_bits(intp, DVBS1_ENABLE, 0); in stv0900_set_search_standard()
1750 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_set_search_standard()
1751 stv0900_write_bits(intp, STOP_CLKVIT, 1); in stv0900_set_search_standard()
1752 stv0900_write_reg(intp, ACLC, 0x1a); in stv0900_set_search_standard()
1753 stv0900_write_reg(intp, BCLC, 0x09); in stv0900_set_search_standard()
1754 if (intp->chip_id <= 0x20) /*cut 1.x and 2.0*/ in stv0900_set_search_standard()
1755 stv0900_write_reg(intp, CAR2CFG, 0x26); in stv0900_set_search_standard()
1757 stv0900_write_reg(intp, CAR2CFG, 0x66); in stv0900_set_search_standard()
1759 if (intp->demod_mode != STV0900_SINGLE) { in stv0900_set_search_standard()
1760 if (intp->chip_id <= 0x11) in stv0900_set_search_standard()
1761 stv0900_stop_all_s2_modcod(intp, demod); in stv0900_set_search_standard()
1763 stv0900_activate_s2_modcod(intp, demod); in stv0900_set_search_standard()
1766 stv0900_activate_s2_modcod_single(intp, demod); in stv0900_set_search_standard()
1768 stv0900_set_viterbi_tracq(intp, demod); in stv0900_set_search_standard()
1773 stv0900_write_bits(intp, DVBS1_ENABLE, 1); in stv0900_set_search_standard()
1774 stv0900_write_bits(intp, DVBS2_ENABLE, 1); in stv0900_set_search_standard()
1775 stv0900_write_bits(intp, STOP_CLKVIT, 0); in stv0900_set_search_standard()
1776 stv0900_write_reg(intp, ACLC, 0x1a); in stv0900_set_search_standard()
1777 stv0900_write_reg(intp, BCLC, 0x09); in stv0900_set_search_standard()
1778 stv0900_set_dvbs1_track_car_loop(intp, in stv0900_set_search_standard()
1780 intp->symbol_rate[demod]); in stv0900_set_search_standard()
1781 if (intp->chip_id <= 0x20) /*cut 1.x and 2.0*/ in stv0900_set_search_standard()
1782 stv0900_write_reg(intp, CAR2CFG, 0x26); in stv0900_set_search_standard()
1784 stv0900_write_reg(intp, CAR2CFG, 0x66); in stv0900_set_search_standard()
1786 if (intp->demod_mode != STV0900_SINGLE) { in stv0900_set_search_standard()
1787 if (intp->chip_id <= 0x11) in stv0900_set_search_standard()
1788 stv0900_stop_all_s2_modcod(intp, demod); in stv0900_set_search_standard()
1790 stv0900_activate_s2_modcod(intp, demod); in stv0900_set_search_standard()
1793 stv0900_activate_s2_modcod_single(intp, demod); in stv0900_set_search_standard()
1795 stv0900_set_viterbi_tracq(intp, demod); in stv0900_set_search_standard()
1796 stv0900_set_viterbi_standard(intp, in stv0900_set_search_standard()
1797 intp->srch_standard[demod], in stv0900_set_search_standard()
1798 intp->fec[demod], demod); in stv0900_set_search_standard()
1807 struct stv0900_internal *intp = state->internal; in stv0900_algo() local
1821 algo = intp->srch_algo[demod]; in stv0900_algo()
1822 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1823 stv0900_write_reg(intp, DMDISTATE, 0x5c); in stv0900_algo()
1824 if (intp->chip_id >= 0x20) { in stv0900_algo()
1825 if (intp->symbol_rate[demod] > 5000000) in stv0900_algo()
1826 stv0900_write_reg(intp, CORRELABS, 0x9e); in stv0900_algo()
1828 stv0900_write_reg(intp, CORRELABS, 0x82); in stv0900_algo()
1830 stv0900_write_reg(intp, CORRELABS, 0x88); in stv0900_algo()
1833 intp->symbol_rate[demod], in stv0900_algo()
1834 intp->srch_algo[demod]); in stv0900_algo()
1836 if (intp->srch_algo[demod] == STV0900_BLIND_SEARCH) { in stv0900_algo()
1837 intp->bw[demod] = 2 * 36000000; in stv0900_algo()
1839 stv0900_write_reg(intp, TMGCFG2, 0xc0); in stv0900_algo()
1840 stv0900_write_reg(intp, CORRELMANT, 0x70); in stv0900_algo()
1842 stv0900_set_symbol_rate(intp, intp->mclk, 1000000, demod); in stv0900_algo()
1844 stv0900_write_reg(intp, DMDT0M, 0x20); in stv0900_algo()
1845 stv0900_write_reg(intp, TMGCFG, 0xd2); in stv0900_algo()
1847 if (intp->symbol_rate[demod] < 2000000) in stv0900_algo()
1848 stv0900_write_reg(intp, CORRELMANT, 0x63); in stv0900_algo()
1850 stv0900_write_reg(intp, CORRELMANT, 0x70); in stv0900_algo()
1852 stv0900_write_reg(intp, AGC2REF, 0x38); in stv0900_algo()
1854 intp->bw[demod] = in stv0900_algo()
1855 stv0900_carrier_width(intp->symbol_rate[demod], in stv0900_algo()
1856 intp->rolloff); in stv0900_algo()
1857 if (intp->chip_id >= 0x20) { in stv0900_algo()
1858 stv0900_write_reg(intp, KREFTMG, 0x5a); in stv0900_algo()
1860 if (intp->srch_algo[demod] == STV0900_COLD_START) { in stv0900_algo()
1861 intp->bw[demod] += 10000000; in stv0900_algo()
1862 intp->bw[demod] *= 15; in stv0900_algo()
1863 intp->bw[demod] /= 10; in stv0900_algo()
1864 } else if (intp->srch_algo[demod] == STV0900_WARM_START) in stv0900_algo()
1865 intp->bw[demod] += 10000000; in stv0900_algo()
1868 stv0900_write_reg(intp, KREFTMG, 0xc1); in stv0900_algo()
1869 intp->bw[demod] += 10000000; in stv0900_algo()
1870 intp->bw[demod] *= 15; in stv0900_algo()
1871 intp->bw[demod] /= 10; in stv0900_algo()
1874 stv0900_write_reg(intp, TMGCFG2, 0xc1); in stv0900_algo()
1876 stv0900_set_symbol_rate(intp, intp->mclk, in stv0900_algo()
1877 intp->symbol_rate[demod], demod); in stv0900_algo()
1878 stv0900_set_max_symbol_rate(intp, intp->mclk, in stv0900_algo()
1879 intp->symbol_rate[demod], demod); in stv0900_algo()
1880 stv0900_set_min_symbol_rate(intp, intp->mclk, in stv0900_algo()
1881 intp->symbol_rate[demod], demod); in stv0900_algo()
1882 if (intp->symbol_rate[demod] >= 10000000) in stv0900_algo()
1889 if (intp->tuner_type[demod] == 3) in stv0900_algo()
1890 stv0900_set_tuner_auto(intp, intp->freq[demod], in stv0900_algo()
1891 intp->bw[demod], demod); in stv0900_algo()
1893 stv0900_set_tuner(fe, intp->freq[demod], intp->bw[demod]); in stv0900_algo()
1895 agc1_power = MAKEWORD(stv0900_get_bits(intp, AGCIQ_VALUE1), in stv0900_algo()
1896 stv0900_get_bits(intp, AGCIQ_VALUE0)); in stv0900_algo()
1902 aq_power += (stv0900_get_bits(intp, POWER_I) + in stv0900_algo()
1903 stv0900_get_bits(intp, POWER_Q)) / 2; in stv0900_algo()
1909 intp->result[demod].locked = FALSE; in stv0900_algo()
1913 stv0900_write_bits(intp, SPECINV_CONTROL, in stv0900_algo()
1914 intp->srch_iq_inv[demod]); in stv0900_algo()
1915 if (intp->chip_id <= 0x20) /*cut 2.0*/ in stv0900_algo()
1916 stv0900_write_bits(intp, MANUALSX_ROLLOFF, 1); in stv0900_algo()
1918 stv0900_write_bits(intp, MANUALS2_ROLLOFF, 1); in stv0900_algo()
1920 stv0900_set_search_standard(intp, demod); in stv0900_algo()
1922 if (intp->srch_algo[demod] != STV0900_BLIND_SEARCH) in stv0900_algo()
1923 stv0900_start_search(intp, demod); in stv0900_algo()
1929 if (intp->chip_id == 0x12) { in stv0900_algo()
1930 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1932 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1933 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1941 lock = stv0900_get_demod_lock(intp, demod, demod_timeout); in stv0900_algo()
1945 if (stv0900_check_timing_lock(intp, demod) == TRUE) in stv0900_algo()
1946 lock = stv0900_sw_algo(intp, demod); in stv0900_algo()
1955 if (intp->chip_id <= 0x11) { in stv0900_algo()
1961 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1963 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1965 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1966 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1969 } else if (intp->chip_id >= 0x20) { in stv0900_algo()
1970 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1972 stv0900_write_bits(intp, RST_HWARE, 1); in stv0900_algo()
1973 stv0900_write_bits(intp, RST_HWARE, 0); in stv0900_algo()
1976 if (stv0900_wait_for_lock(intp, demod, in stv0900_algo()
1979 intp->result[demod].locked = TRUE; in stv0900_algo()
1980 if (intp->result[demod].standard == in stv0900_algo()
1982 stv0900_set_dvbs2_rolloff(intp, demod); in stv0900_algo()
1983 stv0900_write_bits(intp, RESET_UPKO_COUNT, 1); in stv0900_algo()
1984 stv0900_write_bits(intp, RESET_UPKO_COUNT, 0); in stv0900_algo()
1985 stv0900_write_reg(intp, ERRCTRL1, 0x67); in stv0900_algo()
1987 stv0900_write_reg(intp, ERRCTRL1, 0x75); in stv0900_algo()
1990 stv0900_write_reg(intp, FBERCPT4, 0); in stv0900_algo()
1991 stv0900_write_reg(intp, ERRCTRL2, 0xc1); in stv0900_algo()
1995 no_signal = stv0900_check_signal_presence(intp, demod); in stv0900_algo()
1997 intp->result[demod].locked = FALSE; in stv0900_algo()
2004 if (intp->chip_id > 0x11) { in stv0900_algo()
2005 intp->result[demod].locked = FALSE; in stv0900_algo()
2009 if ((stv0900_get_bits(intp, HEADER_MODE) == STV0900_DVBS_FOUND) && in stv0900_algo()
2010 (intp->srch_iq_inv[demod] <= STV0900_IQ_AUTO_NORMAL_FIRST)) in stv0900_algo()