45 	struct a37xx_mbox *mbox = chan->con_priv;  in a37xx_mbox_receive()  local
49 	rx_msg.retval = readl(mbox->base + RWTM_MBOX_RETURN_STATUS);  in a37xx_mbox_receive()
51 		rx_msg.status[i] = readl(mbox->base + RWTM_MBOX_STATUS(i));  in a37xx_mbox_receive()
59 	struct a37xx_mbox *mbox = chan->con_priv;  in a37xx_mbox_irq_handler()  local
62 	reg = readl(mbox->base + RWTM_HOST_INT_RESET);  in a37xx_mbox_irq_handler()
68 		dev_err(mbox->dev, "Secure processor command queue full\n");  in a37xx_mbox_irq_handler()
70 	writel(reg, mbox->base + RWTM_HOST_INT_RESET);  in a37xx_mbox_irq_handler()
79 	struct a37xx_mbox *mbox = chan->con_priv;  in a37xx_mbox_send_data()  local
87 	reg = readl(mbox->base + RWTM_MBOX_FIFO_STATUS);  in a37xx_mbox_send_data()
89 		dev_warn(mbox->dev, "Secure processor not ready\n");  in a37xx_mbox_send_data()
92 		dev_err(mbox->dev, "Secure processor command queue full\n");  in a37xx_mbox_send_data()
97 		writel(msg->args[i], mbox->base + RWTM_MBOX_PARAM(i));  in a37xx_mbox_send_data()
98 	writel(msg->command, mbox->base + RWTM_MBOX_COMMAND);  in a37xx_mbox_send_data()
105 	struct a37xx_mbox *mbox = chan->con_priv;  in a37xx_mbox_startup()  local
109 	ret = devm_request_irq(mbox->dev, mbox->irq, a37xx_mbox_irq_handler, 0,  in a37xx_mbox_startup()
112 		dev_err(mbox->dev, "Cannot request irq\n");  in a37xx_mbox_startup()
117 	reg = readl(mbox->base + RWTM_HOST_INT_MASK);  in a37xx_mbox_startup()
119 	writel(reg, mbox->base + RWTM_HOST_INT_MASK);  in a37xx_mbox_startup()
127 	struct a37xx_mbox *mbox = chan->con_priv;  in a37xx_mbox_shutdown()  local
130 	reg = readl(mbox->base + RWTM_HOST_INT_MASK);  in a37xx_mbox_shutdown()
132 	writel(reg, mbox->base + RWTM_HOST_INT_MASK);  in a37xx_mbox_shutdown()
134 	devm_free_irq(mbox->dev, mbox->irq, chan);  in a37xx_mbox_shutdown()
145 	struct a37xx_mbox *mbox;  in armada_37xx_mbox_probe()  local
149 	mbox = devm_kzalloc(&pdev->dev, sizeof(*mbox), GFP_KERNEL);  in armada_37xx_mbox_probe()
150 	if (!mbox)  in armada_37xx_mbox_probe()
158 	mbox->base = devm_platform_ioremap_resource(pdev, 0);  in armada_37xx_mbox_probe()
159 	if (IS_ERR(mbox->base))  in armada_37xx_mbox_probe()
160 		return PTR_ERR(mbox->base);  in armada_37xx_mbox_probe()
162 	mbox->irq = platform_get_irq(pdev, 0);  in armada_37xx_mbox_probe()
163 	if (mbox->irq < 0)  in armada_37xx_mbox_probe()
164 		return mbox->irq;  in armada_37xx_mbox_probe()
166 	mbox->dev = &pdev->dev;  in armada_37xx_mbox_probe()
169 	chans[0].con_priv = mbox;  in armada_37xx_mbox_probe()
170 	mbox->controller.dev = mbox->dev;  in armada_37xx_mbox_probe()
171 	mbox->controller.num_chans = 1;  in armada_37xx_mbox_probe()
172 	mbox->controller.chans = chans;  in armada_37xx_mbox_probe()
173 	mbox->controller.ops = &a37xx_mbox_ops;  in armada_37xx_mbox_probe()
174 	mbox->controller.txdone_irq = true;  in armada_37xx_mbox_probe()
176 	ret = devm_mbox_controller_register(mbox->dev, &mbox->controller);  in armada_37xx_mbox_probe()
182 	platform_set_drvdata(pdev, mbox);  in armada_37xx_mbox_probe()