Lines Matching refs:isar
37 waitforHIA(struct isar_hw *isar, int timeout) in waitforHIA() argument
40 u8 val = isar->read_reg(isar->hw, ISAR_HIA); in waitforHIA()
45 val = isar->read_reg(isar->hw, ISAR_HIA); in waitforHIA()
47 pr_debug("%s: HIA after %dus\n", isar->name, timeout - t); in waitforHIA()
56 send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg) in send_mbox() argument
58 if (!waitforHIA(isar, 1000)) in send_mbox()
61 isar->write_reg(isar->hw, ISAR_CTRL_H, creg); in send_mbox()
62 isar->write_reg(isar->hw, ISAR_CTRL_L, len); in send_mbox()
63 isar->write_reg(isar->hw, ISAR_WADR, 0); in send_mbox()
65 msg = isar->buf; in send_mbox()
67 isar->write_fifo(isar->hw, ISAR_MBOX, msg, len); in send_mbox()
68 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { in send_mbox()
73 isar->log, 256, 1); in send_mbox()
74 pr_debug("%s: %s %02x: %s\n", isar->name, in send_mbox()
75 __func__, l, isar->log); in send_mbox()
80 isar->write_reg(isar->hw, ISAR_HIS, his); in send_mbox()
81 waitforHIA(isar, 1000); in send_mbox()
90 rcv_mbox(struct isar_hw *isar, u8 *msg) in rcv_mbox() argument
93 msg = isar->buf; in rcv_mbox()
94 isar->write_reg(isar->hw, ISAR_RADR, 0); in rcv_mbox()
95 if (msg && isar->clsb) { in rcv_mbox()
96 isar->read_fifo(isar->hw, ISAR_MBOX, msg, isar->clsb); in rcv_mbox()
97 if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) { in rcv_mbox()
100 while (l < (int)isar->clsb) { in rcv_mbox()
101 hex_dump_to_buffer(msg + l, isar->clsb - l, 32, in rcv_mbox()
102 1, isar->log, 256, 1); in rcv_mbox()
103 pr_debug("%s: %s %02x: %s\n", isar->name, in rcv_mbox()
104 __func__, l, isar->log); in rcv_mbox()
109 isar->write_reg(isar->hw, ISAR_IIA, 0); in rcv_mbox()
113 get_irq_infos(struct isar_hw *isar) in get_irq_infos() argument
115 isar->iis = isar->read_reg(isar->hw, ISAR_IIS); in get_irq_infos()
116 isar->cmsb = isar->read_reg(isar->hw, ISAR_CTRL_H); in get_irq_infos()
117 isar->clsb = isar->read_reg(isar->hw, ISAR_CTRL_L); in get_irq_infos()
118 pr_debug("%s: rcv_mbox(%02x,%02x,%d)\n", isar->name, in get_irq_infos()
119 isar->iis, isar->cmsb, isar->clsb); in get_irq_infos()
128 poll_mbox(struct isar_hw *isar, int maxdelay) in poll_mbox() argument
133 irq = isar->read_reg(isar->hw, ISAR_IRQBIT); in poll_mbox()
139 get_irq_infos(isar); in poll_mbox()
140 rcv_mbox(isar, NULL); in poll_mbox()
143 isar->name, isar->clsb, maxdelay - t); in poll_mbox()
148 ISARVersion(struct isar_hw *isar) in ISARVersion() argument
153 isar->write_reg(isar->hw, ISAR_IRQBIT, 0); in ISARVersion()
154 isar->buf[0] = ISAR_MSG_HWVER; in ISARVersion()
155 isar->buf[1] = 0; in ISARVersion()
156 isar->buf[2] = 1; in ISARVersion()
157 if (!send_mbox(isar, ISAR_HIS_VNR, 0, 3, NULL)) in ISARVersion()
159 if (!poll_mbox(isar, 1000)) in ISARVersion()
161 if (isar->iis == ISAR_IIS_VNR) { in ISARVersion()
162 if (isar->clsb == 1) { in ISARVersion()
163 ver = isar->buf[0] & 0xf; in ISARVersion()
172 load_firmware(struct isar_hw *isar, const u8 *buf, int size) in load_firmware() argument
174 u32 saved_debug = isar->ch[0].bch.debug; in load_firmware()
187 if (1 != isar->version) { in load_firmware()
189 isar->name, isar->version); in load_firmware()
193 isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO; in load_firmware()
195 isar->name, size / 2, size); in load_firmware()
199 spin_lock_irqsave(isar->hwlock, flags); in load_firmware()
200 isar->write_reg(isar->hw, ISAR_IRQBIT, 0); in load_firmware()
201 spin_unlock_irqrestore(isar->hwlock, flags); in load_firmware()
212 isar->name, size, cnt + left); in load_firmware()
216 spin_lock_irqsave(isar->hwlock, flags); in load_firmware()
217 if (!send_mbox(isar, ISAR_HIS_DKEY, blk_head.d_key & 0xff, in load_firmware()
223 if (!poll_mbox(isar, 1000)) { in load_firmware()
228 spin_unlock_irqrestore(isar->hwlock, flags); in load_firmware()
229 if ((isar->iis != ISAR_IIS_DKEY) || isar->cmsb || isar->clsb) { in load_firmware()
231 isar->iis, isar->cmsb, isar->clsb); in load_firmware()
241 mp = isar->buf; in load_firmware()
248 pr_debug("%s: load %3d words at %04x\n", isar->name, in load_firmware()
257 spin_lock_irqsave(isar->hwlock, flags); in load_firmware()
258 if (!send_mbox(isar, ISAR_HIS_FIRM, 0, nom, NULL)) { in load_firmware()
263 if (!poll_mbox(isar, 1000)) { in load_firmware()
268 spin_unlock_irqrestore(isar->hwlock, flags); in load_firmware()
269 if ((isar->iis != ISAR_IIS_FIRM) || in load_firmware()
270 isar->cmsb || isar->clsb) { in load_firmware()
272 isar->iis, isar->cmsb, isar->clsb); in load_firmware()
278 isar->name, blk_head.len); in load_firmware()
280 isar->ch[0].bch.debug = saved_debug; in load_firmware()
285 isar->buf[0] = 0xff; in load_firmware()
286 isar->buf[1] = 0xfe; in load_firmware()
287 isar->bstat = 0; in load_firmware()
288 spin_lock_irqsave(isar->hwlock, flags); in load_firmware()
289 if (!send_mbox(isar, ISAR_HIS_STDSP, 0, 2, NULL)) { in load_firmware()
294 if (!poll_mbox(isar, 1000)) { in load_firmware()
299 if ((isar->iis != ISAR_IIS_STDSP) || isar->cmsb || isar->clsb) { in load_firmware()
301 isar->iis, isar->cmsb, isar->clsb); in load_firmware()
305 pr_debug("%s: ISAR start dsp success\n", isar->name); in load_firmware()
309 isar->write_reg(isar->hw, ISAR_IRQBIT, ISAR_IRQSTA); in load_firmware()
310 spin_unlock_irqrestore(isar->hwlock, flags); in load_firmware()
312 while ((!isar->bstat) && cnt) { in load_firmware()
322 isar->name, isar->bstat); in load_firmware()
327 isar->iis = 0; in load_firmware()
328 spin_lock_irqsave(isar->hwlock, flags); in load_firmware()
329 if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) { in load_firmware()
334 spin_unlock_irqrestore(isar->hwlock, flags); in load_firmware()
336 while ((isar->iis != ISAR_IIS_DIAG) && cnt) { in load_firmware()
346 if ((isar->cmsb == ISAR_CTRL_STST) && (isar->clsb == 1) in load_firmware()
347 && (isar->buf[0] == 0)) in load_firmware()
348 pr_debug("%s: ISAR selftest OK\n", isar->name); in load_firmware()
351 isar->cmsb, isar->clsb, isar->buf[0]); in load_firmware()
355 spin_lock_irqsave(isar->hwlock, flags); in load_firmware()
356 isar->iis = 0; in load_firmware()
357 if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) { in load_firmware()
362 spin_unlock_irqrestore(isar->hwlock, flags); in load_firmware()
364 while ((isar->iis != ISAR_IIS_DIAG) && cnt) { in load_firmware()
374 if ((isar->cmsb == ISAR_CTRL_SWVER) && (isar->clsb == 1)) { in load_firmware()
376 isar->name, isar->buf[0]); in load_firmware()
379 " cnt(%d)\n", isar->name, isar->cmsb, in load_firmware()
380 isar->clsb, cnt); in load_firmware()
385 spin_lock_irqsave(isar->hwlock, flags); in load_firmware()
386 isar_setup(isar); in load_firmware()
387 spin_unlock_irqrestore(isar->hwlock, flags); in load_firmware()
390 spin_lock_irqsave(isar->hwlock, flags); in load_firmware()
392 isar->ch[0].bch.debug = saved_debug; in load_firmware()
395 isar->write_reg(isar->hw, ISAR_IRQBIT, 0); in load_firmware()
396 spin_unlock_irqrestore(isar->hwlock, flags); in load_firmware()
659 sel_bch_isar(struct isar_hw *isar, u8 dpath) in sel_bch_isar() argument
661 struct isar_ch *base = &isar->ch[0]; in sel_bch_isar()
719 check_send(struct isar_hw *isar, u8 rdm) in check_send() argument
723 pr_debug("%s: rdm %x\n", isar->name, rdm); in check_send()
725 ch = sel_bch_isar(isar, 1); in check_send()
735 ch = sel_bch_isar(isar, 2); in check_send()
1036 mISDNisar_irq(struct isar_hw *isar) in mISDNisar_irq() argument
1040 get_irq_infos(isar); in mISDNisar_irq()
1041 switch (isar->iis & ISAR_IIS_MSCMSD) { in mISDNisar_irq()
1043 ch = sel_bch_isar(isar, isar->iis >> 6); in mISDNisar_irq()
1048 isar->name, isar->iis, isar->cmsb, in mISDNisar_irq()
1049 isar->clsb); in mISDNisar_irq()
1050 isar->write_reg(isar->hw, ISAR_IIA, 0); in mISDNisar_irq()
1054 isar->write_reg(isar->hw, ISAR_IIA, 0); in mISDNisar_irq()
1055 isar->bstat |= isar->cmsb; in mISDNisar_irq()
1056 check_send(isar, isar->cmsb); in mISDNisar_irq()
1060 ch = sel_bch_isar(isar, isar->iis >> 6); in mISDNisar_irq()
1062 if (isar->cmsb == BSTEV_TBO) in mISDNisar_irq()
1064 if (isar->cmsb == BSTEV_RBO) in mISDNisar_irq()
1069 isar->name, isar->iis >> 6, isar->cmsb); in mISDNisar_irq()
1070 isar->write_reg(isar->hw, ISAR_IIA, 0); in mISDNisar_irq()
1073 ch = sel_bch_isar(isar, isar->iis >> 6); in mISDNisar_irq()
1075 rcv_mbox(isar, NULL); in mISDNisar_irq()
1077 isar_pump_statev_modem(ch, isar->cmsb); in mISDNisar_irq()
1079 isar_pump_statev_fax(ch, isar->cmsb); in mISDNisar_irq()
1082 tt = isar->cmsb | 0x30; in mISDNisar_irq()
1095 isar->name, ch->bch.state, in mISDNisar_irq()
1096 isar->cmsb); in mISDNisar_irq()
1099 isar->name, isar->iis, isar->cmsb, in mISDNisar_irq()
1100 isar->clsb); in mISDNisar_irq()
1101 isar->write_reg(isar->hw, ISAR_IIA, 0); in mISDNisar_irq()
1105 ch = sel_bch_isar(isar, isar->iis >> 6); in mISDNisar_irq()
1107 rcv_mbox(isar, NULL); in mISDNisar_irq()
1111 isar->name, isar->iis, isar->cmsb, in mISDNisar_irq()
1112 isar->clsb); in mISDNisar_irq()
1113 isar->write_reg(isar->hw, ISAR_IIA, 0); in mISDNisar_irq()
1119 rcv_mbox(isar, NULL); in mISDNisar_irq()
1122 rcv_mbox(isar, NULL); in mISDNisar_irq()
1123 pr_debug("%s: invalid msg his:%x\n", isar->name, isar->cmsb); in mISDNisar_irq()
1126 rcv_mbox(isar, NULL); in mISDNisar_irq()
1128 isar->name, isar->iis, isar->cmsb, isar->clsb); in mISDNisar_irq()
1447 isar_setup(struct isar_hw *isar) in isar_setup() argument
1456 send_mbox(isar, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) | in isar_setup()
1458 isar->ch[i].mml = msg; in isar_setup()
1459 isar->ch[i].bch.state = 0; in isar_setup()
1460 isar->ch[i].dpath = i + 1; in isar_setup()
1461 modeisar(&isar->ch[i], ISDN_P_NONE); in isar_setup()
1601 free_isar(struct isar_hw *isar) in free_isar() argument
1603 modeisar(&isar->ch[0], ISDN_P_NONE); in free_isar()
1604 modeisar(&isar->ch[1], ISDN_P_NONE); in free_isar()
1605 del_timer(&isar->ch[0].ftimer); in free_isar()
1606 del_timer(&isar->ch[1].ftimer); in free_isar()
1607 test_and_clear_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags); in free_isar()
1608 test_and_clear_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags); in free_isar()
1612 init_isar(struct isar_hw *isar) in init_isar() argument
1617 isar->version = ISARVersion(isar); in init_isar()
1618 if (isar->ch[0].bch.debug & DEBUG_HW) in init_isar()
1620 isar->name, isar->version, 3 - cnt); in init_isar()
1621 if (isar->version == 1) in init_isar()
1623 isar->ctrl(isar->hw, HW_RESET_REQ, 0); in init_isar()
1625 if (isar->version != 1) in init_isar()
1627 timer_setup(&isar->ch[0].ftimer, ftimer_handler, 0); in init_isar()
1628 test_and_set_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags); in init_isar()
1629 timer_setup(&isar->ch[1].ftimer, ftimer_handler, 0); in init_isar()
1630 test_and_set_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags); in init_isar()
1635 isar_open(struct isar_hw *isar, struct channel_req *rq) in isar_open() argument
1643 bch = &isar->ch[rq->adr.channel - 1].bch; in isar_open()
1652 mISDNisar_init(struct isar_hw *isar, void *hw) in mISDNisar_init() argument
1656 isar->hw = hw; in mISDNisar_init()
1658 isar->ch[i].bch.nr = i + 1; in mISDNisar_init()
1659 mISDN_initbchannel(&isar->ch[i].bch, MAX_DATA_MEM, 32); in mISDNisar_init()
1660 isar->ch[i].bch.ch.nr = i + 1; in mISDNisar_init()
1661 isar->ch[i].bch.ch.send = &isar_l2l1; in mISDNisar_init()
1662 isar->ch[i].bch.ch.ctrl = isar_bctrl; in mISDNisar_init()
1663 isar->ch[i].bch.hw = hw; in mISDNisar_init()
1664 isar->ch[i].is = isar; in mISDNisar_init()
1667 isar->init = &init_isar; in mISDNisar_init()
1668 isar->release = &free_isar; in mISDNisar_init()
1669 isar->firmware = &load_firmware; in mISDNisar_init()
1670 isar->open = &isar_open; in mISDNisar_init()