1 // SPDX-License-Identifier: GPL-2.0
67 	struct irq_chip_generic *gc = handler->priv->gc;  in liointc_chained_handle_irq()
73 	pending = readl(handler->priv->core_isr[core]);  in liointc_chained_handle_irq()
77 		if (handler->priv->has_lpc_irq_errata &&  in liointc_chained_handle_irq()
78 			(handler->parent_int_map & gc->mask_cache &  in liointc_chained_handle_irq()
88 		generic_handle_domain_irq(gc->domain, bit);  in liointc_chained_handle_irq()
100 		writel(readl(gc->reg_base + offset) | mask,  in liointc_set_bit()
101 				gc->reg_base + offset);  in liointc_set_bit()
103 		writel(readl(gc->reg_base + offset) & ~mask,  in liointc_set_bit()
104 				gc->reg_base + offset);  in liointc_set_bit()
110 	u32 mask = data->mask;  in liointc_set_type()
133 		return -EINVAL;  in liointc_set_type()
143 	struct liointc_priv *priv = gc->private;  in liointc_resume()
149 	writel(0xffffffff, gc->reg_base + LIOINTC_REG_INTC_DISABLE);  in liointc_resume()
152 		writeb(priv->map_cache[i], gc->reg_base + i);  in liointc_resume()
154 	writel(gc->mask_cache, gc->reg_base + LIOINTC_REG_INTC_ENABLE);  in liointc_resume()
167 	if (WARN_ON(intsize < 1))  in liointc_domain_xlate()
168 		return -EINVAL;  in liointc_domain_xlate()
169 	*out_hwirq = intspec[0] - GSI_MIN_CPU_IRQ;  in liointc_domain_xlate()
192 		return -ENOMEM;  in liointc_init()
199 		priv->core_isr[i] = base + LIOINTC_REG_INTC_STATUS;  in liointc_init()
202 		priv->handler[i].parent_int_map = parent_int_map[i];  in liointc_init()
204 	if (revision > 1) {  in liointc_init()
207 					"reg-names", core_reg_names[i]);  in liointc_init()
212 			priv->core_isr[i] = of_iomap(node, index);  in liointc_init()
224 		pr_err("loongson-liointc: cannot add IRQ domain\n");  in liointc_init()
228 	err = irq_alloc_domain_generic_chips(domain, LIOINTC_CHIP_IRQ, 1,  in liointc_init()
229 					(node ? node->full_name : "LIOINTC"),  in liointc_init()
232 		pr_err("loongson-liointc: unable to register IRQ domain\n");  in liointc_init()
244 		u32 pending = priv->handler[i].parent_int_map;  in liointc_init()
249 			priv->map_cache[bit] = BIT(i) << LIOINTC_SHIFT_INTx;  in liointc_init()
256 		priv->map_cache[i] |= BIT(loongson_sysconf.boot_cpu_id);  in liointc_init()
257 		writeb(priv->map_cache[i], base + i);  in liointc_init()
261 	gc->private = priv;  in liointc_init()
262 	gc->reg_base = base;  in liointc_init()
263 	gc->domain = domain;  in liointc_init()
264 	gc->resume = liointc_resume;  in liointc_init()
266 	ct = gc->chip_types;  in liointc_init()
267 	ct->regs.enable = LIOINTC_REG_INTC_ENABLE;  in liointc_init()
268 	ct->regs.disable = LIOINTC_REG_INTC_DISABLE;  in liointc_init()
269 	ct->chip.irq_unmask = irq_gc_unmask_enable_reg;  in liointc_init()
270 	ct->chip.irq_mask = irq_gc_mask_disable_reg;  in liointc_init()
271 	ct->chip.irq_mask_ack = irq_gc_mask_disable_reg;  in liointc_init()
272 	ct->chip.irq_set_type = liointc_set_type;  in liointc_init()
274 	gc->mask_cache = 0;  in liointc_init()
275 	priv->gc = gc;  in liointc_init()
281 		priv->handler[i].priv = priv;  in liointc_init()
283 				liointc_chained_handle_irq, &priv->handler[i]);  in liointc_init()
296 	return -EINVAL;  in liointc_init()
308 	if (!of_device_is_compatible(node, "loongson,liointc-2.0")) {  in liointc_of_init()
310 		revision = 1;  in liointc_of_init()
312 		index = of_property_match_string(node, "reg-names", "main");  in liointc_of_init()
317 		return -EINVAL;  in liointc_of_init()
325 		return -ENODEV;  in liointc_of_init()
333 		pr_err("loongson-liointc: No parent_int_map\n");  in liointc_of_init()
334 		return -ENODEV;  in liointc_of_init()
345 IRQCHIP_DECLARE(loongson_liointc_1_0, "loongson,liointc-1.0", liointc_of_init);
346 IRQCHIP_DECLARE(loongson_liointc_1_0a, "loongson,liointc-1.0a", liointc_of_init);
347 IRQCHIP_DECLARE(loongson_liointc_2_0, "loongson,liointc-2.0", liointc_of_init);
357 	parent_int_map[0] = acpi_liointc->cascade_map[0];  in liointc_acpi_init()
358 	parent_int_map[1] = acpi_liointc->cascade_map[1];  in liointc_acpi_init()
360 	parent_irq[0] = irq_create_mapping(parent, acpi_liointc->cascade[0]);  in liointc_acpi_init()
361 	parent_irq[1] = irq_create_mapping(parent, acpi_liointc->cascade[1]);  in liointc_acpi_init()
363 	domain_handle = irq_domain_alloc_fwnode(&acpi_liointc->address);  in liointc_acpi_init()
366 		return -ENOMEM;  in liointc_acpi_init()
368 	ret = liointc_init(acpi_liointc->address, acpi_liointc->size,  in liointc_acpi_init()
369 			   1, domain_handle, NULL);  in liointc_acpi_init()