1 // SPDX-License-Identifier: GPL-2.0-or-later
3  *  Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
36 	struct ingenic_intc_data *intc = irq_get_handler_data(irq);  in intc_cascade()  local
37 	struct irq_domain *domain = intc->domain;  in intc_cascade()
42 	for (i = 0; i < intc->num_chips; i++) {  in intc_cascade()
63 	struct ingenic_intc_data *intc;  in ingenic_intc_of_init()  local
70 	intc = kzalloc(sizeof(*intc), GFP_KERNEL);  in ingenic_intc_of_init()
71 	if (!intc) {  in ingenic_intc_of_init()
72 		err = -ENOMEM;  in ingenic_intc_of_init()
78 		err = -EINVAL;  in ingenic_intc_of_init()
82 	err = irq_set_handler_data(parent_irq, intc);  in ingenic_intc_of_init()
86 	intc->num_chips = num_chips;  in ingenic_intc_of_init()
87 	intc->base = of_iomap(node, 0);  in ingenic_intc_of_init()
88 	if (!intc->base) {  in ingenic_intc_of_init()
89 		err = -ENODEV;  in ingenic_intc_of_init()
96 		err = -ENOMEM;  in ingenic_intc_of_init()
100 	intc->domain = domain;  in ingenic_intc_of_init()
102 	err = irq_alloc_domain_generic_chips(domain, 32, 1, "INTC",  in ingenic_intc_of_init()
111 		gc->wake_enabled = IRQ_MSK(32);  in ingenic_intc_of_init()
112 		gc->reg_base = intc->base + (i * CHIP_SIZE);  in ingenic_intc_of_init()
114 		ct = gc->chip_types;  in ingenic_intc_of_init()
115 		ct->regs.enable = JZ_REG_INTC_CLEAR_MASK;  in ingenic_intc_of_init()
116 		ct->regs.disable = JZ_REG_INTC_SET_MASK;  in ingenic_intc_of_init()
117 		ct->chip.irq_unmask = irq_gc_unmask_enable_reg;  in ingenic_intc_of_init()
118 		ct->chip.irq_mask = irq_gc_mask_disable_reg;  in ingenic_intc_of_init()
119 		ct->chip.irq_mask_ack = irq_gc_mask_disable_reg;  in ingenic_intc_of_init()
120 		ct->chip.irq_set_wake = irq_gc_set_wake;  in ingenic_intc_of_init()
121 		ct->chip.flags = IRQCHIP_MASK_ON_SUSPEND;  in ingenic_intc_of_init()
128 			"SoC intc cascade interrupt", NULL))  in ingenic_intc_of_init()
129 		pr_err("Failed to register SoC intc cascade interrupt\n");  in ingenic_intc_of_init()
135 	iounmap(intc->base);  in ingenic_intc_of_init()
139 	kfree(intc);  in ingenic_intc_of_init()
149 IRQCHIP_DECLARE(jz4740_intc, "ingenic,jz4740-intc", intc_1chip_of_init);
150 IRQCHIP_DECLARE(jz4725b_intc, "ingenic,jz4725b-intc", intc_1chip_of_init);
157 IRQCHIP_DECLARE(jz4760_intc, "ingenic,jz4760-intc", intc_2chip_of_init);
158 IRQCHIP_DECLARE(jz4770_intc, "ingenic,jz4770-intc", intc_2chip_of_init);
159 IRQCHIP_DECLARE(jz4775_intc, "ingenic,jz4775-intc", intc_2chip_of_init);
160 IRQCHIP_DECLARE(jz4780_intc, "ingenic,jz4780-intc", intc_2chip_of_init);