473 	int reg_shift;  member
487 		.reg_shift = 8,
495 		.reg_shift = 0,
503 		.reg_shift = 6,
511 		.reg_shift = 5,
518 		.reg_shift = 4,
525 		.reg_shift = 3,
532 		.reg_shift = 0,
541 		.reg_shift = 10,
548 		.reg_shift = 4,
556 		.reg_shift = 0,
564 		.reg_shift = 13,
572 		.reg_shift = 2,
580 		.reg_shift = 9,
588 		.reg_shift = 0,
596 		.reg_shift = 0,
604 		.reg_shift = 12,
612 		.reg_shift = 11,
619 		.reg_shift = 10,
626 		.reg_shift = 9,
633 		.reg_shift = 3,
640 		.reg_shift = 2,
647 		.reg_shift = 0,
655 		.reg_shift = 8,
664 		.reg_shift = 3,
673 		.reg_shift = 0,
682 		.reg_shift = 9,
690 		.reg_shift = 5,
698 		.reg_shift = 0,
706 		.reg_shift = 11,
714 		.reg_shift = 0,
723 		.reg_shift = 12,
732 		.reg_shift = 8,
741 		.reg_shift = 0,
751 		.reg_shift = 0,
760 		.reg_shift = 8,
768 		.reg_shift = 12,
776 		.reg_shift = 8,
784 		.reg_shift = 4,
792 		.reg_shift = 0,
800 		.reg_shift = 4,
808 		.reg_shift = 0,
816 		.reg_shift = 8,
825 		.reg_shift = 6,
833 		.reg_shift = 3,
842 		.reg_shift = 7,
850 		.reg_shift = 4,
858 		.reg_shift = 8,
866 		.reg_shift = 0,
875 		.reg_shift = 8,
885 		.reg_shift = 3,
895 		.reg_shift = 8,
905 		.reg_shift = 0,
914 		.reg_shift = 1,
921 		.reg_shift = 0,
930 		.reg_shift = 0,
938 		.reg_shift = 0,
946 		.reg_shift = 0,
955 		.reg_shift = 0,
963 		.reg_shift = 0,
972 		.reg_shift = 0,
980 		.reg_shift = 0,
1624 		int reg_shift = iqs7222_props[i].reg_shift;  in iqs7222_parse_props()  local
1648 				setup[reg_offset] |= BIT(reg_shift);  in iqs7222_parse_props()
1650 				setup[reg_offset] &= ~BIT(reg_shift);  in iqs7222_parse_props()
1658 				setup[reg_offset] &= ~BIT(reg_shift);  in iqs7222_parse_props()
1660 				setup[reg_offset] |= BIT(reg_shift);  in iqs7222_parse_props()
1681 		setup[reg_offset] &= ~GENMASK(reg_shift + reg_width - 1,  in iqs7222_parse_props()
1682 					      reg_shift);  in iqs7222_parse_props()
1683 		setup[reg_offset] |= (val / val_pitch << reg_shift);  in iqs7222_parse_props()