472 	int reg_offset;  member
486 		.reg_offset = 0,
494 		.reg_offset = 0,
502 		.reg_offset = 1,
510 		.reg_offset = 1,
517 		.reg_offset = 1,
524 		.reg_offset = 1,
531 		.reg_offset = 1,
540 		.reg_offset = 2,
547 		.reg_offset = 2,
555 		.reg_offset = 2,
563 		.reg_offset = 0,
571 		.reg_offset = 0,
579 		.reg_offset = 1,
587 		.reg_offset = 1,
595 		.reg_offset = 2,
603 		.reg_offset = 0,
611 		.reg_offset = 0,
618 		.reg_offset = 0,
625 		.reg_offset = 0,
632 		.reg_offset = 0,
639 		.reg_offset = 0,
646 		.reg_offset = 0,
654 		.reg_offset = 1,
663 		.reg_offset = 1,
672 		.reg_offset = 1,
681 		.reg_offset = 2,
689 		.reg_offset = 2,
697 		.reg_offset = 2,
705 		.reg_offset = 3,
713 		.reg_offset = 3,
722 		.reg_offset = 0,
731 		.reg_offset = 0,
740 		.reg_offset = 0,
750 		.reg_offset = 1,
759 		.reg_offset = 1,
767 		.reg_offset = 0,
775 		.reg_offset = 0,
783 		.reg_offset = 0,
791 		.reg_offset = 0,
799 		.reg_offset = 1,
807 		.reg_offset = 1,
815 		.reg_offset = 0,
824 		.reg_offset = 0,
832 		.reg_offset = 0,
841 		.reg_offset = 0,
849 		.reg_offset = 0,
857 		.reg_offset = 1,
865 		.reg_offset = 1,
874 		.reg_offset = 9,
884 		.reg_offset = 9,
894 		.reg_offset = 10,
904 		.reg_offset = 10,
913 		.reg_offset = 0,
920 		.reg_offset = 1,
929 		.reg_offset = 2,
937 		.reg_offset = 3,
945 		.reg_offset = 4,
954 		.reg_offset = 5,
962 		.reg_offset = 6,
971 		.reg_offset = 7,
979 		.reg_offset = 8,
1623 		int reg_offset = iqs7222_props[i].reg_offset;  in iqs7222_parse_props()  local
1648 				setup[reg_offset] |= BIT(reg_shift);  in iqs7222_parse_props()
1650 				setup[reg_offset] &= ~BIT(reg_shift);  in iqs7222_parse_props()
1658 				setup[reg_offset] &= ~BIT(reg_shift);  in iqs7222_parse_props()
1660 				setup[reg_offset] |= BIT(reg_shift);  in iqs7222_parse_props()
1681 		setup[reg_offset] &= ~GENMASK(reg_shift + reg_width - 1,  in iqs7222_parse_props()
1683 		setup[reg_offset] |= (val / val_pitch << reg_shift);  in iqs7222_parse_props()
1996 	int count, error, reg_offset, i;  in iqs7222_parse_sldr()  local
2040 	reg_offset = dev_desc->sldr_res < U16_MAX ? 0 : 1;  in iqs7222_parse_sldr()
2043 	sldr_setup[3 + reg_offset] &= ~GENMASK(ext_chan - 1, 0);  in iqs7222_parse_sldr()
2046 		sldr_setup[5 + reg_offset + i] = 0;  in iqs7222_parse_sldr()
2060 		sldr_setup[3 + reg_offset] |= BIT(chan_sel[i]);  in iqs7222_parse_sldr()
2061 		sldr_setup[5 + reg_offset + i] = chan_sel[i] * 42 + 1080;  in iqs7222_parse_sldr()
2064 	sldr_setup[4 + reg_offset] = dev_desc->touch_link;  in iqs7222_parse_sldr()
2066 		sldr_setup[4 + reg_offset] -= 2;  in iqs7222_parse_sldr()
2075 		if (reg_offset) {  in iqs7222_parse_sldr()
2085 		if (val > (reg_offset ? U16_MAX : U8_MAX * 4)) {  in iqs7222_parse_sldr()
2091 		if (reg_offset) {  in iqs7222_parse_sldr()
2102 		if (!reg_offset) {  in iqs7222_parse_sldr()
2126 	if (!reg_offset)  in iqs7222_parse_sldr()
2140 					    reg_offset ?  in iqs7222_parse_sldr()
2153 					      : sldr_setup[3 + reg_offset],  in iqs7222_parse_sldr()
2155 					      : sldr_setup[4 + reg_offset]);  in iqs7222_parse_sldr()
2159 		if (!reg_offset)  in iqs7222_parse_sldr()
2181 		if (i && !reg_offset)  in iqs7222_parse_sldr()
2183 		else if (sldr_setup[4 + reg_offset] == dev_desc->touch_link)  in iqs7222_parse_sldr()