295 	err = umr_check_mkey_mask(dev, be64_to_cpu(wqe->ctrl_seg.mkey_mask));  in mlx5r_umr_post_send_wait()
366 	wqe.ctrl_seg.mkey_mask |= get_umr_update_pd_mask();  in mlx5r_umr_revoke_mr()
367 	wqe.ctrl_seg.mkey_mask |= get_umr_disable_mr_mask();  in mlx5r_umr_revoke_mr()
368 	wqe.ctrl_seg.flags |= MLX5_UMR_INLINE;  in mlx5r_umr_revoke_mr()
401 	wqe.ctrl_seg.mkey_mask = get_umr_update_access_mask(dev);  in mlx5r_umr_rereg_pd_access()
402 	wqe.ctrl_seg.mkey_mask |= get_umr_update_pd_mask();  in mlx5r_umr_rereg_pd_access()
403 	wqe.ctrl_seg.flags = MLX5_UMR_CHECK_FREE;  in mlx5r_umr_rereg_pd_access()
404 	wqe.ctrl_seg.flags |= MLX5_UMR_INLINE;  in mlx5r_umr_rereg_pd_access()
524 mlx5r_umr_set_update_xlt_ctrl_seg(struct mlx5_wqe_umr_ctrl_seg *ctrl_seg,  in mlx5r_umr_set_update_xlt_ctrl_seg()  argument
529 		ctrl_seg->flags = MLX5_UMR_CHECK_FREE;  in mlx5r_umr_set_update_xlt_ctrl_seg()
532 		ctrl_seg->flags = MLX5_UMR_CHECK_NOT_FREE;  in mlx5r_umr_set_update_xlt_ctrl_seg()
533 	ctrl_seg->xlt_octowords =  in mlx5r_umr_set_update_xlt_ctrl_seg()
560 static void mlx5r_umr_update_offset(struct mlx5_wqe_umr_ctrl_seg *ctrl_seg,  in mlx5r_umr_update_offset()  argument
565 	ctrl_seg->xlt_offset = cpu_to_be16(octo_offset & 0xffff);  in mlx5r_umr_update_offset()
566 	ctrl_seg->xlt_offset_47_16 = cpu_to_be32(octo_offset >> 16);  in mlx5r_umr_update_offset()
567 	ctrl_seg->flags |= MLX5_UMR_TRANSLATION_OFFSET_EN;  in mlx5r_umr_update_offset()
578 		wqe->ctrl_seg.mkey_mask |= get_umr_enable_mr_mask();  in mlx5r_umr_final_update_xlt()
585 		wqe->ctrl_seg.mkey_mask |= get_umr_update_access_mask(dev);  in mlx5r_umr_final_update_xlt()
586 		wqe->ctrl_seg.mkey_mask |= get_umr_update_pd_mask();  in mlx5r_umr_final_update_xlt()
593 		wqe->ctrl_seg.mkey_mask |= get_umr_update_translation_mask();  in mlx5r_umr_final_update_xlt()
598 	wqe->ctrl_seg.xlt_octowords =  in mlx5r_umr_final_update_xlt()
633 	mlx5r_umr_set_update_xlt_ctrl_seg(&wqe.ctrl_seg, flags, &sg);  in mlx5r_umr_update_mr_pas()
653 			mlx5r_umr_update_offset(&wqe.ctrl_seg, offset);  in mlx5r_umr_update_mr_pas()
737 	mlx5r_umr_set_update_xlt_ctrl_seg(&wqe.ctrl_seg, flags, &sg);  in mlx5r_umr_update_xlt()
755 		mlx5r_umr_update_offset(&wqe.ctrl_seg, idx * desc_size);  in mlx5r_umr_update_xlt()