Lines Matching full:62
384 #define IRDMA_CQPSQ_QHASH_MANAGE GENMASK_ULL(62, 61)
389 #define IRDMA_CQPSQ_STATS_ALLOC_INST BIT_ULL(62)
398 #define IRDMA_CQPSQ_WS_ENABLENODE BIT_ULL(62)
411 #define IRDMA_CQPSQ_UP_USEVLAN BIT_ULL(62)
468 #define IRDMA_CQ_SQ BIT_ULL(62)
471 #define IRDMA_CQ_IMMVALID BIT_ULL(62)
493 #define IRDMA_CEQE_CQCTX GENMASK_ULL(62, 0)
506 #define IRDMA_AEQE_Q2DATA GENMASK_ULL(62, 61)
515 #define IRDMA_UDA_QPSQ_SIGCOMPL BIT_ULL(62)
516 #define IRDMA_UDA_QPSQ_MACLEN GENMASK_ULL(62, 56)
563 #define IRDMA_CQPSQ_QP_NEXTIWSTATE GENMASK_ULL(62, 60)
568 #define IRDMA_CQPSQ_CQ_CQCTX GENMASK_ULL(62, 0)
606 #define IRDMA_CQPSQ_MLM_FREEENTRY BIT_ULL(62)
623 #define IRDMA_CQPSQ_MVPBP_INV_PD_ENT BIT_ULL(62)
634 #define IRDMA_CQPSQ_MPP_FREE_PAGE BIT_ULL(62)
642 #define IRDMA_CQPSQ_UCTX_FREEZEQP BIT_ULL(62)
645 #define IRDMA_CQPSQ_MHMC_FREEPMFN BIT_ULL(62)
675 #define IRDMA_CQPSQ_FWQE_FLUSHRQ BIT_ULL(62)
677 #define IRDMA_CQPSQ_MAPT_ADDPORT BIT_ULL(62)
725 #define IRDMAQPC_RDMAP_VER GENMASK_ULL(63, 62)
845 #define IRDMAQPSQ_SIGCOMPL BIT_ULL(62)
850 #define IRDMAQPSQ_FRAG_LEN GENMASK_ULL(62, 32)