Lines Matching refs:CNTR_32BIT
1198 0, flags | CNTR_32BIT, \
1204 0, flags | CNTR_32BIT, \
1230 0, flags | CNTR_32BIT, \
1251 0, flags | CNTR_32BIT, \
1257 0, flags | CNTR_32BIT, \
4254 CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4257 CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4260 CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4263 CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
4266 CNTR_NORMAL | CNTR_32BIT | CNTR_SDMA,
5084 [C_SW_LINK_DOWN] = CNTR_ELEM("SwLinkDown", 0, 0, CNTR_SYNTH | CNTR_32BIT,
5086 [C_SW_LINK_UP] = CNTR_ELEM("SwLinkUp", 0, 0, CNTR_SYNTH | CNTR_32BIT,
5090 [C_SW_XMIT_DSCD] = CNTR_ELEM("XmitDscd", 0, 0, CNTR_SYNTH | CNTR_32BIT,
5093 CNTR_SYNTH | CNTR_32BIT | CNTR_VL,
12359 if (entry->flags & CNTR_32BIT) { in read_dev_port_cntr()
12403 if (entry->flags & CNTR_32BIT) { in write_dev_port_cntr()
12629 if (dev_cntrs[i].flags & CNTR_32BIT) in init_cntrs()
12641 if (dev_cntrs[i].flags & CNTR_32BIT) in init_cntrs()
12650 if (dev_cntrs[i].flags & CNTR_32BIT) in init_cntrs()
12686 if (dev_cntrs[i].flags & CNTR_32BIT) { in init_cntrs()
12701 if (dev_cntrs[i].flags & CNTR_32BIT) { in init_cntrs()
12713 if (dev_cntrs[i].flags & CNTR_32BIT) { in init_cntrs()
12753 if (port_cntrs[i].flags & CNTR_32BIT) in init_cntrs()
12762 if (port_cntrs[i].flags & CNTR_32BIT) in init_cntrs()
12788 if (port_cntrs[i].flags & CNTR_32BIT) { in init_cntrs()
12801 if (port_cntrs[i].flags & CNTR_32BIT) { in init_cntrs()