Lines Matching full:st

100 void inv_icm42600_buffer_update_fifo_period(struct inv_icm42600_state *st)  in inv_icm42600_buffer_update_fifo_period()  argument
104 if (st->fifo.en & INV_ICM42600_SENSOR_GYRO) in inv_icm42600_buffer_update_fifo_period()
105 period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr); in inv_icm42600_buffer_update_fifo_period()
109 if (st->fifo.en & INV_ICM42600_SENSOR_ACCEL) in inv_icm42600_buffer_update_fifo_period()
110 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr); in inv_icm42600_buffer_update_fifo_period()
119 st->fifo.period = period; in inv_icm42600_buffer_update_fifo_period()
122 int inv_icm42600_buffer_set_fifo_en(struct inv_icm42600_state *st, in inv_icm42600_buffer_set_fifo_en() argument
142 ret = regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, mask, val); in inv_icm42600_buffer_set_fifo_en()
146 st->fifo.en = fifo_en; in inv_icm42600_buffer_set_fifo_en()
147 inv_icm42600_buffer_update_fifo_period(st); in inv_icm42600_buffer_set_fifo_en()
182 * @st: driver internal state
202 int inv_icm42600_buffer_update_watermark(struct inv_icm42600_state *st) in inv_icm42600_buffer_update_watermark() argument
212 packet_size = inv_icm42600_get_packet_size(st->fifo.en); in inv_icm42600_buffer_update_watermark()
215 wm_gyro = inv_icm42600_wm_truncate(st->fifo.watermark.gyro, packet_size); in inv_icm42600_buffer_update_watermark()
216 wm_accel = inv_icm42600_wm_truncate(st->fifo.watermark.accel, packet_size); in inv_icm42600_buffer_update_watermark()
218 period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr) / 1000UL; in inv_icm42600_buffer_update_watermark()
219 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr) / 1000UL; in inv_icm42600_buffer_update_watermark()
249 ret = regmap_update_bits_check(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_update_watermark()
256 memcpy(st->buffer, &raw_wm, sizeof(raw_wm)); in inv_icm42600_buffer_update_watermark()
257 ret = regmap_bulk_write(st->map, INV_ICM42600_REG_FIFO_WATERMARK, in inv_icm42600_buffer_update_watermark()
258 st->buffer, sizeof(raw_wm)); in inv_icm42600_buffer_update_watermark()
264 ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_update_watermark()
276 struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); in inv_icm42600_buffer_preenable() local
277 struct device *dev = regmap_get_device(st->map); in inv_icm42600_buffer_preenable()
290 struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); in inv_icm42600_buffer_postenable() local
293 mutex_lock(&st->lock); in inv_icm42600_buffer_postenable()
296 if (st->fifo.on) { in inv_icm42600_buffer_postenable()
302 ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_postenable()
309 ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET, in inv_icm42600_buffer_postenable()
315 ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG, in inv_icm42600_buffer_postenable()
321 ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, st->buffer, 2); in inv_icm42600_buffer_postenable()
327 st->fifo.on++; in inv_icm42600_buffer_postenable()
329 mutex_unlock(&st->lock); in inv_icm42600_buffer_postenable()
335 struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); in inv_icm42600_buffer_predisable() local
338 mutex_lock(&st->lock); in inv_icm42600_buffer_predisable()
341 if (st->fifo.on > 1) { in inv_icm42600_buffer_predisable()
347 ret = regmap_write(st->map, INV_ICM42600_REG_FIFO_CONFIG, in inv_icm42600_buffer_predisable()
353 ret = regmap_write(st->map, INV_ICM42600_REG_SIGNAL_PATH_RESET, in inv_icm42600_buffer_predisable()
359 ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, in inv_icm42600_buffer_predisable()
366 st->fifo.on--; in inv_icm42600_buffer_predisable()
368 mutex_unlock(&st->lock); in inv_icm42600_buffer_predisable()
374 struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); in inv_icm42600_buffer_postdisable() local
375 struct device *dev = regmap_get_device(st->map); in inv_icm42600_buffer_postdisable()
385 if (indio_dev == st->indio_gyro) { in inv_icm42600_buffer_postdisable()
387 watermark = &st->fifo.watermark.gyro; in inv_icm42600_buffer_postdisable()
388 ts = iio_priv(st->indio_gyro); in inv_icm42600_buffer_postdisable()
389 } else if (indio_dev == st->indio_accel) { in inv_icm42600_buffer_postdisable()
391 watermark = &st->fifo.watermark.accel; in inv_icm42600_buffer_postdisable()
392 ts = iio_priv(st->indio_accel); in inv_icm42600_buffer_postdisable()
397 mutex_lock(&st->lock); in inv_icm42600_buffer_postdisable()
399 ret = inv_icm42600_buffer_set_fifo_en(st, st->fifo.en & ~sensor); in inv_icm42600_buffer_postdisable()
404 ret = inv_icm42600_buffer_update_watermark(st); in inv_icm42600_buffer_postdisable()
410 ret = inv_icm42600_set_gyro_conf(st, &conf, &sleep_sensor); in inv_icm42600_buffer_postdisable()
412 ret = inv_icm42600_set_accel_conf(st, &conf, &sleep_sensor); in inv_icm42600_buffer_postdisable()
417 if (!st->fifo.on) in inv_icm42600_buffer_postdisable()
418 ret = inv_icm42600_set_temp_conf(st, false, &sleep_temp); in inv_icm42600_buffer_postdisable()
423 mutex_unlock(&st->lock); in inv_icm42600_buffer_postdisable()
446 int inv_icm42600_buffer_fifo_read(struct inv_icm42600_state *st, in inv_icm42600_buffer_fifo_read() argument
458 st->fifo.count = 0; in inv_icm42600_buffer_fifo_read()
459 st->fifo.nb.gyro = 0; in inv_icm42600_buffer_fifo_read()
460 st->fifo.nb.accel = 0; in inv_icm42600_buffer_fifo_read()
461 st->fifo.nb.total = 0; in inv_icm42600_buffer_fifo_read()
465 max_count = sizeof(st->fifo.data); in inv_icm42600_buffer_fifo_read()
467 max_count = max * inv_icm42600_get_packet_size(st->fifo.en); in inv_icm42600_buffer_fifo_read()
470 raw_fifo_count = (__be16 *)st->buffer; in inv_icm42600_buffer_fifo_read()
471 ret = regmap_bulk_read(st->map, INV_ICM42600_REG_FIFO_COUNT, in inv_icm42600_buffer_fifo_read()
475 st->fifo.count = be16_to_cpup(raw_fifo_count); in inv_icm42600_buffer_fifo_read()
478 if (st->fifo.count == 0) in inv_icm42600_buffer_fifo_read()
480 if (st->fifo.count > max_count) in inv_icm42600_buffer_fifo_read()
481 st->fifo.count = max_count; in inv_icm42600_buffer_fifo_read()
484 ret = regmap_noinc_read(st->map, INV_ICM42600_REG_FIFO_DATA, in inv_icm42600_buffer_fifo_read()
485 st->fifo.data, st->fifo.count); in inv_icm42600_buffer_fifo_read()
490 for (i = 0; i < st->fifo.count; i += size) { in inv_icm42600_buffer_fifo_read()
491 size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i], in inv_icm42600_buffer_fifo_read()
496 st->fifo.nb.gyro++; in inv_icm42600_buffer_fifo_read()
498 st->fifo.nb.accel++; in inv_icm42600_buffer_fifo_read()
499 st->fifo.nb.total++; in inv_icm42600_buffer_fifo_read()
505 int inv_icm42600_buffer_fifo_parse(struct inv_icm42600_state *st) in inv_icm42600_buffer_fifo_parse() argument
510 if (st->fifo.nb.total == 0) in inv_icm42600_buffer_fifo_parse()
514 ts = iio_priv(st->indio_gyro); in inv_icm42600_buffer_fifo_parse()
515 inv_icm42600_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total, in inv_icm42600_buffer_fifo_parse()
516 st->fifo.nb.gyro, st->timestamp.gyro); in inv_icm42600_buffer_fifo_parse()
517 if (st->fifo.nb.gyro > 0) { in inv_icm42600_buffer_fifo_parse()
518 ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro); in inv_icm42600_buffer_fifo_parse()
524 ts = iio_priv(st->indio_accel); in inv_icm42600_buffer_fifo_parse()
525 inv_icm42600_timestamp_interrupt(ts, st->fifo.period, st->fifo.nb.total, in inv_icm42600_buffer_fifo_parse()
526 st->fifo.nb.accel, st->timestamp.accel); in inv_icm42600_buffer_fifo_parse()
527 if (st->fifo.nb.accel > 0) { in inv_icm42600_buffer_fifo_parse()
528 ret = inv_icm42600_accel_parse_fifo(st->indio_accel); in inv_icm42600_buffer_fifo_parse()
536 int inv_icm42600_buffer_hwfifo_flush(struct inv_icm42600_state *st, in inv_icm42600_buffer_hwfifo_flush() argument
543 gyro_ts = iio_get_time_ns(st->indio_gyro); in inv_icm42600_buffer_hwfifo_flush()
544 accel_ts = iio_get_time_ns(st->indio_accel); in inv_icm42600_buffer_hwfifo_flush()
546 ret = inv_icm42600_buffer_fifo_read(st, count); in inv_icm42600_buffer_hwfifo_flush()
550 if (st->fifo.nb.total == 0) in inv_icm42600_buffer_hwfifo_flush()
553 if (st->fifo.nb.gyro > 0) { in inv_icm42600_buffer_hwfifo_flush()
554 ts = iio_priv(st->indio_gyro); in inv_icm42600_buffer_hwfifo_flush()
555 inv_icm42600_timestamp_interrupt(ts, st->fifo.period, in inv_icm42600_buffer_hwfifo_flush()
556 st->fifo.nb.total, st->fifo.nb.gyro, in inv_icm42600_buffer_hwfifo_flush()
558 ret = inv_icm42600_gyro_parse_fifo(st->indio_gyro); in inv_icm42600_buffer_hwfifo_flush()
563 if (st->fifo.nb.accel > 0) { in inv_icm42600_buffer_hwfifo_flush()
564 ts = iio_priv(st->indio_accel); in inv_icm42600_buffer_hwfifo_flush()
565 inv_icm42600_timestamp_interrupt(ts, st->fifo.period, in inv_icm42600_buffer_hwfifo_flush()
566 st->fifo.nb.total, st->fifo.nb.accel, in inv_icm42600_buffer_hwfifo_flush()
568 ret = inv_icm42600_accel_parse_fifo(st->indio_accel); in inv_icm42600_buffer_hwfifo_flush()
576 int inv_icm42600_buffer_init(struct inv_icm42600_state *st) in inv_icm42600_buffer_init() argument
588 ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0, in inv_icm42600_buffer_init()
599 return regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, in inv_icm42600_buffer_init()