Lines Matching +full:switch +full:- +full:freq +full:- +full:select
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 Analog Devices Inc.
78 for (i = ADF4350_REG5; i >= ADF4350_REG0; i--) { in adf4350_sync_config()
79 if ((st->regs_hw[i] != st->regs[i]) || in adf4350_sync_config()
81 switch (i) { in adf4350_sync_config()
88 st->val = cpu_to_be32(st->regs[i] | i); in adf4350_sync_config()
89 ret = spi_write(st->spi, &st->val, 4); in adf4350_sync_config()
92 st->regs_hw[i] = st->regs[i]; in adf4350_sync_config()
93 dev_dbg(&st->spi->dev, "[%d] 0x%X\n", in adf4350_sync_config()
94 i, (u32)st->regs[i] | i); in adf4350_sync_config()
108 return -EINVAL; in adf4350_reg_access()
110 mutex_lock(&st->lock); in adf4350_reg_access()
112 st->regs[reg] = writeval & ~(BIT(0) | BIT(1) | BIT(2)); in adf4350_reg_access()
115 *readval = st->regs_hw[reg]; in adf4350_reg_access()
118 mutex_unlock(&st->lock); in adf4350_reg_access()
125 struct adf4350_platform_data *pdata = st->pdata; in adf4350_tune_r_cnt()
129 st->fpfd = (st->clkin * (pdata->ref_doubler_en ? 2 : 1)) / in adf4350_tune_r_cnt()
130 (r_cnt * (pdata->ref_div2_en ? 2 : 1)); in adf4350_tune_r_cnt()
131 } while (st->fpfd > ADF4350_MAX_FREQ_PFD); in adf4350_tune_r_cnt()
136 static int adf4350_set_freq(struct adf4350_state *st, unsigned long long freq) in adf4350_set_freq() argument
138 struct adf4350_platform_data *pdata = st->pdata; in adf4350_set_freq()
144 if (freq > ADF4350_MAX_OUT_FREQ || freq < st->min_out_freq) in adf4350_set_freq()
145 return -EINVAL; in adf4350_set_freq()
147 if (freq > ADF4350_MAX_FREQ_45_PRESC) { in adf4350_set_freq()
155 st->r4_rf_div_sel = 0; in adf4350_set_freq()
157 while (freq < ADF4350_MIN_VCO_FREQ) { in adf4350_set_freq()
158 freq <<= 1; in adf4350_set_freq()
159 st->r4_rf_div_sel++; in adf4350_set_freq()
166 if (pdata->ref_div_factor) in adf4350_set_freq()
167 r_cnt = pdata->ref_div_factor - 1; in adf4350_set_freq()
169 chspc = st->chspc; in adf4350_set_freq()
175 st->r1_mod = st->fpfd / chspc; in adf4350_set_freq()
181 } while ((st->r1_mod > ADF4350_MAX_MODULUS) && r_cnt); in adf4350_set_freq()
184 tmp = freq * (u64)st->r1_mod + (st->fpfd >> 1); in adf4350_set_freq()
185 do_div(tmp, st->fpfd); /* Div round closest (n + d/2)/d */ in adf4350_set_freq()
186 st->r0_fract = do_div(tmp, st->r1_mod); in adf4350_set_freq()
187 st->r0_int = tmp; in adf4350_set_freq()
188 } while (mdiv > st->r0_int); in adf4350_set_freq()
190 band_sel_div = DIV_ROUND_UP(st->fpfd, ADF4350_MAX_BANDSEL_CLK); in adf4350_set_freq()
192 if (st->r0_fract && st->r1_mod) { in adf4350_set_freq()
193 div_gcd = gcd(st->r1_mod, st->r0_fract); in adf4350_set_freq()
194 st->r1_mod /= div_gcd; in adf4350_set_freq()
195 st->r0_fract /= div_gcd; in adf4350_set_freq()
197 st->r0_fract = 0; in adf4350_set_freq()
198 st->r1_mod = 1; in adf4350_set_freq()
201 dev_dbg(&st->spi->dev, "VCO: %llu Hz, PFD %lu Hz\n" in adf4350_set_freq()
204 freq, st->fpfd, r_cnt, st->r0_int, st->r0_fract, st->r1_mod, in adf4350_set_freq()
205 1 << st->r4_rf_div_sel, prescaler ? "8/9" : "4/5", in adf4350_set_freq()
208 st->regs[ADF4350_REG0] = ADF4350_REG0_INT(st->r0_int) | in adf4350_set_freq()
209 ADF4350_REG0_FRACT(st->r0_fract); in adf4350_set_freq()
211 st->regs[ADF4350_REG1] = ADF4350_REG1_PHASE(1) | in adf4350_set_freq()
212 ADF4350_REG1_MOD(st->r1_mod) | in adf4350_set_freq()
215 st->regs[ADF4350_REG2] = in adf4350_set_freq()
218 (pdata->ref_doubler_en ? ADF4350_REG2_RMULT2_EN : 0) | in adf4350_set_freq()
219 (pdata->ref_div2_en ? ADF4350_REG2_RDIV2_EN : 0) | in adf4350_set_freq()
220 (pdata->r2_user_settings & (ADF4350_REG2_PD_POLARITY_POS | in adf4350_set_freq()
225 st->regs[ADF4350_REG3] = pdata->r3_user_settings & in adf4350_set_freq()
233 st->regs[ADF4350_REG4] = in adf4350_set_freq()
235 ADF4350_REG4_RF_DIV_SEL(st->r4_rf_div_sel) | in adf4350_set_freq()
238 (pdata->r4_user_settings & in adf4350_set_freq()
245 st->regs[ADF4350_REG5] = ADF4350_REG5_LD_PIN_MODE_DIGITAL; in adf4350_set_freq()
246 st->freq_req = freq; in adf4350_set_freq()
265 mutex_lock(&st->lock); in adf4350_write()
266 switch ((u32)private) { in adf4350_write()
272 ret = -EINVAL; in adf4350_write()
276 if (st->clk) { in adf4350_write()
277 tmp = clk_round_rate(st->clk, readin); in adf4350_write()
279 ret = -EINVAL; in adf4350_write()
282 ret = clk_set_rate(st->clk, tmp); in adf4350_write()
286 st->clkin = readin; in adf4350_write()
287 ret = adf4350_set_freq(st, st->freq_req); in adf4350_write()
291 ret = -EINVAL; in adf4350_write()
293 st->chspc = readin; in adf4350_write()
297 st->regs[ADF4350_REG2] |= ADF4350_REG2_POWER_DOWN_EN; in adf4350_write()
299 st->regs[ADF4350_REG2] &= ~ADF4350_REG2_POWER_DOWN_EN; in adf4350_write()
304 ret = -EINVAL; in adf4350_write()
306 mutex_unlock(&st->lock); in adf4350_write()
320 mutex_lock(&st->lock); in adf4350_read()
321 switch ((u32)private) { in adf4350_read()
323 val = (u64)((st->r0_int * st->r1_mod) + st->r0_fract) * in adf4350_read()
324 (u64)st->fpfd; in adf4350_read()
325 do_div(val, st->r1_mod * (1 << st->r4_rf_div_sel)); in adf4350_read()
327 if (st->lock_detect_gpiod) in adf4350_read()
328 if (!gpiod_get_value(st->lock_detect_gpiod)) { in adf4350_read()
329 dev_dbg(&st->spi->dev, "PLL un-locked\n"); in adf4350_read()
330 ret = -EBUSY; in adf4350_read()
334 if (st->clk) in adf4350_read()
335 st->clkin = clk_get_rate(st->clk); in adf4350_read()
337 val = st->clkin; in adf4350_read()
340 val = st->chspc; in adf4350_read()
343 val = !!(st->regs[ADF4350_REG2] & ADF4350_REG2_POWER_DOWN_EN); in adf4350_read()
346 ret = -EINVAL; in adf4350_read()
349 mutex_unlock(&st->lock); in adf4350_read()
394 snprintf(pdata->name, sizeof(pdata->name), "%pfw", dev_fwnode(dev)); in adf4350_parse_dt()
397 device_property_read_u32(dev, "adi,channel-spacing", &tmp); in adf4350_parse_dt()
398 pdata->channel_spacing = tmp; in adf4350_parse_dt()
401 device_property_read_u32(dev, "adi,power-up-frequency", &tmp); in adf4350_parse_dt()
402 pdata->power_up_frequency = tmp; in adf4350_parse_dt()
405 device_property_read_u32(dev, "adi,reference-div-factor", &tmp); in adf4350_parse_dt()
406 pdata->ref_div_factor = tmp; in adf4350_parse_dt()
408 pdata->ref_doubler_en = device_property_read_bool(dev, "adi,reference-doubler-enable"); in adf4350_parse_dt()
409 pdata->ref_div2_en = device_property_read_bool(dev, "adi,reference-div2-enable"); in adf4350_parse_dt()
412 pdata->r2_user_settings = 0; in adf4350_parse_dt()
413 if (device_property_read_bool(dev, "adi,phase-detector-polarity-positive-enable")) in adf4350_parse_dt()
414 pdata->r2_user_settings |= ADF4350_REG2_PD_POLARITY_POS; in adf4350_parse_dt()
415 if (device_property_read_bool(dev, "adi,lock-detect-precision-6ns-enable")) in adf4350_parse_dt()
416 pdata->r2_user_settings |= ADF4350_REG2_LDP_6ns; in adf4350_parse_dt()
417 if (device_property_read_bool(dev, "adi,lock-detect-function-integer-n-enable")) in adf4350_parse_dt()
418 pdata->r2_user_settings |= ADF4350_REG2_LDF_INT_N; in adf4350_parse_dt()
421 device_property_read_u32(dev, "adi,charge-pump-current", &tmp); in adf4350_parse_dt()
422 pdata->r2_user_settings |= ADF4350_REG2_CHARGE_PUMP_CURR_uA(tmp); in adf4350_parse_dt()
425 device_property_read_u32(dev, "adi,muxout-select", &tmp); in adf4350_parse_dt()
426 pdata->r2_user_settings |= ADF4350_REG2_MUXOUT(tmp); in adf4350_parse_dt()
428 if (device_property_read_bool(dev, "adi,low-spur-mode-enable")) in adf4350_parse_dt()
429 pdata->r2_user_settings |= ADF4350_REG2_NOISE_MODE(0x3); in adf4350_parse_dt()
433 pdata->r3_user_settings = 0; in adf4350_parse_dt()
434 if (device_property_read_bool(dev, "adi,cycle-slip-reduction-enable")) in adf4350_parse_dt()
435 pdata->r3_user_settings |= ADF4350_REG3_12BIT_CSR_EN; in adf4350_parse_dt()
436 if (device_property_read_bool(dev, "adi,charge-cancellation-enable")) in adf4350_parse_dt()
437 pdata->r3_user_settings |= ADF4351_REG3_CHARGE_CANCELLATION_EN; in adf4350_parse_dt()
438 if (device_property_read_bool(dev, "adi,anti-backlash-3ns-enable")) in adf4350_parse_dt()
439 pdata->r3_user_settings |= ADF4351_REG3_ANTI_BACKLASH_3ns_EN; in adf4350_parse_dt()
440 if (device_property_read_bool(dev, "adi,band-select-clock-mode-high-enable")) in adf4350_parse_dt()
441 pdata->r3_user_settings |= ADF4351_REG3_BAND_SEL_CLOCK_MODE_HIGH; in adf4350_parse_dt()
444 device_property_read_u32(dev, "adi,12bit-clk-divider", &tmp); in adf4350_parse_dt()
445 pdata->r3_user_settings |= ADF4350_REG3_12BIT_CLKDIV(tmp); in adf4350_parse_dt()
448 device_property_read_u32(dev, "adi,clk-divider-mode", &tmp); in adf4350_parse_dt()
449 pdata->r3_user_settings |= ADF4350_REG3_12BIT_CLKDIV_MODE(tmp); in adf4350_parse_dt()
453 pdata->r4_user_settings = 0; in adf4350_parse_dt()
454 if (device_property_read_bool(dev, "adi,aux-output-enable")) in adf4350_parse_dt()
455 pdata->r4_user_settings |= ADF4350_REG4_AUX_OUTPUT_EN; in adf4350_parse_dt()
456 if (device_property_read_bool(dev, "adi,aux-output-fundamental-enable")) in adf4350_parse_dt()
457 pdata->r4_user_settings |= ADF4350_REG4_AUX_OUTPUT_FUND; in adf4350_parse_dt()
458 if (device_property_read_bool(dev, "adi,mute-till-lock-enable")) in adf4350_parse_dt()
459 pdata->r4_user_settings |= ADF4350_REG4_MUTE_TILL_LOCK_EN; in adf4350_parse_dt()
462 device_property_read_u32(dev, "adi,output-power", &tmp); in adf4350_parse_dt()
463 pdata->r4_user_settings |= ADF4350_REG4_OUTPUT_PWR(tmp); in adf4350_parse_dt()
466 device_property_read_u32(dev, "adi,aux-output-power", &tmp); in adf4350_parse_dt()
467 pdata->r4_user_settings |= ADF4350_REG4_AUX_OUTPUT_PWR(tmp); in adf4350_parse_dt()
480 if (dev_fwnode(&spi->dev)) { in adf4350_probe()
481 pdata = adf4350_parse_dt(&spi->dev); in adf4350_probe()
483 return -EINVAL; in adf4350_probe()
485 pdata = spi->dev.platform_data; in adf4350_probe()
489 dev_warn(&spi->dev, "no platform data? using default\n"); in adf4350_probe()
493 if (!pdata->clkin) { in adf4350_probe()
494 clk = devm_clk_get(&spi->dev, "clkin"); in adf4350_probe()
496 return -EPROBE_DEFER; in adf4350_probe()
503 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in adf4350_probe()
505 ret = -ENOMEM; in adf4350_probe()
511 st->reg = devm_regulator_get(&spi->dev, "vcc"); in adf4350_probe()
512 if (!IS_ERR(st->reg)) { in adf4350_probe()
513 ret = regulator_enable(st->reg); in adf4350_probe()
519 st->spi = spi; in adf4350_probe()
520 st->pdata = pdata; in adf4350_probe()
522 indio_dev->name = (pdata->name[0] != 0) ? pdata->name : in adf4350_probe()
523 spi_get_device_id(spi)->name; in adf4350_probe()
525 indio_dev->info = &adf4350_info; in adf4350_probe()
526 indio_dev->modes = INDIO_DIRECT_MODE; in adf4350_probe()
527 indio_dev->channels = &adf4350_chan; in adf4350_probe()
528 indio_dev->num_channels = 1; in adf4350_probe()
530 mutex_init(&st->lock); in adf4350_probe()
532 st->chspc = pdata->channel_spacing; in adf4350_probe()
534 st->clk = clk; in adf4350_probe()
535 st->clkin = clk_get_rate(clk); in adf4350_probe()
537 st->clkin = pdata->clkin; in adf4350_probe()
540 st->min_out_freq = spi_get_device_id(spi)->driver_data == 4351 ? in adf4350_probe()
543 memset(st->regs_hw, 0xFF, sizeof(st->regs_hw)); in adf4350_probe()
545 st->lock_detect_gpiod = devm_gpiod_get_optional(&spi->dev, NULL, in adf4350_probe()
547 if (IS_ERR(st->lock_detect_gpiod)) { in adf4350_probe()
548 ret = PTR_ERR(st->lock_detect_gpiod); in adf4350_probe()
552 if (pdata->power_up_frequency) { in adf4350_probe()
553 ret = adf4350_set_freq(st, pdata->power_up_frequency); in adf4350_probe()
565 if (!IS_ERR(st->reg)) in adf4350_probe()
566 regulator_disable(st->reg); in adf4350_probe()
577 struct regulator *reg = st->reg; in adf4350_remove()
579 st->regs[ADF4350_REG2] |= ADF4350_REG2_POWER_DOWN_EN; in adf4350_remove()
584 clk_disable_unprepare(st->clk); in adf4350_remove()