1 /* SPDX-License-Identifier: GPL-2.0 */
5  * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
15  * STM32 DFSDM - global register map
18  * --------------------------------------------------------
20  * --------------------------------------------------------
22  * --------------------------------------------------------
24  * --------------------------------------------------------
26  * --------------------------------------------------------
28  * --------------------------------------------------------
30  * --------------------------------------------------------
32  * --------------------------------------------------------
34  * --------------------------------------------------------
48 #define DFSDM_CHCFGR1_SITP(v)       FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v)  argument
50 #define DFSDM_CHCFGR1_SPICKSEL(v)   FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v)  argument
51 #define DFSDM_CHCFGR1_SCDEN_MASK    BIT(5)
52 #define DFSDM_CHCFGR1_SCDEN(v)      FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v)  argument
53 #define DFSDM_CHCFGR1_CKABEN_MASK   BIT(6)
54 #define DFSDM_CHCFGR1_CKABEN(v)     FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v)  argument
55 #define DFSDM_CHCFGR1_CHEN_MASK     BIT(7)
56 #define DFSDM_CHCFGR1_CHEN(v)       FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v)  argument
57 #define DFSDM_CHCFGR1_CHINSEL_MASK  BIT(8)
58 #define DFSDM_CHCFGR1_CHINSEL(v)    FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v)  argument
60 #define DFSDM_CHCFGR1_DATMPX(v)     FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v)  argument
62 #define DFSDM_CHCFGR1_DATPACK(v)    FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v)  argument
64 #define DFSDM_CHCFGR1_CKOUTDIV(v)   FIELD_PREP(DFSDM_CHCFGR1_CKOUTDIV_MASK, v)  argument
65 #define DFSDM_CHCFGR1_CKOUTSRC_MASK BIT(30)
66 #define DFSDM_CHCFGR1_CKOUTSRC(v)   FIELD_PREP(DFSDM_CHCFGR1_CKOUTSRC_MASK, v)  argument
67 #define DFSDM_CHCFGR1_DFSDMEN_MASK  BIT(31)
68 #define DFSDM_CHCFGR1_DFSDMEN(v)    FIELD_PREP(DFSDM_CHCFGR1_DFSDMEN_MASK, v)  argument
72 #define DFSDM_CHCFGR2_DTRBS(v)      FIELD_PREP(DFSDM_CHCFGR2_DTRBS_MASK, v)  argument
74 #define DFSDM_CHCFGR2_OFFSET(v)     FIELD_PREP(DFSDM_CHCFGR2_OFFSET_MASK, v)  argument
78 #define DFSDM_AWSCDR_SCDT(v)      FIELD_PREP(DFSDM_AWSCDR_SCDT_MASK, v)  argument
80 #define DFSDM_AWSCDR_BKSCD(v)	  FIELD_PREP(DFSDM_AWSCDR_BKSCD_MASK, v)  argument
82 #define DFSDM_AWSCDR_AWFOSR(v)    FIELD_PREP(DFSDM_AWSCDR_AWFOSR_MASK, v)  argument
84 #define DFSDM_AWSCDR_AWFORD(v)    FIELD_PREP(DFSDM_AWSCDR_AWFORD_MASK, v)  argument
110 #define DFSDM_CR1_DFEN_MASK	BIT(0)
111 #define DFSDM_CR1_DFEN(v)	FIELD_PREP(DFSDM_CR1_DFEN_MASK, v)  argument
112 #define DFSDM_CR1_JSWSTART_MASK	BIT(1)
113 #define DFSDM_CR1_JSWSTART(v)	FIELD_PREP(DFSDM_CR1_JSWSTART_MASK, v)  argument
114 #define DFSDM_CR1_JSYNC_MASK	BIT(3)
115 #define DFSDM_CR1_JSYNC(v)	FIELD_PREP(DFSDM_CR1_JSYNC_MASK, v)  argument
116 #define DFSDM_CR1_JSCAN_MASK	BIT(4)
117 #define DFSDM_CR1_JSCAN(v)	FIELD_PREP(DFSDM_CR1_JSCAN_MASK, v)  argument
118 #define DFSDM_CR1_JDMAEN_MASK	BIT(5)
119 #define DFSDM_CR1_JDMAEN(v)	FIELD_PREP(DFSDM_CR1_JDMAEN_MASK, v)  argument
121 #define DFSDM_CR1_JEXTSEL(v)	FIELD_PREP(DFSDM_CR1_JEXTSEL_MASK, v)  argument
123 #define DFSDM_CR1_JEXTEN(v)	FIELD_PREP(DFSDM_CR1_JEXTEN_MASK, v)  argument
124 #define DFSDM_CR1_RSWSTART_MASK	BIT(17)
125 #define DFSDM_CR1_RSWSTART(v)	FIELD_PREP(DFSDM_CR1_RSWSTART_MASK, v)  argument
126 #define DFSDM_CR1_RCONT_MASK	BIT(18)
127 #define DFSDM_CR1_RCONT(v)	FIELD_PREP(DFSDM_CR1_RCONT_MASK, v)  argument
128 #define DFSDM_CR1_RSYNC_MASK	BIT(19)
129 #define DFSDM_CR1_RSYNC(v)	FIELD_PREP(DFSDM_CR1_RSYNC_MASK, v)  argument
130 #define DFSDM_CR1_RDMAEN_MASK	BIT(21)
131 #define DFSDM_CR1_RDMAEN(v)	FIELD_PREP(DFSDM_CR1_RDMAEN_MASK, v)  argument
133 #define DFSDM_CR1_RCH(v)	FIELD_PREP(DFSDM_CR1_RCH_MASK, v)  argument
134 #define DFSDM_CR1_FAST_MASK	BIT(29)
135 #define DFSDM_CR1_FAST(v)	FIELD_PREP(DFSDM_CR1_FAST_MASK, v)  argument
136 #define DFSDM_CR1_AWFSEL_MASK	BIT(30)
137 #define DFSDM_CR1_AWFSEL(v)	FIELD_PREP(DFSDM_CR1_AWFSEL_MASK, v)  argument
141 #define DFSDM_CR2_IE(v)		FIELD_PREP(DFSDM_CR2_IE_MASK, v)  argument
142 #define DFSDM_CR2_JEOCIE_MASK	BIT(0)
143 #define DFSDM_CR2_JEOCIE(v)	FIELD_PREP(DFSDM_CR2_JEOCIE_MASK, v)  argument
144 #define DFSDM_CR2_REOCIE_MASK	BIT(1)
145 #define DFSDM_CR2_REOCIE(v)	FIELD_PREP(DFSDM_CR2_REOCIE_MASK, v)  argument
146 #define DFSDM_CR2_JOVRIE_MASK	BIT(2)
147 #define DFSDM_CR2_JOVRIE(v)	FIELD_PREP(DFSDM_CR2_JOVRIE_MASK, v)  argument
148 #define DFSDM_CR2_ROVRIE_MASK	BIT(3)
149 #define DFSDM_CR2_ROVRIE(v)	FIELD_PREP(DFSDM_CR2_ROVRIE_MASK, v)  argument
150 #define DFSDM_CR2_AWDIE_MASK	BIT(4)
151 #define DFSDM_CR2_AWDIE(v)	FIELD_PREP(DFSDM_CR2_AWDIE_MASK, v)  argument
152 #define DFSDM_CR2_SCDIE_MASK	BIT(5)
153 #define DFSDM_CR2_SCDIE(v)	FIELD_PREP(DFSDM_CR2_SCDIE_MASK, v)  argument
154 #define DFSDM_CR2_CKABIE_MASK	BIT(6)
155 #define DFSDM_CR2_CKABIE(v)	FIELD_PREP(DFSDM_CR2_CKABIE_MASK, v)  argument
157 #define DFSDM_CR2_EXCH(v)	FIELD_PREP(DFSDM_CR2_EXCH_MASK, v)  argument
159 #define DFSDM_CR2_AWDCH(v)	FIELD_PREP(DFSDM_CR2_AWDCH_MASK, v)  argument
162 #define DFSDM_ISR_JEOCF_MASK	BIT(0)
163 #define DFSDM_ISR_JEOCF(v)	FIELD_PREP(DFSDM_ISR_JEOCF_MASK, v)  argument
164 #define DFSDM_ISR_REOCF_MASK	BIT(1)
165 #define DFSDM_ISR_REOCF(v)	FIELD_PREP(DFSDM_ISR_REOCF_MASK, v)  argument
166 #define DFSDM_ISR_JOVRF_MASK	BIT(2)
167 #define DFSDM_ISR_JOVRF(v)	FIELD_PREP(DFSDM_ISR_JOVRF_MASK, v)  argument
168 #define DFSDM_ISR_ROVRF_MASK	BIT(3)
169 #define DFSDM_ISR_ROVRF(v)	FIELD_PREP(DFSDM_ISR_ROVRF_MASK, v)  argument
170 #define DFSDM_ISR_AWDF_MASK	BIT(4)
171 #define DFSDM_ISR_AWDF(v)	FIELD_PREP(DFSDM_ISR_AWDF_MASK, v)  argument
172 #define DFSDM_ISR_JCIP_MASK	BIT(13)
173 #define DFSDM_ISR_JCIP(v)	FIELD_PREP(DFSDM_ISR_JCIP_MASK, v)  argument
174 #define DFSDM_ISR_RCIP_MASK	BIT(14)
175 #define DFSDM_ISR_RCIP(v)	FIELD_PREP(DFSDM_ISR_RCIP, v)  argument
177 #define DFSDM_ISR_CKABF(v)	FIELD_PREP(DFSDM_ISR_CKABF_MASK, v)  argument
179 #define DFSDM_ISR_SCDF(v)	FIELD_PREP(DFSDM_ISR_SCDF_MASK, v)  argument
182 #define DFSDM_ICR_CLRJOVRF_MASK	      BIT(2)
183 #define DFSDM_ICR_CLRJOVRF(v)	      FIELD_PREP(DFSDM_ICR_CLRJOVRF_MASK, v)  argument
184 #define DFSDM_ICR_CLRROVRF_MASK	      BIT(3)
185 #define DFSDM_ICR_CLRROVRF(v)	      FIELD_PREP(DFSDM_ICR_CLRROVRF_MASK, v)  argument
187 #define DFSDM_ICR_CLRCKABF(v)	      FIELD_PREP(DFSDM_ICR_CLRCKABF_MASK, v)  argument
188 #define DFSDM_ICR_CLRCKABF_CH_MASK(y) BIT(16 + (y))
189 #define DFSDM_ICR_CLRCKABF_CH(v, y)   \  argument
190 			   (((v) << (16 + (y))) & DFSDM_ICR_CLRCKABF_CH_MASK(y))
192 #define DFSDM_ICR_CLRSCDF(v)	      FIELD_PREP(DFSDM_ICR_CLRSCDF_MASK, v)  argument
193 #define DFSDM_ICR_CLRSCDF_CH_MASK(y)  BIT(24 + (y))
194 #define DFSDM_ICR_CLRSCDF_CH(v, y)    \  argument
195 			       (((v) << (24 + (y))) & DFSDM_ICR_CLRSCDF_MASK(y))
199 #define DFSDM_FCR_IOSR(v)	FIELD_PREP(DFSDM_FCR_IOSR_MASK, v)  argument
201 #define DFSDM_FCR_FOSR(v)	FIELD_PREP(DFSDM_FCR_FOSR_MASK, v)  argument
203 #define DFSDM_FCR_FORD(v)	FIELD_PREP(DFSDM_FCR_FORD_MASK, v)  argument
212 #define DFSDM_AWLTR_BKAWL(v)	FIELD_PREP(DFSDM_AWLTR_BKAWL_MASK, v)  argument
214 #define DFSDM_AWLTR_AWLT(v)	FIELD_PREP(DFSDM_AWLTR_AWLT_MASK, v)  argument
218 #define DFSDM_AWHTR_BKAWH(v)	FIELD_PREP(DFSDM_AWHTR_BKAWH_MASK, v)  argument
220 #define DFSDM_AWHTR_AWHT(v)	FIELD_PREP(DFSDM_AWHTR_AWHT_MASK, v)  argument
224 #define DFSDM_AWSR_AWLTF(v)	FIELD_PREP(DFSDM_AWSR_AWLTF_MASK, v)  argument
226 #define DFSDM_AWSR_AWHTF(v)	FIELD_PREP(DFSDM_AWSR_AWHTF_MASK, v)  argument
230 #define DFSDM_AWCFR_AWLTF(v)	FIELD_PREP(DFSDM_AWCFR_AWLTF_MASK, v)  argument
232 #define DFSDM_AWCFR_AWHTF(v)	FIELD_PREP(DFSDM_AWCFR_AWHTF_MASK, v)  argument
246  * struct stm32_dfsdm_filter_osr - DFSDM filter settings linked to oversampling
266  * struct stm32_dfsdm_filter - structure relative to stm32 FDSDM filter
280  * struct stm32_dfsdm_channel - structure relative to stm32 FDSDM channel
294  * struct stm32_dfsdm - stm32 FDSDM driver common data (for all instances)