568 static void stm32_adc_clr_bits(struct stm32_adc *adc, u32 reg, u32 bits)  in stm32_adc_clr_bits()  function
601 	stm32_adc_clr_bits(adc, adc->cfg->regs->ier_eoc.reg,  in stm32_adc_conv_irq_disable()
613 	stm32_adc_clr_bits(adc, adc->cfg->regs->ier_ovr.reg,  in stm32_adc_ovr_irq_disable()
705 			stm32_adc_clr_bits(adc, adc->cfg->regs->or_vdd.reg,  in stm32_adc_int_ch_disable()
754 	stm32_adc_clr_bits(adc, STM32F4_ADC_CR2, STM32F4_EXTEN_MASK);  in stm32f4_adc_stop_conv()
755 	stm32_adc_clr_bits(adc, STM32F4_ADC_SR, STM32F4_STRT);  in stm32f4_adc_stop_conv()
757 	stm32_adc_clr_bits(adc, STM32F4_ADC_CR1, STM32F4_SCAN);  in stm32f4_adc_stop_conv()
758 	stm32_adc_clr_bits(adc, STM32F4_ADC_CR2,  in stm32f4_adc_stop_conv()
766 	stm32_adc_clr_bits(adc, adc->cfg->regs->isr_eoc.reg, msk);  in stm32f4_adc_irq_clear()
804 	stm32_adc_clr_bits(adc, STM32H7_ADC_CFGR, STM32H7_DMNGT_MASK);  in stm32h7_adc_stop_conv()
821 	stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_DEEPPWD);  in stm32h7_adc_exit_pwr_down()
846 	stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_BOOST);  in stm32h7_adc_enter_pwr_down()
908 		stm32_adc_clr_bits(adc, STM32H7_ADC_CR, lincalrdyw_mask);  in stm32h7_adc_read_selfcalib()
977 		stm32_adc_clr_bits(adc, STM32H7_ADC_CR, lincalrdyw_mask);  in stm32h7_adc_restore_selfcalib()
1032 	stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_ADCALDIF);  in stm32h7_adc_selfcalib()
1033 	stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_ADCALLIN);  in stm32h7_adc_selfcalib()
1063 	stm32_adc_clr_bits(adc, STM32H7_ADC_CR,  in stm32h7_adc_selfcalib()
1328 	stm32_adc_clr_bits(adc, regs->sqr[0].reg, regs->sqr[0].mask);  in stm32_adc_single_conv()
1331 	stm32_adc_clr_bits(adc, regs->exten.reg, regs->exten.mask);  in stm32_adc_single_conv()