Lines Matching +full:stm32mp1 +full:- +full:adc
1 // SPDX-License-Identifier: GPL-2.0
3 * This file is part of STM32 ADC driver
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
8 * Inspired from: fsl-imx25-tsadc
26 #include "stm32-adc-core.h"
42 * struct stm32_adc_common_regs - stm32 common registers
47 * @ier: interrupt enable register offset for each adc
62 * struct stm32_adc_priv_cfg - stm32 core compatible configuration data
66 * @ipid: adc identification number
69 * @num_adcs: maximum number of ADC instances in the common registers
82 * struct stm32_adc_priv - stm32 ADC core private data
83 * @irq: irq(s) for ADC block
84 * @nb_adc_max: actual maximum number of instance per ADC block
96 * @common: common data for all ADC instances
124 /* STM32F4 ADC internal common clock prescaler division ratios */
128 * stm32f4_adc_clk_sel() - Select stm32f4 ADC common clock prescaler
130 * @priv: stm32 ADC core private data
131 * Select clock prescaler used for analog conversions, before using ADC.
141 if (!priv->aclk) { in stm32f4_adc_clk_sel()
142 dev_err(&pdev->dev, "No 'adc' clock found\n"); in stm32f4_adc_clk_sel()
143 return -ENOENT; in stm32f4_adc_clk_sel()
146 rate = clk_get_rate(priv->aclk); in stm32f4_adc_clk_sel()
148 dev_err(&pdev->dev, "Invalid clock rate: 0\n"); in stm32f4_adc_clk_sel()
149 return -EINVAL; in stm32f4_adc_clk_sel()
153 if ((rate / stm32f4_pclk_div[i]) <= priv->max_clk_rate) in stm32f4_adc_clk_sel()
157 dev_err(&pdev->dev, "adc clk selection failed\n"); in stm32f4_adc_clk_sel()
158 return -EINVAL; in stm32f4_adc_clk_sel()
161 priv->common.rate = rate / stm32f4_pclk_div[i]; in stm32f4_adc_clk_sel()
162 val = readl_relaxed(priv->common.base + STM32F4_ADC_CCR); in stm32f4_adc_clk_sel()
165 writel_relaxed(val, priv->common.base + STM32F4_ADC_CCR); in stm32f4_adc_clk_sel()
167 dev_dbg(&pdev->dev, "Using analog clock source at %ld kHz\n", in stm32f4_adc_clk_sel()
168 priv->common.rate / 1000); in stm32f4_adc_clk_sel()
174 * struct stm32h7_adc_ck_spec - specification for stm32h7 adc clock
175 * @ckmode: ADC clock mode, Async or sync with prescaler.
212 /* stm32h7 bus clock is common for all ADC instances (mandatory) */ in stm32h7_adc_clk_sel()
213 if (!priv->bclk) { in stm32h7_adc_clk_sel()
214 dev_err(&pdev->dev, "No 'bus' clock found\n"); in stm32h7_adc_clk_sel()
215 return -ENOENT; in stm32h7_adc_clk_sel()
219 * stm32h7 can use either 'bus' or 'adc' clock for analog circuitry. in stm32h7_adc_clk_sel()
220 * So, choice is to have bus clock mandatory and adc clock optional. in stm32h7_adc_clk_sel()
221 * If optional 'adc' clock has been found, then try to use it first. in stm32h7_adc_clk_sel()
223 if (priv->aclk) { in stm32h7_adc_clk_sel()
228 rate = clk_get_rate(priv->aclk); in stm32h7_adc_clk_sel()
230 dev_err(&pdev->dev, "Invalid adc clock rate: 0\n"); in stm32h7_adc_clk_sel()
231 return -EINVAL; in stm32h7_adc_clk_sel()
235 duty = clk_get_scaled_duty_cycle(priv->aclk, 100); in stm32h7_adc_clk_sel()
237 dev_warn(&pdev->dev, "adc clock duty: %d\n", duty); in stm32h7_adc_clk_sel()
254 if ((rate / div) <= priv->max_clk_rate) in stm32h7_adc_clk_sel()
260 rate = clk_get_rate(priv->bclk); in stm32h7_adc_clk_sel()
262 dev_err(&pdev->dev, "Invalid bus clock rate: 0\n"); in stm32h7_adc_clk_sel()
263 return -EINVAL; in stm32h7_adc_clk_sel()
266 duty = clk_get_scaled_duty_cycle(priv->bclk, 100); in stm32h7_adc_clk_sel()
268 dev_warn(&pdev->dev, "bus clock duty: %d\n", duty); in stm32h7_adc_clk_sel()
281 if ((rate / div) <= priv->max_clk_rate) in stm32h7_adc_clk_sel()
285 dev_err(&pdev->dev, "adc clk selection failed\n"); in stm32h7_adc_clk_sel()
286 return -EINVAL; in stm32h7_adc_clk_sel()
289 /* rate used later by each ADC instance to control BOOST mode */ in stm32h7_adc_clk_sel()
290 priv->common.rate = rate / div; in stm32h7_adc_clk_sel()
293 val = readl_relaxed(priv->common.base + STM32H7_ADC_CCR); in stm32h7_adc_clk_sel()
297 writel_relaxed(val, priv->common.base + STM32H7_ADC_CCR); in stm32h7_adc_clk_sel()
299 dev_dbg(&pdev->dev, "Using %s clock/%d source at %ld kHz\n", in stm32h7_adc_clk_sel()
300 ckmode ? "bus" : "adc", div, priv->common.rate / 1000); in stm32h7_adc_clk_sel()
330 unsigned int adc) in stm32_adc_eoc_enabled() argument
332 u32 ier, offset = stm32_adc_offset[adc]; in stm32_adc_eoc_enabled()
334 ier = readl_relaxed(priv->common.base + offset + priv->cfg->regs->ier); in stm32_adc_eoc_enabled()
336 return ier & priv->cfg->regs->eocie_msk; in stm32_adc_eoc_enabled()
339 /* ADC common interrupt for all instances */
348 status = readl_relaxed(priv->common.base + priv->cfg->regs->csr); in stm32_adc_irq_handler()
354 * - an ADC configured to use DMA (EOC triggers the DMA request, and in stm32_adc_irq_handler()
356 * - an ADC configured to use IRQs (EOCIE bit is set. The handler must in stm32_adc_irq_handler()
360 * IRQ-enabled ADCs). in stm32_adc_irq_handler()
362 for (i = 0; i < priv->nb_adc_max; i++) { in stm32_adc_irq_handler()
363 if ((status & priv->cfg->regs->eoc_msk[i] && in stm32_adc_irq_handler()
365 (status & priv->cfg->regs->ovr_msk[i])) in stm32_adc_irq_handler()
366 generic_handle_domain_irq(priv->domain, i); in stm32_adc_irq_handler()
375 irq_set_chip_data(irq, d->host_data); in stm32_adc_domain_map()
396 struct device_node *np = pdev->dev.of_node; in stm32_adc_irq_probe()
401 * - stm32f4/h7 shares a common interrupt line. in stm32_adc_irq_probe()
402 * - stm32mp1, has one line per ADC in stm32_adc_irq_probe()
404 for (i = 0; i < priv->cfg->num_irqs; i++) { in stm32_adc_irq_probe()
405 priv->irq[i] = platform_get_irq(pdev, i); in stm32_adc_irq_probe()
406 if (priv->irq[i] < 0) in stm32_adc_irq_probe()
407 return priv->irq[i]; in stm32_adc_irq_probe()
410 priv->domain = irq_domain_add_simple(np, STM32_ADC_MAX_ADCS, 0, in stm32_adc_irq_probe()
413 if (!priv->domain) { in stm32_adc_irq_probe()
414 dev_err(&pdev->dev, "Failed to add irq domain\n"); in stm32_adc_irq_probe()
415 return -ENOMEM; in stm32_adc_irq_probe()
418 for (i = 0; i < priv->cfg->num_irqs; i++) { in stm32_adc_irq_probe()
419 irq_set_chained_handler(priv->irq[i], stm32_adc_irq_handler); in stm32_adc_irq_probe()
420 irq_set_handler_data(priv->irq[i], priv); in stm32_adc_irq_probe()
432 for (hwirq = 0; hwirq < priv->nb_adc_max; hwirq++) in stm32_adc_irq_remove()
433 irq_dispose_mapping(irq_find_mapping(priv->domain, hwirq)); in stm32_adc_irq_remove()
434 irq_domain_remove(priv->domain); in stm32_adc_irq_remove()
436 for (i = 0; i < priv->cfg->num_irqs; i++) in stm32_adc_irq_remove()
437 irq_set_chained_handler(priv->irq[i], NULL); in stm32_adc_irq_remove()
446 * On STM32H7 and STM32MP1, the ADC inputs are multiplexed with analog in stm32_adc_core_switches_supply_en()
449 * - Voltage booster can be used, to get full ADC performances in stm32_adc_core_switches_supply_en()
451 * - Vdd can be used to supply them, if above 2.7V (STM32MP1 only). in stm32_adc_core_switches_supply_en()
454 * - vdda < 2.7V but vdd > 2.7V: ANASWVDD = 1, EN_BOOSTER = 0 (stm32mp1) in stm32_adc_core_switches_supply_en()
455 * - vdda < 2.7V and vdd < 2.7V: ANASWVDD = 0, EN_BOOSTER = 1 in stm32_adc_core_switches_supply_en()
456 * - vdda >= 2.7V: ANASWVDD = 0, EN_BOOSTER = 0 (default) in stm32_adc_core_switches_supply_en()
458 if (priv->vdda_uv < 2700000) { in stm32_adc_core_switches_supply_en()
459 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_en()
460 ret = regulator_enable(priv->vdd); in stm32_adc_core_switches_supply_en()
466 ret = regmap_write(priv->syscfg, in stm32_adc_core_switches_supply_en()
470 regulator_disable(priv->vdd); in stm32_adc_core_switches_supply_en()
479 if (priv->booster) { in stm32_adc_core_switches_supply_en()
481 * This is optional, as this is a trade-off between in stm32_adc_core_switches_supply_en()
484 ret = regulator_enable(priv->booster); in stm32_adc_core_switches_supply_en()
497 priv->vdda_uv); in stm32_adc_core_switches_supply_en()
504 if (priv->vdda_uv < 2700000) { in stm32_adc_core_switches_supply_dis()
505 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_dis()
506 regmap_write(priv->syscfg, STM32MP1_SYSCFG_PMCCLRR, in stm32_adc_core_switches_supply_dis()
508 regulator_disable(priv->vdd); in stm32_adc_core_switches_supply_dis()
511 if (priv->booster) in stm32_adc_core_switches_supply_dis()
512 regulator_disable(priv->booster); in stm32_adc_core_switches_supply_dis()
522 ret = regulator_enable(priv->vdda); in stm32_adc_core_hw_start()
528 ret = regulator_get_voltage(priv->vdda); in stm32_adc_core_hw_start()
533 priv->vdda_uv = ret; in stm32_adc_core_hw_start()
539 ret = regulator_enable(priv->vref); in stm32_adc_core_hw_start()
545 ret = clk_prepare_enable(priv->bclk); in stm32_adc_core_hw_start()
551 ret = clk_prepare_enable(priv->aclk); in stm32_adc_core_hw_start()
553 dev_err(dev, "adc clk enable failed\n"); in stm32_adc_core_hw_start()
557 writel_relaxed(priv->ccr_bak, priv->common.base + priv->cfg->regs->ccr); in stm32_adc_core_hw_start()
562 clk_disable_unprepare(priv->bclk); in stm32_adc_core_hw_start()
564 regulator_disable(priv->vref); in stm32_adc_core_hw_start()
568 regulator_disable(priv->vdda); in stm32_adc_core_hw_start()
579 priv->ccr_bak = readl_relaxed(priv->common.base + priv->cfg->regs->ccr); in stm32_adc_core_hw_stop()
580 clk_disable_unprepare(priv->aclk); in stm32_adc_core_hw_stop()
581 clk_disable_unprepare(priv->bclk); in stm32_adc_core_hw_stop()
582 regulator_disable(priv->vref); in stm32_adc_core_hw_stop()
584 regulator_disable(priv->vdda); in stm32_adc_core_hw_stop()
590 struct device_node *np = dev->of_node; in stm32_adc_core_switches_probe()
594 priv->syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in stm32_adc_core_switches_probe()
595 if (IS_ERR(priv->syscfg)) { in stm32_adc_core_switches_probe()
596 ret = PTR_ERR(priv->syscfg); in stm32_adc_core_switches_probe()
597 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
600 priv->syscfg = NULL; in stm32_adc_core_switches_probe()
604 if (priv->cfg->has_syscfg & HAS_VBOOSTER && in stm32_adc_core_switches_probe()
605 of_property_read_bool(np, "booster-supply")) { in stm32_adc_core_switches_probe()
606 priv->booster = devm_regulator_get_optional(dev, "booster"); in stm32_adc_core_switches_probe()
607 if (IS_ERR(priv->booster)) { in stm32_adc_core_switches_probe()
608 ret = PTR_ERR(priv->booster); in stm32_adc_core_switches_probe()
609 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
612 priv->booster = NULL; in stm32_adc_core_switches_probe()
617 if (priv->cfg->has_syscfg & HAS_ANASWVDD && in stm32_adc_core_switches_probe()
618 of_property_read_bool(np, "vdd-supply")) { in stm32_adc_core_switches_probe()
619 priv->vdd = devm_regulator_get_optional(dev, "vdd"); in stm32_adc_core_switches_probe()
620 if (IS_ERR(priv->vdd)) { in stm32_adc_core_switches_probe()
621 ret = PTR_ERR(priv->vdd); in stm32_adc_core_switches_probe()
622 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
625 priv->vdd = NULL; in stm32_adc_core_switches_probe()
629 if (priv->vdd) { in stm32_adc_core_switches_probe()
630 ret = regulator_enable(priv->vdd); in stm32_adc_core_switches_probe()
636 ret = regulator_get_voltage(priv->vdd); in stm32_adc_core_switches_probe()
639 regulator_disable(priv->vdd); in stm32_adc_core_switches_probe()
642 priv->vdd_uv = ret; in stm32_adc_core_switches_probe()
644 regulator_disable(priv->vdd); in stm32_adc_core_switches_probe()
653 struct device_node *np = pdev->dev.of_node; in stm32_adc_probe_identification()
659 if (!priv->cfg->ipid) in stm32_adc_probe_identification()
663 readl_relaxed(priv->common.base + STM32MP1_ADC_IPDR)); in stm32_adc_probe_identification()
664 if (id != priv->cfg->ipid) { in stm32_adc_probe_identification()
665 dev_err(&pdev->dev, "Unexpected IP version: 0x%x", id); in stm32_adc_probe_identification()
666 return -EINVAL; in stm32_adc_probe_identification()
673 /* Count child nodes with stm32 adc compatible */ in stm32_adc_probe_identification()
674 if (strstr(compat, "st,stm32") && strstr(compat, "adc")) in stm32_adc_probe_identification()
678 val = readl_relaxed(priv->common.base + STM32MP1_ADC_HWCFGR0); in stm32_adc_probe_identification()
679 priv->nb_adc_max = FIELD_GET(STM32MP1_ADCNUM_MASK, val); in stm32_adc_probe_identification()
680 if (count > priv->nb_adc_max) { in stm32_adc_probe_identification()
681 dev_err(&pdev->dev, "Unexpected child number: %d", count); in stm32_adc_probe_identification()
682 return -EINVAL; in stm32_adc_probe_identification()
685 val = readl_relaxed(priv->common.base + STM32MP1_ADC_VERR); in stm32_adc_probe_identification()
686 dev_dbg(&pdev->dev, "ADC version: %lu.%lu\n", in stm32_adc_probe_identification()
696 struct device *dev = &pdev->dev; in stm32_adc_probe()
697 struct device_node *np = pdev->dev.of_node; in stm32_adc_probe()
702 if (!pdev->dev.of_node) in stm32_adc_probe()
703 return -ENODEV; in stm32_adc_probe()
705 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in stm32_adc_probe()
707 return -ENOMEM; in stm32_adc_probe()
708 platform_set_drvdata(pdev, &priv->common); in stm32_adc_probe()
710 priv->cfg = (const struct stm32_adc_priv_cfg *) in stm32_adc_probe()
711 of_match_device(dev->driver->of_match_table, dev)->data; in stm32_adc_probe()
712 priv->nb_adc_max = priv->cfg->num_adcs; in stm32_adc_probe()
713 spin_lock_init(&priv->common.lock); in stm32_adc_probe()
716 priv->common.base = devm_ioremap_resource(&pdev->dev, res); in stm32_adc_probe()
717 if (IS_ERR(priv->common.base)) in stm32_adc_probe()
718 return PTR_ERR(priv->common.base); in stm32_adc_probe()
719 priv->common.phys_base = res->start; in stm32_adc_probe()
721 priv->vdda = devm_regulator_get(&pdev->dev, "vdda"); in stm32_adc_probe()
722 if (IS_ERR(priv->vdda)) in stm32_adc_probe()
723 return dev_err_probe(&pdev->dev, PTR_ERR(priv->vdda), in stm32_adc_probe()
726 priv->vref = devm_regulator_get(&pdev->dev, "vref"); in stm32_adc_probe()
727 if (IS_ERR(priv->vref)) in stm32_adc_probe()
728 return dev_err_probe(&pdev->dev, PTR_ERR(priv->vref), in stm32_adc_probe()
731 priv->aclk = devm_clk_get_optional(&pdev->dev, "adc"); in stm32_adc_probe()
732 if (IS_ERR(priv->aclk)) in stm32_adc_probe()
733 return dev_err_probe(&pdev->dev, PTR_ERR(priv->aclk), in stm32_adc_probe()
734 "Can't get 'adc' clock\n"); in stm32_adc_probe()
736 priv->bclk = devm_clk_get_optional(&pdev->dev, "bus"); in stm32_adc_probe()
737 if (IS_ERR(priv->bclk)) in stm32_adc_probe()
738 return dev_err_probe(&pdev->dev, PTR_ERR(priv->bclk), in stm32_adc_probe()
759 ret = regulator_get_voltage(priv->vref); in stm32_adc_probe()
761 dev_err(&pdev->dev, "vref get voltage failed, %d\n", ret); in stm32_adc_probe()
764 priv->common.vref_mv = ret / 1000; in stm32_adc_probe()
765 dev_dbg(&pdev->dev, "vref+=%dmV\n", priv->common.vref_mv); in stm32_adc_probe()
767 ret = of_property_read_u32(pdev->dev.of_node, "st,max-clk-rate-hz", in stm32_adc_probe()
770 priv->max_clk_rate = min(max_rate, priv->cfg->max_clk_rate_hz); in stm32_adc_probe()
772 priv->max_clk_rate = priv->cfg->max_clk_rate_hz; in stm32_adc_probe()
774 ret = priv->cfg->clk_sel(pdev, priv); in stm32_adc_probe()
782 ret = of_platform_populate(np, NULL, NULL, &pdev->dev); in stm32_adc_probe()
784 dev_err(&pdev->dev, "failed to populate DT children\n"); in stm32_adc_probe()
810 pm_runtime_get_sync(&pdev->dev); in stm32_adc_remove()
811 of_platform_depopulate(&pdev->dev); in stm32_adc_remove()
813 stm32_adc_core_hw_stop(&pdev->dev); in stm32_adc_remove()
814 pm_runtime_disable(&pdev->dev); in stm32_adc_remove()
815 pm_runtime_set_suspended(&pdev->dev); in stm32_adc_remove()
816 pm_runtime_put_noidle(&pdev->dev); in stm32_adc_remove()
873 .compatible = "st,stm32f4-adc-core",
876 .compatible = "st,stm32h7-adc-core",
879 .compatible = "st,stm32mp1-adc-core",
890 .name = "stm32-adc-core",
898 MODULE_DESCRIPTION("STMicroelectronics STM32 ADC core driver");
900 MODULE_ALIAS("platform:stm32-adc-core");