1 // SPDX-License-Identifier: GPL-2.0
4 #include <linux/clk.h>
32 	struct clk *adc_clk;
106 	regtemp = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_isr()
108 		iowrite32(regtemp, info->regs + NPCM_ADCCON);  in npcm_adc_isr()
109 		wake_up_interruptible(&info->wq);  in npcm_adc_isr()
110 		info->int_status = true;  in npcm_adc_isr()
122 	regtemp = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_read()
124 	info->int_status = false;  in npcm_adc_read()
126 		  NPCM_ADCCON_ADC_CONV, info->regs + NPCM_ADCCON);  in npcm_adc_read()
128 	ret = wait_event_interruptible_timeout(info->wq, info->int_status,  in npcm_adc_read()
131 		regtemp = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_read()
133 			/* if conversion failed - reset ADC module */  in npcm_adc_read()
134 			reset_control_assert(info->reset);  in npcm_adc_read()
136 			reset_control_deassert(info->reset);  in npcm_adc_read()
141 				  info->regs + NPCM_ADCCON);  in npcm_adc_read()
142 			dev_err(info->dev, "RESET ADC Complete\n");  in npcm_adc_read()
144 		return -ETIMEDOUT;  in npcm_adc_read()
149 	*val = ioread32(info->regs + NPCM_ADCDATA);  in npcm_adc_read()
150 	*val &= info->data->data_mask;  in npcm_adc_read()
165 		mutex_lock(&info->lock);  in npcm_adc_read_raw()
166 		ret = npcm_adc_read(info, val, chan->channel);  in npcm_adc_read_raw()
167 		mutex_unlock(&info->lock);  in npcm_adc_read_raw()
169 			dev_err(info->dev, "NPCM ADC read failed\n");  in npcm_adc_read_raw()
174 		if (!IS_ERR(info->vref)) {  in npcm_adc_read_raw()
175 			vref_uv = regulator_get_voltage(info->vref);  in npcm_adc_read_raw()
178 			*val = info->data->internal_vref;  in npcm_adc_read_raw()
180 		*val2 = info->data->res_bits;  in npcm_adc_read_raw()
183 		*val = info->adc_sample_hz;  in npcm_adc_read_raw()
186 		return -EINVAL;  in npcm_adc_read_raw()
197 	{ .compatible = "nuvoton,npcm750-adc", .data = &npxm7xx_adc_info},
198 	{ .compatible = "nuvoton,npcm845-adc", .data = &npxm8xx_adc_info},
211 	struct device *dev = &pdev->dev;  in npcm_adc_probe()
213 	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));  in npcm_adc_probe()
215 		return -ENOMEM;  in npcm_adc_probe()
218 	info->data = device_get_match_data(dev);  in npcm_adc_probe()
219 	if (!info->data)  in npcm_adc_probe()
220 		return -EINVAL;  in npcm_adc_probe()
222 	mutex_init(&info->lock);  in npcm_adc_probe()
224 	info->dev = &pdev->dev;  in npcm_adc_probe()
226 	info->regs = devm_platform_ioremap_resource(pdev, 0);  in npcm_adc_probe()
227 	if (IS_ERR(info->regs))  in npcm_adc_probe()
228 		return PTR_ERR(info->regs);  in npcm_adc_probe()
230 	info->reset = devm_reset_control_get(&pdev->dev, NULL);  in npcm_adc_probe()
231 	if (IS_ERR(info->reset))  in npcm_adc_probe()
232 		return PTR_ERR(info->reset);  in npcm_adc_probe()
234 	info->adc_clk = devm_clk_get(&pdev->dev, NULL);  in npcm_adc_probe()
235 	if (IS_ERR(info->adc_clk)) {  in npcm_adc_probe()
236 		dev_warn(&pdev->dev, "ADC clock failed: can't read clk\n");  in npcm_adc_probe()
237 		return PTR_ERR(info->adc_clk);  in npcm_adc_probe()
241 	reg_con = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_probe()
244 	info->adc_sample_hz = clk_get_rate(info->adc_clk) / ((div + 1) * 2);  in npcm_adc_probe()
248 		ret = -EINVAL;  in npcm_adc_probe()
252 	ret = devm_request_irq(&pdev->dev, irq, npcm_adc_isr, 0,  in npcm_adc_probe()
259 	reg_con = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_probe()
260 	info->vref = devm_regulator_get_optional(&pdev->dev, "vref");  in npcm_adc_probe()
261 	if (!IS_ERR(info->vref)) {  in npcm_adc_probe()
262 		ret = regulator_enable(info->vref);  in npcm_adc_probe()
264 			dev_err(&pdev->dev, "Can't enable ADC reference voltage\n");  in npcm_adc_probe()
269 			  info->regs + NPCM_ADCCON);  in npcm_adc_probe()
275 		if (PTR_ERR(info->vref) != -ENODEV) {  in npcm_adc_probe()
276 			ret = PTR_ERR(info->vref);  in npcm_adc_probe()
282 			  info->regs + NPCM_ADCCON);  in npcm_adc_probe()
285 	init_waitqueue_head(&info->wq);  in npcm_adc_probe()
287 	reg_con = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_probe()
291 	iowrite32(reg_con, info->regs + NPCM_ADCCON);  in npcm_adc_probe()
294 	iowrite32(reg_con | NPCM_ADCCON_ADC_CONV, info->regs + NPCM_ADCCON);  in npcm_adc_probe()
297 	indio_dev->name = dev_name(&pdev->dev);  in npcm_adc_probe()
298 	indio_dev->info = &npcm_adc_iio_info;  in npcm_adc_probe()
299 	indio_dev->modes = INDIO_DIRECT_MODE;  in npcm_adc_probe()
300 	indio_dev->channels = npcm_adc_iio_channels;  in npcm_adc_probe()
301 	indio_dev->num_channels = ARRAY_SIZE(npcm_adc_iio_channels);  in npcm_adc_probe()
305 		dev_err(&pdev->dev, "Couldn't register the device.\n");  in npcm_adc_probe()
314 	iowrite32(reg_con & ~NPCM_ADCCON_ADC_EN, info->regs + NPCM_ADCCON);  in npcm_adc_probe()
315 	if (!IS_ERR(info->vref))  in npcm_adc_probe()
316 		regulator_disable(info->vref);  in npcm_adc_probe()
318 	clk_disable_unprepare(info->adc_clk);  in npcm_adc_probe()
331 	regtemp = ioread32(info->regs + NPCM_ADCCON);  in npcm_adc_remove()
332 	iowrite32(regtemp & ~NPCM_ADCCON_ADC_EN, info->regs + NPCM_ADCCON);  in npcm_adc_remove()
333 	if (!IS_ERR(info->vref))  in npcm_adc_remove()
334 		regulator_disable(info->vref);  in npcm_adc_remove()
335 	clk_disable_unprepare(info->adc_clk);  in npcm_adc_remove()