138 #define at91_adc_readl(st, reg) \  macro
276 		st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel));  in at91_adc_trigger_handler()
285 	at91_adc_readl(st, AT91_ADC_LCDR);  in at91_adc_trigger_handler()
301 		st->last_value = at91_adc_readl(st, AT91_ADC_CHAN(st, st->chnb));  in handle_adc_eoc_trigger()
303 		at91_adc_readl(st, AT91_ADC_LCDR);  in handle_adc_eoc_trigger()
322 	reg = at91_adc_readl(st, AT91_ADC_TSXPOSR);  in at91_ts_sample()
333 	reg = at91_adc_readl(st, AT91_ADC_TSYPOSR);  in at91_ts_sample()
344 	reg = at91_adc_readl(st, AT91_ADC_TSPRESSR);  in at91_ts_sample()
376 	u32 status = at91_adc_readl(st, st->registers->status_register);  in at91_adc_rl_interrupt()
379 	status &= at91_adc_readl(st, AT91_ADC_IMR);  in at91_adc_rl_interrupt()
385 		reg = at91_adc_readl(st, AT91_ADC_MR);  in at91_adc_rl_interrupt()
397 		reg = at91_adc_readl(st, AT91_ADC_MR);  in at91_adc_rl_interrupt()
425 		st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))  in at91_adc_rl_interrupt()
427 		st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));  in at91_adc_rl_interrupt()
429 		st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))  in at91_adc_rl_interrupt()
431 		st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));  in at91_adc_rl_interrupt()
441 	u32 status = at91_adc_readl(st, st->registers->status_register);  in at91_adc_9x5_interrupt()
476 			at91_adc_readl(st, AT91_ADC_TSXPOSR);  in at91_adc_9x5_interrupt()
477 			at91_adc_readl(st, AT91_ADC_TSYPOSR);  in at91_adc_9x5_interrupt()
478 			at91_adc_readl(st, AT91_ADC_TSPRESSR);  in at91_adc_9x5_interrupt()
573 	u32 status = at91_adc_readl(st, reg->trigger_register);  in at91_adc_configure_trigger()
883 		reg = at91_adc_readl(st, AT91_ADC_MR);  in at91_ts_hw_init()