45 #define     AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_5		1
50 #define     AD7280A_CTRL_HB_CONV_RREAD_6CELL_AUX1_3_5		1
55 #define     AD7280A_CTRL_HB_CONV_START_CS			1
56 #define   AD7280A_CTRL_HB_CONV_AVG_MSK			GENMASK(2, 1)
58 #define     AD7280A_CTRL_HB_CONV_AVG_2				1
67 #define     AD7280A_CTRL_LB_ACQ_TIME_800ns			1
73 #define   AD7280A_CTRL_LB_INC_DEV_ADDR_MSK		BIT(1)
84 #define     AD7280A_ALERT_REMOVE_AUX3_AUX5		BIT(1)
124 #define AD7280A_MAX_SPI_CLK_HZ		700000 /* < 1MHz */
129 					AD7280A_CELL_VOLTAGE_1_REG + 1)
139 static const unsigned short ad7280a_n_avg[4] = {1, 2, 4, 8};
163  * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F
200 static int ad7280_check_crc(struct ad7280_state *st, unsigned int val)  in ad7280_check_crc()  argument
202 	unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10);  in ad7280_check_crc()
218 static void ad7280_delay(struct ad7280_state *st)  in ad7280_delay()  argument
220 	if (st->readback_delay_us < 50)  in ad7280_delay()
221 		udelay(st->readback_delay_us);  in ad7280_delay()
226 static int __ad7280_read32(struct ad7280_state *st, unsigned int *val)  in __ad7280_read32()  argument
230 		.tx_buf	= &st->tx,  in __ad7280_read32()
231 		.rx_buf = &st->rx,  in __ad7280_read32()
232 		.len = sizeof(st->tx),  in __ad7280_read32()
235 	st->tx = cpu_to_be32(AD7280A_READ_TXVAL);  in __ad7280_read32()
237 	ret = spi_sync_transfer(st->spi, &t, 1);  in __ad7280_read32()
241 	*val = be32_to_cpu(st->rx);  in __ad7280_read32()
246 static int ad7280_write(struct ad7280_state *st, unsigned int devaddr,  in ad7280_write()  argument
255 			ad7280_calc_crc8(st->crc_tab, reg >> 11));  in ad7280_write()
259 	st->tx = cpu_to_be32(reg);  in ad7280_write()
261 	return spi_write(st->spi, &st->tx, sizeof(st->tx));  in ad7280_write()
264 static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr,  in ad7280_read_reg()  argument
271 	ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,  in ad7280_read_reg()
277 				      st->oversampling_ratio));  in ad7280_read_reg()
282 	ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0,  in ad7280_read_reg()
288 				      st->oversampling_ratio));  in ad7280_read_reg()
293 	ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0,  in ad7280_read_reg()
298 	ret = __ad7280_read32(st, &tmp);  in ad7280_read_reg()
302 	if (ad7280_check_crc(st, tmp))  in ad7280_read_reg()
312 static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr,  in ad7280_read_channel()  argument
318 	ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0,  in ad7280_read_channel()
323 	ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,  in ad7280_read_channel()
329 				      st->oversampling_ratio));  in ad7280_read_channel()
333 	ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0,  in ad7280_read_channel()
341 				      st->oversampling_ratio));  in ad7280_read_channel()
345 	ad7280_delay(st);  in ad7280_read_channel()
347 	ret = __ad7280_read32(st, &tmp);  in ad7280_read_channel()
351 	if (ad7280_check_crc(st, tmp))  in ad7280_read_channel()
361 static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt,  in ad7280_read_all_channels()  argument
367 	ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1,  in ad7280_read_all_channels()
372 	ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,  in ad7280_read_all_channels()
380 				      st->oversampling_ratio));  in ad7280_read_all_channels()
384 	ad7280_delay(st);  in ad7280_read_all_channels()
387 		ret = __ad7280_read32(st, &tmp);  in ad7280_read_all_channels()
391 		if (ad7280_check_crc(st, tmp))  in ad7280_read_all_channels()
407 	struct ad7280_state *st = data;  in ad7280_sw_power_down()  local
409 	ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,  in ad7280_sw_power_down()
411 		     FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio));  in ad7280_sw_power_down()
414 static int ad7280_chain_setup(struct ad7280_state *st)  in ad7280_chain_setup()  argument
419 	ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1,  in ad7280_chain_setup()
420 			   FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) |  in ad7280_chain_setup()
421 			   FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) |  in ad7280_chain_setup()
423 			   FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 1) |  in ad7280_chain_setup()
424 			   st->ctrl_lb);  in ad7280_chain_setup()
428 	ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1,  in ad7280_chain_setup()
429 			   FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) |  in ad7280_chain_setup()
430 			   FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) |  in ad7280_chain_setup()
433 			   st->ctrl_lb);  in ad7280_chain_setup()
437 	ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1,  in ad7280_chain_setup()
443 		ret = __ad7280_read32(st, &val);  in ad7280_chain_setup()
448 			return n - 1;  in ad7280_chain_setup()
450 		if (ad7280_check_crc(st, val)) {  in ad7280_chain_setup()
463 	ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1,  in ad7280_chain_setup()
465 		     FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio));  in ad7280_chain_setup()
474 	struct ad7280_state *st = iio_priv(indio_dev);  in ad7280_show_balance_sw()  local
477 			  !!(st->cb_mask[chan->address >> 8] &  in ad7280_show_balance_sw()
486 	struct ad7280_state *st = iio_priv(indio_dev);  in ad7280_store_balance_sw()  local
498 	mutex_lock(&st->lock);  in ad7280_store_balance_sw()
500 		st->cb_mask[devaddr] |= BIT(ch);  in ad7280_store_balance_sw()
502 		st->cb_mask[devaddr] &= ~BIT(ch);  in ad7280_store_balance_sw()
504 	ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE_REG, 0,  in ad7280_store_balance_sw()
506 				      st->cb_mask[devaddr]));  in ad7280_store_balance_sw()
507 	mutex_unlock(&st->lock);  in ad7280_store_balance_sw()
517 	struct ad7280_state *st = iio_priv(indio_dev);  in ad7280_show_balance_timer()  local
521 	mutex_lock(&st->lock);  in ad7280_show_balance_timer()
522 	ret = ad7280_read_reg(st, chan->address >> 8,  in ad7280_show_balance_timer()
524 	mutex_unlock(&st->lock);  in ad7280_show_balance_timer()
539 	struct ad7280_state *st = iio_priv(indio_dev);  in ad7280_store_balance_timer()  local
553 	mutex_lock(&st->lock);  in ad7280_store_balance_timer()
554 	ret = ad7280_write(st, chan->address >> 8,  in ad7280_store_balance_timer()
557 	mutex_unlock(&st->lock);  in ad7280_store_balance_timer()
593 	chan->differential = 1;  in ad7280_voltage_channel_init()
595 	chan->channel2 = chan->channel + 1;  in ad7280_voltage_channel_init()
617 	chan->indexed = 1;  in ad7280_common_fields_init()
632 	chan->differential = 1;  in ad7280_total_voltage_channel_init()
636 	chan->indexed = 1;  in ad7280_total_voltage_channel_init()
645 static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt,  in ad7280_init_dev_channels()  argument
652 		chan = &st->channels[*cnt];  in ad7280_init_dev_channels()
669 static int ad7280_channel_init(struct ad7280_state *st, bool irq_present)  in ad7280_channel_init()  argument
673 	st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 1,  in ad7280_channel_init()
674 				    sizeof(*st->channels), GFP_KERNEL);  in ad7280_channel_init()
675 	if (!st->channels)  in ad7280_channel_init()
678 	for (dev = 0; dev <= st->slave_num; dev++)  in ad7280_channel_init()
679 		ad7280_init_dev_channels(st, dev, &cnt, irq_present);  in ad7280_channel_init()
681 	ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev);  in ad7280_channel_init()
683 	return cnt + 1;  in ad7280_channel_init()
692 	struct ad7280_state *st = iio_priv(indio_dev);  in ad7280a_read_thresh()  local
698 			*val = 1000 + (st->cell_threshhigh * 1568L) / 100;  in ad7280a_read_thresh()
701 			*val = 1000 + (st->cell_threshlow * 1568L) / 100;  in ad7280a_read_thresh()
710 			*val = ((st->aux_threshhigh) * 196L) / 10;  in ad7280a_read_thresh()
713 			*val = (st->aux_threshlow * 196L) / 10;  in ad7280a_read_thresh()
731 	struct ad7280_state *st = iio_priv(indio_dev);  in ad7280a_write_thresh()  local
739 	mutex_lock(&st->lock);  in ad7280a_write_thresh()
747 			ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,  in ad7280a_write_thresh()
748 					   1, value);  in ad7280a_write_thresh()
751 			st->cell_threshhigh = value;  in ad7280a_write_thresh()
755 			ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,  in ad7280a_write_thresh()
756 					   1, value);  in ad7280a_write_thresh()
759 			st->cell_threshlow = value;  in ad7280a_write_thresh()
772 			ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,  in ad7280a_write_thresh()
773 					   1, value);  in ad7280a_write_thresh()
776 			st->aux_threshhigh = value;  in ad7280a_write_thresh()
780 			ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr,  in ad7280a_write_thresh()
781 					   1, value);  in ad7280a_write_thresh()
784 			st->aux_threshlow = value;  in ad7280a_write_thresh()
797 	mutex_unlock(&st->lock);  in ad7280a_write_thresh()
805 	struct ad7280_state *st = iio_priv(indio_dev);  in ad7280_event_handler()  local
809 	channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL);  in ad7280_event_handler()
813 	ret = ad7280_read_all_channels(st, st->scan_cnt, channels);  in ad7280_event_handler()
817 	for (i = 0; i < st->scan_cnt; i++) {  in ad7280_event_handler()
823 			if (val >= st->cell_threshhigh) {  in ad7280_event_handler()
824 				u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0,  in ad7280_event_handler()
830 			} else if (val <= st->cell_threshlow) {  in ad7280_event_handler()
831 				u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0,  in ad7280_event_handler()
839 			if (val >= st->aux_threshhigh) {  in ad7280_event_handler()
845 			} else if (val <= st->aux_threshlow) {  in ad7280_event_handler()
861 static void ad7280_update_delay(struct ad7280_state *st)  in ad7280_update_delay()  argument
866 	 *			   tACQ + ((N - 1) * tDELAY)  in ad7280_update_delay()
871 	st->readback_delay_us =  in ad7280_update_delay()
872 		((ad7280a_t_acq_ns[st->acquisition_time & 0x3] + 720) *  in ad7280_update_delay()
873 			(AD7280A_NUM_CH * ad7280a_n_avg[st->oversampling_ratio & 0x3])) -  in ad7280_update_delay()
874 		ad7280a_t_acq_ns[st->acquisition_time & 0x3] + st->slave_num * 250;  in ad7280_update_delay()
877 	st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000);  in ad7280_update_delay()
878 	st->readback_delay_us += 5; /* Add tWAIT */  in ad7280_update_delay()
887 	struct ad7280_state *st = iio_priv(indio_dev);  in ad7280_read_raw()  local
892 		mutex_lock(&st->lock);  in ad7280_read_raw()
894 			ret = ad7280_read_all_channels(st, st->scan_cnt, NULL);  in ad7280_read_raw()
896 			ret = ad7280_read_channel(st, chan->address >> 8,  in ad7280_read_raw()
898 		mutex_unlock(&st->lock);  in ad7280_read_raw()
915 		*val = ad7280a_n_avg[st->oversampling_ratio];  in ad7280_read_raw()
925 	struct ad7280_state *st = iio_priv(indio_dev);  in ad7280_write_raw()  local
934 				st->oversampling_ratio = i;  in ad7280_write_raw()
935 				ad7280_update_delay(st);  in ad7280_write_raw()
960 	struct ad7280_state *st;  in ad7280_probe()  local
964 	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));  in ad7280_probe()
968 	st = iio_priv(indio_dev);  in ad7280_probe()
970 	st->spi = spi;  in ad7280_probe()
971 	mutex_init(&st->lock);  in ad7280_probe()
973 	st->thermistor_term_en =  in ad7280_probe()
985 			st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns;  in ad7280_probe()
988 			st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_800ns;  in ad7280_probe()
991 			st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1200ns;  in ad7280_probe()
994 			st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1600ns;  in ad7280_probe()
1001 		st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns;  in ad7280_probe()
1014 			st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN4_VIN5;  in ad7280_probe()
1017 			st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN5;  in ad7280_probe()
1027 	crc8_populate_msb(st->crc_tab, POLYNOM);  in ad7280_probe()
1029 	st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ;  in ad7280_probe()
1030 	st->spi->mode = SPI_MODE_1;  in ad7280_probe()
1031 	spi_setup(st->spi);  in ad7280_probe()
1033 	st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, st->acquisition_time) |  in ad7280_probe()
1034 		FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, st->thermistor_term_en);  in ad7280_probe()
1035 	st->oversampling_ratio = 0; /* No oversampling */  in ad7280_probe()
1037 	ret = ad7280_chain_setup(st);  in ad7280_probe()
1041 	st->slave_num = ret;  in ad7280_probe()
1042 	st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH;  in ad7280_probe()
1043 	st->cell_threshhigh = 0xFF;  in ad7280_probe()
1044 	st->aux_threshhigh = 0xFF;  in ad7280_probe()
1046 	ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st);  in ad7280_probe()
1050 	ad7280_update_delay(st);  in ad7280_probe()
1055 	ret = ad7280_channel_init(st, spi->irq > 0);  in ad7280_probe()
1060 	indio_dev->channels = st->channels;  in ad7280_probe()
1062 		ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,  in ad7280_probe()
1063 				   AD7280A_ALERT_REG, 1,  in ad7280_probe()
1068 		ret = ad7280_write(st, ad7280a_devaddr(st->slave_num),  in ad7280_probe()
1072 					      st->chain_last_alert_ignore));  in ad7280_probe()