Lines Matching +full:vref +full:- +full:buffered
1 // SPDX-License-Identifier: GPL-2.0+
171 struct regulator *vref[4]; member
199 .name = "ad7124-4",
204 .name = "ad7124-8",
220 diff_new = abs(val - array[i]); in ad7124_find_closest_match()
239 ret = ad_sd_read_reg(&st->sd, addr, bytes, &readval); in ad7124_spi_write_mask()
246 return ad_sd_write_reg(&st->sd, addr, bytes, readval); in ad7124_spi_write_mask()
254 st->adc_control &= ~AD7124_ADC_CTRL_MODE_MSK; in ad7124_set_mode()
255 st->adc_control |= AD7124_ADC_CTRL_MODE(mode); in ad7124_set_mode()
257 return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_set_mode()
264 fclk = clk_get_rate(st->mclk); in ad7124_set_channel_odr()
278 if (odr_sel_bits != st->channels[channel].cfg.odr_sel_bits) in ad7124_set_channel_odr()
279 st->channels[channel].cfg.live = false; in ad7124_set_channel_odr()
282 st->channels[channel].cfg.odr = DIV_ROUND_CLOSEST(fclk, odr_sel_bits * 32); in ad7124_set_channel_odr()
283 st->channels[channel].cfg.odr_sel_bits = odr_sel_bits; in ad7124_set_channel_odr()
291 fadc = st->channels[channel].cfg.odr; in ad7124_get_3db_filter_freq()
293 switch (st->channels[channel].cfg.filter_type) { in ad7124_get_3db_filter_freq()
299 return -EINVAL; in ad7124_get_3db_filter_freq()
322 if (new_odr != st->channels[channel].cfg.odr) in ad7124_set_3db_filter_freq()
323 st->channels[channel].cfg.live = false; in ad7124_set_3db_filter_freq()
325 st->channels[channel].cfg.filter_type = new_filter; in ad7124_set_3db_filter_freq()
326 st->channels[channel].cfg.odr = new_odr; in ad7124_set_3db_filter_freq()
336 cmp_size = (u8 *)&cfg->live - (u8 *)cfg; in ad7124_find_similar_live_cfg()
337 for (i = 0; i < st->num_channels; i++) { in ad7124_find_similar_live_cfg()
338 cfg_aux = &st->channels[i].cfg; in ad7124_find_similar_live_cfg()
340 if (cfg_aux->live && !memcmp(cfg, cfg_aux, cmp_size)) in ad7124_find_similar_live_cfg()
351 free_cfg_slot = find_first_zero_bit(&st->cfg_slots_status, AD7124_MAX_CONFIGS); in ad7124_find_free_config_slot()
353 return -1; in ad7124_find_free_config_slot()
360 unsigned int refsel = cfg->refsel; in ad7124_init_config_vref()
366 if (IS_ERR(st->vref[refsel])) { in ad7124_init_config_vref()
367 dev_err(&st->sd.spi->dev, in ad7124_init_config_vref()
370 return PTR_ERR(st->vref[refsel]); in ad7124_init_config_vref()
372 cfg->vref_mv = regulator_get_voltage(st->vref[refsel]); in ad7124_init_config_vref()
374 cfg->vref_mv /= 1000; in ad7124_init_config_vref()
377 cfg->vref_mv = 2500; in ad7124_init_config_vref()
378 st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK; in ad7124_init_config_vref()
379 st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); in ad7124_init_config_vref()
380 return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, in ad7124_init_config_vref()
381 2, st->adc_control); in ad7124_init_config_vref()
383 dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel); in ad7124_init_config_vref()
384 return -EINVAL; in ad7124_init_config_vref()
395 cfg->cfg_slot = cfg_slot; in ad7124_write_config()
397 tmp = (cfg->buf_positive << 1) + cfg->buf_negative; in ad7124_write_config()
398 val = AD7124_CONFIG_BIPOLAR(cfg->bipolar) | AD7124_CONFIG_REF_SEL(cfg->refsel) | in ad7124_write_config()
400 ret = ad_sd_write_reg(&st->sd, AD7124_CONFIG(cfg->cfg_slot), 2, val); in ad7124_write_config()
404 tmp = AD7124_FILTER_TYPE_SEL(cfg->filter_type); in ad7124_write_config()
405 ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_TYPE_MSK, in ad7124_write_config()
410 ret = ad7124_spi_write_mask(st, AD7124_FILTER(cfg->cfg_slot), AD7124_FILTER_FS_MSK, in ad7124_write_config()
411 AD7124_FILTER_FS(cfg->odr_sel_bits), 3); in ad7124_write_config()
415 return ad7124_spi_write_mask(st, AD7124_CONFIG(cfg->cfg_slot), AD7124_CONFIG_PGA_MSK, in ad7124_write_config()
416 AD7124_CONFIG_PGA(cfg->pga_bits), 2); in ad7124_write_config()
430 ret = kfifo_get(&st->live_cfgs_fifo, &lru_cfg); in ad7124_pop_config()
434 lru_cfg->live = false; in ad7124_pop_config()
437 assign_bit(lru_cfg->cfg_slot, &st->cfg_slots_status, 0); in ad7124_pop_config()
440 for (i = 0; i < st->num_channels; i++) { in ad7124_pop_config()
441 cfg = &st->channels[i].cfg; in ad7124_pop_config()
443 if (cfg->cfg_slot == lru_cfg->cfg_slot) in ad7124_pop_config()
444 cfg->live = false; in ad7124_pop_config()
458 kfifo_put(&st->live_cfgs_fifo, cfg); in ad7124_push_config()
463 return -EINVAL; in ad7124_push_config()
466 free_cfg_slot = lru_cfg->cfg_slot; in ad7124_push_config()
467 kfifo_put(&st->live_cfgs_fifo, cfg); in ad7124_push_config()
471 assign_bit(free_cfg_slot, &st->cfg_slots_status, 1); in ad7124_push_config()
478 ch->cfg.live = true; in ad7124_enable_channel()
479 return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(ch->nr), 2, ch->ain | in ad7124_enable_channel()
480 AD7124_CHANNEL_SETUP(ch->cfg.cfg_slot) | AD7124_CHANNEL_EN(1)); in ad7124_enable_channel()
485 struct ad7124_channel_config *cfg = &st->channels[address].cfg; in ad7124_prepare_read()
492 if (!cfg->live) { in ad7124_prepare_read()
498 cfg->cfg_slot = live_cfg->cfg_slot; in ad7124_prepare_read()
502 return ad7124_enable_channel(st, &st->channels[address]); in ad7124_prepare_read()
517 mutex_lock(&st->cfgs_lock); in ad7124_set_channel()
519 mutex_unlock(&st->cfgs_lock); in ad7124_set_channel()
527 unsigned int adc_control = st->adc_control; in ad7124_append_status()
533 ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, adc_control); in ad7124_append_status()
537 st->adc_control = adc_control; in ad7124_append_status()
548 for (i = 0; i < st->num_channels; i++) { in ad7124_disable_all()
585 ret = ad_sd_write_reg(&st->sd, AD7124_CHANNEL(chan->address), 2, in ad7124_read_raw()
586 st->channels[chan->address].ain | AD7124_CHANNEL_EN(0)); in ad7124_read_raw()
592 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
594 idx = st->channels[chan->address].cfg.pga_bits; in ad7124_read_raw()
595 *val = st->channels[chan->address].cfg.vref_mv; in ad7124_read_raw()
596 if (st->channels[chan->address].cfg.bipolar) in ad7124_read_raw()
597 *val2 = chan->scan_type.realbits - 1 + idx; in ad7124_read_raw()
599 *val2 = chan->scan_type.realbits + idx; in ad7124_read_raw()
601 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
604 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
605 if (st->channels[chan->address].cfg.bipolar) in ad7124_read_raw()
606 *val = -(1 << (chan->scan_type.realbits - 1)); in ad7124_read_raw()
610 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
613 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
614 *val = st->channels[chan->address].cfg.odr; in ad7124_read_raw()
615 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
619 mutex_lock(&st->cfgs_lock); in ad7124_read_raw()
620 *val = ad7124_get_3db_filter_freq(st, chan->scan_index); in ad7124_read_raw()
621 mutex_unlock(&st->cfgs_lock); in ad7124_read_raw()
625 return -EINVAL; in ad7124_read_raw()
634 unsigned int res, gain, full_scale, vref; in ad7124_write_raw() local
637 mutex_lock(&st->cfgs_lock); in ad7124_write_raw()
642 ret = -EINVAL; in ad7124_write_raw()
646 ad7124_set_channel_odr(st, chan->address, val); in ad7124_write_raw()
650 ret = -EINVAL; in ad7124_write_raw()
654 if (st->channels[chan->address].cfg.bipolar) in ad7124_write_raw()
655 full_scale = 1 << (chan->scan_type.realbits - 1); in ad7124_write_raw()
657 full_scale = 1 << chan->scan_type.realbits; in ad7124_write_raw()
659 vref = st->channels[chan->address].cfg.vref_mv * 1000000LL; in ad7124_write_raw()
660 res = DIV_ROUND_CLOSEST(vref, full_scale); in ad7124_write_raw()
664 if (st->channels[chan->address].cfg.pga_bits != res) in ad7124_write_raw()
665 st->channels[chan->address].cfg.live = false; in ad7124_write_raw()
667 st->channels[chan->address].cfg.pga_bits = res; in ad7124_write_raw()
671 ret = -EINVAL; in ad7124_write_raw()
675 ad7124_set_3db_filter_freq(st, chan->address, val); in ad7124_write_raw()
678 ret = -EINVAL; in ad7124_write_raw()
681 mutex_unlock(&st->cfgs_lock); in ad7124_write_raw()
694 return -EINVAL; in ad7124_reg_access()
697 ret = ad_sd_read_reg(&st->sd, reg, ad7124_reg_size[reg], in ad7124_reg_access()
700 ret = ad_sd_write_reg(&st->sd, reg, ad7124_reg_size[reg], in ad7124_reg_access()
726 mutex_lock(&st->cfgs_lock); in ad7124_update_scan_mode()
727 for (i = 0; i < st->num_channels; i++) { in ad7124_update_scan_mode()
730 ret = __ad7124_set_channel(&st->sd, i); in ad7124_update_scan_mode()
735 mutex_unlock(&st->cfgs_lock); in ad7124_update_scan_mode()
741 mutex_unlock(&st->cfgs_lock); in ad7124_update_scan_mode()
760 ret = ad_sd_reset(&st->sd, 64); in ad7124_soft_reset()
766 ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval); in ad7124_soft_reset()
775 } while (--timeout); in ad7124_soft_reset()
777 dev_err(&st->sd.spi->dev, "Soft reset failed\n"); in ad7124_soft_reset()
779 return -EIO; in ad7124_soft_reset()
787 ret = ad_sd_read_reg(&st->sd, AD7124_ID, 1, &readval); in ad7124_check_chip_id()
794 if (chip_id != st->chip_info->chip_id) { in ad7124_check_chip_id()
795 dev_err(&st->sd.spi->dev, in ad7124_check_chip_id()
797 st->chip_info->chip_id, chip_id); in ad7124_check_chip_id()
798 return -ENODEV; in ad7124_check_chip_id()
802 dev_err(&st->sd.spi->dev, in ad7124_check_chip_id()
804 return -ENODEV; in ad7124_check_chip_id()
821 st->num_channels = of_get_available_child_count(np); in ad7124_of_parse_channel_config()
822 if (!st->num_channels) { in ad7124_of_parse_channel_config()
823 dev_err(indio_dev->dev.parent, "no channel children\n"); in ad7124_of_parse_channel_config()
824 return -ENODEV; in ad7124_of_parse_channel_config()
827 chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, in ad7124_of_parse_channel_config()
830 return -ENOMEM; in ad7124_of_parse_channel_config()
832 channels = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*channels), in ad7124_of_parse_channel_config()
835 return -ENOMEM; in ad7124_of_parse_channel_config()
837 indio_dev->channels = chan; in ad7124_of_parse_channel_config()
838 indio_dev->num_channels = st->num_channels; in ad7124_of_parse_channel_config()
839 st->channels = channels; in ad7124_of_parse_channel_config()
842 cfg = &st->channels[channel].cfg; in ad7124_of_parse_channel_config()
848 if (channel >= indio_dev->num_channels) { in ad7124_of_parse_channel_config()
849 dev_err(indio_dev->dev.parent, in ad7124_of_parse_channel_config()
851 ret = -EINVAL; in ad7124_of_parse_channel_config()
855 ret = of_property_read_u32_array(child, "diff-channels", in ad7124_of_parse_channel_config()
860 st->channels[channel].nr = channel; in ad7124_of_parse_channel_config()
861 st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) | in ad7124_of_parse_channel_config()
864 cfg->bipolar = of_property_read_bool(child, "bipolar"); in ad7124_of_parse_channel_config()
866 ret = of_property_read_u32(child, "adi,reference-select", &tmp); in ad7124_of_parse_channel_config()
868 cfg->refsel = AD7124_INT_REF; in ad7124_of_parse_channel_config()
870 cfg->refsel = tmp; in ad7124_of_parse_channel_config()
872 cfg->buf_positive = of_property_read_bool(child, "adi,buffered-positive"); in ad7124_of_parse_channel_config()
873 cfg->buf_negative = of_property_read_bool(child, "adi,buffered-negative"); in ad7124_of_parse_channel_config()
894 fclk = clk_get_rate(st->mclk); in ad7124_setup()
896 return -EINVAL; in ad7124_setup()
903 ret = clk_set_rate(st->mclk, fclk); in ad7124_setup()
909 st->adc_control &= ~AD7124_ADC_CTRL_PWR_MSK; in ad7124_setup()
910 st->adc_control |= AD7124_ADC_CTRL_PWR(power_mode); in ad7124_setup()
911 ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); in ad7124_setup()
915 mutex_init(&st->cfgs_lock); in ad7124_setup()
916 INIT_KFIFO(st->live_cfgs_fifo); in ad7124_setup()
917 for (i = 0; i < st->num_channels; i++) { in ad7124_setup()
919 ret = ad7124_init_config_vref(st, &st->channels[i].cfg); in ad7124_setup()
946 info = of_device_get_match_data(&spi->dev); in ad7124_probe()
948 return -ENODEV; in ad7124_probe()
950 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in ad7124_probe()
952 return -ENOMEM; in ad7124_probe()
956 st->chip_info = info; in ad7124_probe()
958 indio_dev->name = st->chip_info->name; in ad7124_probe()
959 indio_dev->modes = INDIO_DIRECT_MODE; in ad7124_probe()
960 indio_dev->info = &ad7124_info; in ad7124_probe()
962 ret = ad_sd_init(&st->sd, indio_dev, spi, &ad7124_sigma_delta_info); in ad7124_probe()
966 ret = ad7124_of_parse_channel_config(indio_dev, spi->dev.of_node); in ad7124_probe()
970 for (i = 0; i < ARRAY_SIZE(st->vref); i++) { in ad7124_probe()
974 st->vref[i] = devm_regulator_get_optional(&spi->dev, in ad7124_probe()
976 if (PTR_ERR(st->vref[i]) == -ENODEV) in ad7124_probe()
978 else if (IS_ERR(st->vref[i])) in ad7124_probe()
979 return PTR_ERR(st->vref[i]); in ad7124_probe()
981 ret = regulator_enable(st->vref[i]); in ad7124_probe()
985 ret = devm_add_action_or_reset(&spi->dev, ad7124_reg_disable, in ad7124_probe()
986 st->vref[i]); in ad7124_probe()
991 st->mclk = devm_clk_get_enabled(&spi->dev, "mclk"); in ad7124_probe()
992 if (IS_ERR(st->mclk)) in ad7124_probe()
993 return PTR_ERR(st->mclk); in ad7124_probe()
1007 ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev); in ad7124_probe()
1011 return devm_iio_device_register(&spi->dev, indio_dev); in ad7124_probe()
1016 { .compatible = "adi,ad7124-4",
1018 { .compatible = "adi,ad7124-8",