360 	u32 op1_val, op2_val;  in hci_dma_queue_xfer()  local
366 	op1_val = rh_reg_read(RING_OPERATION1);  in hci_dma_queue_xfer()
367 	enqueue_ptr = FIELD_GET(RING_OP1_CR_ENQ_PTR, op1_val);  in hci_dma_queue_xfer()
430 	op1_val = rh_reg_read(RING_OPERATION1);  in hci_dma_queue_xfer()
431 	op1_val &= ~RING_OP1_CR_ENQ_PTR;  in hci_dma_queue_xfer()
432 	op1_val |= FIELD_PREP(RING_OP1_CR_ENQ_PTR, enqueue_ptr);  in hci_dma_queue_xfer()
433 	rh_reg_write(RING_OPERATION1, op1_val);  in hci_dma_queue_xfer()
497 	u32 op1_val, op2_val, resp, *ring_resp;  in hci_dma_xfer_done()  local
534 	op1_val = rh_reg_read(RING_OPERATION1);  in hci_dma_xfer_done()
535 	op1_val &= ~RING_OP1_CR_SW_DEQ_PTR;  in hci_dma_xfer_done()
536 	op1_val |= FIELD_PREP(RING_OP1_CR_SW_DEQ_PTR, done_ptr);  in hci_dma_xfer_done()
537 	rh_reg_write(RING_OPERATION1, op1_val);  in hci_dma_xfer_done()
588 	u32 op1_val, op2_val, ibi_status_error;  in hci_dma_process_ibi()  local
595 	op1_val = rh_reg_read(RING_OPERATION1);  in hci_dma_process_ibi()
596 	deq_ptr = FIELD_GET(RING_OP1_IBI_DEQ_PTR, op1_val);  in hci_dma_process_ibi()
717 	op1_val = rh_reg_read(RING_OPERATION1);  in hci_dma_process_ibi()
718 	op1_val &= ~RING_OP1_IBI_DEQ_PTR;  in hci_dma_process_ibi()
719 	op1_val |= FIELD_PREP(RING_OP1_IBI_DEQ_PTR, deq_ptr);  in hci_dma_process_ibi()
720 	rh_reg_write(RING_OPERATION1, op1_val);  in hci_dma_process_ibi()