Lines Matching +full:idle +full:- +full:wait +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* linux/drivers/i2c/busses/i2c-s3c2410.c
17 #include <linux/delay.h>
35 #include <linux/platform_data/i2c-s3c2410.h>
81 /* Max time to wait for bus to become idle after a xfer (in us) */
97 wait_queue_head_t wait; member
128 .name = "s3c2410-i2c",
131 .name = "s3c2440-i2c",
134 .name = "s3c2440-hdmiphy-i2c",
144 { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 },
145 { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 },
146 { .compatible = "samsung,s3c2440-hdmiphy-i2c",
148 { .compatible = "samsung,exynos5-sata-phy-i2c",
160 if (pdev->dev.of_node) in s3c24xx_get_device_quirks()
161 return (kernel_ulong_t)of_device_get_match_data(&pdev->dev); in s3c24xx_get_device_quirks()
163 return platform_get_device_id(pdev)->driver_data; in s3c24xx_get_device_quirks()
172 dev_dbg(i2c->dev, "master_complete %d\n", ret); in s3c24xx_i2c_master_complete()
174 i2c->msg_ptr = 0; in s3c24xx_i2c_master_complete()
175 i2c->msg = NULL; in s3c24xx_i2c_master_complete()
176 i2c->msg_idx++; in s3c24xx_i2c_master_complete()
177 i2c->msg_num = 0; in s3c24xx_i2c_master_complete()
179 i2c->msg_idx = ret; in s3c24xx_i2c_master_complete()
181 if (!(i2c->quirks & QUIRK_POLL)) in s3c24xx_i2c_master_complete()
182 wake_up(&i2c->wait); in s3c24xx_i2c_master_complete()
189 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_ack()
190 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_ack()
197 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_ack()
198 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_ack()
206 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_irq()
207 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_irq()
214 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_irq()
215 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_irq()
222 for (tries = 50; tries; --tries) { in is_ack()
223 if (readl(i2c->regs + S3C2410_IICCON) in is_ack()
225 if (!(readl(i2c->regs + S3C2410_IICSTAT) in is_ack()
231 dev_err(i2c->dev, "ack was not received\n"); in is_ack()
241 unsigned int addr = (msg->addr & 0x7f) << 1; in s3c24xx_i2c_message_start()
248 if (msg->flags & I2C_M_RD) { in s3c24xx_i2c_message_start()
254 if (msg->flags & I2C_M_REV_DIR_ADDR) in s3c24xx_i2c_message_start()
257 /* todo - check for whether ack wanted or not */ in s3c24xx_i2c_message_start()
260 iiccon = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_message_start()
261 writel(stat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
263 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr); in s3c24xx_i2c_message_start()
264 writeb(addr, i2c->regs + S3C2410_IICDS); in s3c24xx_i2c_message_start()
267 * delay here to ensure the data byte has gotten onto the bus in s3c24xx_i2c_message_start()
270 ndelay(i2c->tx_setup); in s3c24xx_i2c_message_start()
272 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon); in s3c24xx_i2c_message_start()
273 writel(iiccon, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_message_start()
276 writel(stat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
278 if (i2c->quirks & QUIRK_POLL) { in s3c24xx_i2c_message_start()
279 while ((i2c->msg_num != 0) && is_ack(i2c)) { in s3c24xx_i2c_message_start()
281 stat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
284 dev_err(i2c->dev, "deal with arbitration loss\n"); in s3c24xx_i2c_message_start()
291 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_stop()
293 dev_dbg(i2c->dev, "STOP\n"); in s3c24xx_i2c_stop()
297 * 1) I2CSTAT.5 = 0 - Clear BUSY (or 'generate STOP') in s3c24xx_i2c_stop()
298 * 2) I2CCON.4 = 0 - Clear IRQPEND in s3c24xx_i2c_stop()
299 * 3) Wait until the stop condition takes effect. in s3c24xx_i2c_stop()
300 * 4*) I2CSTAT.4 = 0 - Clear TXRXEN in s3c24xx_i2c_stop()
306 * Master->Slave when they complete generating a STOP condition. in s3c24xx_i2c_stop()
319 * To avoid these extra post-STOP transactions on HDMI phy devices, we in s3c24xx_i2c_stop()
329 if (i2c->quirks & QUIRK_HDMIPHY) { in s3c24xx_i2c_stop()
336 writel(iicstat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_stop()
338 i2c->state = STATE_STOP; in s3c24xx_i2c_stop()
354 return i2c->msg_idx >= (i2c->msg_num - 1); in is_lastmsg()
363 * msg->len is always 1 for the first byte of smbus block read. in is_msglast()
367 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1) in is_msglast()
370 return i2c->msg_ptr == i2c->msg->len-1; in is_msglast()
378 return i2c->msg_ptr >= i2c->msg->len; in is_msgend()
390 switch (i2c->state) { in i2c_s3c_irq_nextbyte()
393 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__); in i2c_s3c_irq_nextbyte()
397 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__); in i2c_s3c_irq_nextbyte()
407 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { in i2c_s3c_irq_nextbyte()
409 dev_dbg(i2c->dev, "ack was not received\n"); in i2c_s3c_irq_nextbyte()
410 s3c24xx_i2c_stop(i2c, -ENXIO); in i2c_s3c_irq_nextbyte()
414 if (i2c->msg->flags & I2C_M_RD) in i2c_s3c_irq_nextbyte()
415 i2c->state = STATE_READ; in i2c_s3c_irq_nextbyte()
417 i2c->state = STATE_WRITE; in i2c_s3c_irq_nextbyte()
423 if (is_lastmsg(i2c) && i2c->msg->len == 0) { in i2c_s3c_irq_nextbyte()
428 if (i2c->state == STATE_READ) in i2c_s3c_irq_nextbyte()
441 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) { in i2c_s3c_irq_nextbyte()
443 dev_dbg(i2c->dev, "WRITE: No Ack\n"); in i2c_s3c_irq_nextbyte()
445 s3c24xx_i2c_stop(i2c, -ECONNREFUSED); in i2c_s3c_irq_nextbyte()
453 byte = i2c->msg->buf[i2c->msg_ptr++]; in i2c_s3c_irq_nextbyte()
454 writeb(byte, i2c->regs + S3C2410_IICDS); in i2c_s3c_irq_nextbyte()
457 * delay after writing the byte to allow the in i2c_s3c_irq_nextbyte()
463 ndelay(i2c->tx_setup); in i2c_s3c_irq_nextbyte()
468 dev_dbg(i2c->dev, "WRITE: Next Message\n"); in i2c_s3c_irq_nextbyte()
470 i2c->msg_ptr = 0; in i2c_s3c_irq_nextbyte()
471 i2c->msg_idx++; in i2c_s3c_irq_nextbyte()
472 i2c->msg++; in i2c_s3c_irq_nextbyte()
475 if (i2c->msg->flags & I2C_M_NOSTART) { in i2c_s3c_irq_nextbyte()
477 if (i2c->msg->flags & I2C_M_RD) { in i2c_s3c_irq_nextbyte()
483 dev_dbg(i2c->dev, in i2c_s3c_irq_nextbyte()
484 "missing START before write->read\n"); in i2c_s3c_irq_nextbyte()
485 s3c24xx_i2c_stop(i2c, -EINVAL); in i2c_s3c_irq_nextbyte()
492 s3c24xx_i2c_message_start(i2c, i2c->msg); in i2c_s3c_irq_nextbyte()
493 i2c->state = STATE_START; in i2c_s3c_irq_nextbyte()
508 byte = readb(i2c->regs + S3C2410_IICDS); in i2c_s3c_irq_nextbyte()
509 i2c->msg->buf[i2c->msg_ptr++] = byte; in i2c_s3c_irq_nextbyte()
512 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1) in i2c_s3c_irq_nextbyte()
513 i2c->msg->len += byte; in i2c_s3c_irq_nextbyte()
528 dev_dbg(i2c->dev, "READ: Send Stop\n"); in i2c_s3c_irq_nextbyte()
533 dev_dbg(i2c->dev, "READ: Next Transfer\n"); in i2c_s3c_irq_nextbyte()
535 i2c->msg_ptr = 0; in i2c_s3c_irq_nextbyte()
536 i2c->msg_idx++; in i2c_s3c_irq_nextbyte()
537 i2c->msg++; in i2c_s3c_irq_nextbyte()
547 tmp = readl(i2c->regs + S3C2410_IICCON); in i2c_s3c_irq_nextbyte()
549 writel(tmp, i2c->regs + S3C2410_IICCON); in i2c_s3c_irq_nextbyte()
563 status = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_irq()
567 dev_err(i2c->dev, "deal with arbitration loss\n"); in s3c24xx_i2c_irq()
570 if (i2c->state == STATE_IDLE) { in s3c24xx_i2c_irq()
571 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n"); in s3c24xx_i2c_irq()
573 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_irq()
575 writel(tmp, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_irq()
594 * If there is an event on the bus, or we have a pre-existing event at
603 tmp = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_disable_bus()
605 writel(tmp, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_disable_bus()
608 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_bus()
611 writel(tmp, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_bus()
623 while (timeout-- > 0) { in s3c24xx_i2c_set_master()
624 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_set_master()
632 return -ETIMEDOUT; in s3c24xx_i2c_set_master()
636 * wait for the i2c bus to become idle.
642 unsigned long delay; in s3c24xx_i2c_wait_idle() local
647 dev_dbg(i2c->dev, "waiting for bus idle\n"); in s3c24xx_i2c_wait_idle()
652 * Most of the time, the bus is already idle within a few usec of the in s3c24xx_i2c_wait_idle()
657 * instructions so busy wait briefly to avoid scheduling overhead. in s3c24xx_i2c_wait_idle()
660 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
661 while ((iicstat & S3C2410_IICSTAT_START) && --spins) { in s3c24xx_i2c_wait_idle()
663 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
667 * If we do get an appreciable delay as a compromise between idle in s3c24xx_i2c_wait_idle()
673 delay = 1; in s3c24xx_i2c_wait_idle()
676 usleep_range(delay, 2 * delay); in s3c24xx_i2c_wait_idle()
677 if (delay < S3C2410_IDLE_TIMEOUT / 10) in s3c24xx_i2c_wait_idle()
678 delay <<= 1; in s3c24xx_i2c_wait_idle()
680 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
684 dev_warn(i2c->dev, "timeout waiting for bus idle\n"); in s3c24xx_i2c_wait_idle()
698 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret); in s3c24xx_i2c_doxfer()
699 ret = -EAGAIN; in s3c24xx_i2c_doxfer()
703 i2c->msg = msgs; in s3c24xx_i2c_doxfer()
704 i2c->msg_num = num; in s3c24xx_i2c_doxfer()
705 i2c->msg_ptr = 0; in s3c24xx_i2c_doxfer()
706 i2c->msg_idx = 0; in s3c24xx_i2c_doxfer()
707 i2c->state = STATE_START; in s3c24xx_i2c_doxfer()
712 if (i2c->quirks & QUIRK_POLL) { in s3c24xx_i2c_doxfer()
713 ret = i2c->msg_idx; in s3c24xx_i2c_doxfer()
716 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); in s3c24xx_i2c_doxfer()
721 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); in s3c24xx_i2c_doxfer()
723 ret = i2c->msg_idx; in s3c24xx_i2c_doxfer()
730 dev_dbg(i2c->dev, "timeout\n"); in s3c24xx_i2c_doxfer()
732 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); in s3c24xx_i2c_doxfer()
735 if (i2c->quirks & QUIRK_HDMIPHY) in s3c24xx_i2c_doxfer()
743 i2c->state = STATE_IDLE; in s3c24xx_i2c_doxfer()
755 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data; in s3c24xx_i2c_xfer()
759 ret = clk_enable(i2c->clk); in s3c24xx_i2c_xfer()
763 for (retry = 0; retry < adap->retries; retry++) { in s3c24xx_i2c_xfer()
767 if (ret != -EAGAIN) { in s3c24xx_i2c_xfer()
768 clk_disable(i2c->clk); in s3c24xx_i2c_xfer()
772 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); in s3c24xx_i2c_xfer()
777 clk_disable(i2c->clk); in s3c24xx_i2c_xfer()
778 return -EREMOTEIO; in s3c24xx_i2c_xfer()
808 calc_divs += calc_div1-1; in s3c24xx_i2c_calcdivisor()
829 struct s3c2410_platform_i2c *pdata = i2c->pdata; in s3c24xx_i2c_clockrate()
830 unsigned long clkin = clk_get_rate(i2c->clk); in s3c24xx_i2c_clockrate()
836 i2c->clkrate = clkin; in s3c24xx_i2c_clockrate()
839 dev_dbg(i2c->dev, "pdata desired frequency %lu\n", pdata->frequency); in s3c24xx_i2c_clockrate()
841 target_frequency = pdata->frequency ?: I2C_MAX_STANDARD_MODE_FREQ; in s3c24xx_i2c_clockrate()
848 dev_err(i2c->dev, in s3c24xx_i2c_clockrate()
851 return -EINVAL; in s3c24xx_i2c_clockrate()
856 iiccon = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_clockrate()
858 iiccon |= (divs-1); in s3c24xx_i2c_clockrate()
863 if (i2c->quirks & QUIRK_POLL) in s3c24xx_i2c_clockrate()
866 writel(iiccon, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_clockrate()
868 if (i2c->quirks & QUIRK_S3C2440) { in s3c24xx_i2c_clockrate()
871 if (pdata->sda_delay) { in s3c24xx_i2c_clockrate()
872 sda_delay = clkin * pdata->sda_delay; in s3c24xx_i2c_clockrate()
881 dev_dbg(i2c->dev, "IICLC=%08lx\n", sda_delay); in s3c24xx_i2c_clockrate()
882 writel(sda_delay, i2c->regs + S3C2440_IICLC); in s3c24xx_i2c_clockrate()
900 delta_f = clk_get_rate(i2c->clk) - i2c->clkrate; in s3c24xx_i2c_cpufreq_transition()
902 /* if we're post-change and the input clock has slowed down in s3c24xx_i2c_cpufreq_transition()
903 * or at pre-change and the clock is about to speed up, then in s3c24xx_i2c_cpufreq_transition()
909 i2c_lock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER); in s3c24xx_i2c_cpufreq_transition()
911 i2c_unlock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER); in s3c24xx_i2c_cpufreq_transition()
914 dev_err(i2c->dev, "cannot find frequency (%d)\n", ret); in s3c24xx_i2c_cpufreq_transition()
916 dev_info(i2c->dev, "setting freq %d\n", got); in s3c24xx_i2c_cpufreq_transition()
924 i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition; in s3c24xx_i2c_register_cpufreq()
926 return cpufreq_register_notifier(&i2c->freq_transition, in s3c24xx_i2c_register_cpufreq()
932 cpufreq_unregister_notifier(&i2c->freq_transition, in s3c24xx_i2c_deregister_cpufreq()
952 if (i2c->quirks & QUIRK_NO_GPIO) in s3c24xx_i2c_parse_dt_gpio()
956 i2c->gpios[i] = devm_gpiod_get_index(i2c->dev, NULL, in s3c24xx_i2c_parse_dt_gpio()
958 if (IS_ERR(i2c->gpios[i])) { in s3c24xx_i2c_parse_dt_gpio()
959 dev_err(i2c->dev, "i2c gpio invalid at index %d\n", i); in s3c24xx_i2c_parse_dt_gpio()
960 return -EINVAL; in s3c24xx_i2c_parse_dt_gpio()
983 pdata = i2c->pdata; in s3c24xx_i2c_init()
987 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD); in s3c24xx_i2c_init()
989 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr); in s3c24xx_i2c_init()
991 writel(0, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_init()
992 writel(0, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_init()
997 dev_err(i2c->dev, "cannot meet bus frequency required\n"); in s3c24xx_i2c_init()
998 return -EINVAL; in s3c24xx_i2c_init()
1001 /* todo - check that the i2c lines aren't being dragged anywhere */ in s3c24xx_i2c_init()
1003 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq); in s3c24xx_i2c_init()
1004 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02x\n", in s3c24xx_i2c_init()
1005 readl(i2c->regs + S3C2410_IICCON)); in s3c24xx_i2c_init()
1017 struct s3c2410_platform_i2c *pdata = i2c->pdata; in s3c24xx_i2c_parse_dt()
1023 pdata->bus_num = -1; /* i2c bus number is dynamically assigned */ in s3c24xx_i2c_parse_dt()
1024 of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay); in s3c24xx_i2c_parse_dt()
1025 of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr); in s3c24xx_i2c_parse_dt()
1026 of_property_read_u32(np, "samsung,i2c-max-bus-freq", in s3c24xx_i2c_parse_dt()
1027 (u32 *)&pdata->frequency); in s3c24xx_i2c_parse_dt()
1031 * interrupts for 4-channel HS-I2C controller are enabled. in s3c24xx_i2c_parse_dt()
1033 * are available then re-configure the interrupts via the in s3c24xx_i2c_parse_dt()
1037 i2c->sysreg = syscon_regmap_lookup_by_phandle(np, in s3c24xx_i2c_parse_dt()
1038 "samsung,sysreg-phandle"); in s3c24xx_i2c_parse_dt()
1039 if (IS_ERR(i2c->sysreg)) in s3c24xx_i2c_parse_dt()
1042 regmap_update_bits(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, BIT(id), 0); in s3c24xx_i2c_parse_dt()
1056 if (!pdev->dev.of_node) { in s3c24xx_i2c_probe()
1057 pdata = dev_get_platdata(&pdev->dev); in s3c24xx_i2c_probe()
1059 dev_err(&pdev->dev, "no platform data\n"); in s3c24xx_i2c_probe()
1060 return -EINVAL; in s3c24xx_i2c_probe()
1064 i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL); in s3c24xx_i2c_probe()
1066 return -ENOMEM; in s3c24xx_i2c_probe()
1068 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); in s3c24xx_i2c_probe()
1069 if (!i2c->pdata) in s3c24xx_i2c_probe()
1070 return -ENOMEM; in s3c24xx_i2c_probe()
1072 i2c->quirks = s3c24xx_get_device_quirks(pdev); in s3c24xx_i2c_probe()
1073 i2c->sysreg = ERR_PTR(-ENOENT); in s3c24xx_i2c_probe()
1075 memcpy(i2c->pdata, pdata, sizeof(*pdata)); in s3c24xx_i2c_probe()
1077 s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c); in s3c24xx_i2c_probe()
1079 strscpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name)); in s3c24xx_i2c_probe()
1080 i2c->adap.owner = THIS_MODULE; in s3c24xx_i2c_probe()
1081 i2c->adap.algo = &s3c24xx_i2c_algorithm; in s3c24xx_i2c_probe()
1082 i2c->adap.retries = 2; in s3c24xx_i2c_probe()
1083 i2c->adap.class = I2C_CLASS_DEPRECATED; in s3c24xx_i2c_probe()
1084 i2c->tx_setup = 50; in s3c24xx_i2c_probe()
1086 init_waitqueue_head(&i2c->wait); in s3c24xx_i2c_probe()
1089 i2c->dev = &pdev->dev; in s3c24xx_i2c_probe()
1090 i2c->clk = devm_clk_get(&pdev->dev, "i2c"); in s3c24xx_i2c_probe()
1091 if (IS_ERR(i2c->clk)) { in s3c24xx_i2c_probe()
1092 dev_err(&pdev->dev, "cannot get clock\n"); in s3c24xx_i2c_probe()
1093 return -ENOENT; in s3c24xx_i2c_probe()
1096 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk); in s3c24xx_i2c_probe()
1100 i2c->regs = devm_ioremap_resource(&pdev->dev, res); in s3c24xx_i2c_probe()
1102 if (IS_ERR(i2c->regs)) in s3c24xx_i2c_probe()
1103 return PTR_ERR(i2c->regs); in s3c24xx_i2c_probe()
1105 dev_dbg(&pdev->dev, "registers %p (%p)\n", in s3c24xx_i2c_probe()
1106 i2c->regs, res); in s3c24xx_i2c_probe()
1109 i2c->adap.algo_data = i2c; in s3c24xx_i2c_probe()
1110 i2c->adap.dev.parent = &pdev->dev; in s3c24xx_i2c_probe()
1111 i2c->pctrl = devm_pinctrl_get_select_default(i2c->dev); in s3c24xx_i2c_probe()
1114 if (i2c->pdata->cfg_gpio) in s3c24xx_i2c_probe()
1115 i2c->pdata->cfg_gpio(to_platform_device(i2c->dev)); in s3c24xx_i2c_probe()
1116 else if (IS_ERR(i2c->pctrl) && s3c24xx_i2c_parse_dt_gpio(i2c)) in s3c24xx_i2c_probe()
1117 return -EINVAL; in s3c24xx_i2c_probe()
1120 ret = clk_prepare_enable(i2c->clk); in s3c24xx_i2c_probe()
1122 dev_err(&pdev->dev, "I2C clock enable failed\n"); in s3c24xx_i2c_probe()
1127 clk_disable(i2c->clk); in s3c24xx_i2c_probe()
1129 dev_err(&pdev->dev, "I2C controller init failed\n"); in s3c24xx_i2c_probe()
1130 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1138 if (!(i2c->quirks & QUIRK_POLL)) { in s3c24xx_i2c_probe()
1139 i2c->irq = ret = platform_get_irq(pdev, 0); in s3c24xx_i2c_probe()
1141 dev_err(&pdev->dev, "cannot find IRQ\n"); in s3c24xx_i2c_probe()
1142 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1146 ret = devm_request_irq(&pdev->dev, i2c->irq, s3c24xx_i2c_irq, in s3c24xx_i2c_probe()
1147 0, dev_name(&pdev->dev), i2c); in s3c24xx_i2c_probe()
1149 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq); in s3c24xx_i2c_probe()
1150 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1157 dev_err(&pdev->dev, "failed to register cpufreq notifier\n"); in s3c24xx_i2c_probe()
1158 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1168 i2c->adap.nr = i2c->pdata->bus_num; in s3c24xx_i2c_probe()
1169 i2c->adap.dev.of_node = pdev->dev.of_node; in s3c24xx_i2c_probe()
1173 pm_runtime_enable(&pdev->dev); in s3c24xx_i2c_probe()
1175 ret = i2c_add_numbered_adapter(&i2c->adap); in s3c24xx_i2c_probe()
1177 pm_runtime_disable(&pdev->dev); in s3c24xx_i2c_probe()
1179 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1183 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev)); in s3c24xx_i2c_probe()
1191 clk_unprepare(i2c->clk); in s3c24xx_i2c_remove()
1193 pm_runtime_disable(&pdev->dev); in s3c24xx_i2c_remove()
1197 i2c_del_adapter(&i2c->adap); in s3c24xx_i2c_remove()
1207 i2c_mark_adapter_suspended(&i2c->adap); in s3c24xx_i2c_suspend_noirq()
1209 if (!IS_ERR(i2c->sysreg)) in s3c24xx_i2c_suspend_noirq()
1210 regmap_read(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, &i2c->sys_i2c_cfg); in s3c24xx_i2c_suspend_noirq()
1220 if (!IS_ERR(i2c->sysreg)) in s3c24xx_i2c_resume_noirq()
1221 regmap_write(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, i2c->sys_i2c_cfg); in s3c24xx_i2c_resume_noirq()
1223 ret = clk_enable(i2c->clk); in s3c24xx_i2c_resume_noirq()
1227 clk_disable(i2c->clk); in s3c24xx_i2c_resume_noirq()
1228 i2c_mark_adapter_resumed(&i2c->adap); in s3c24xx_i2c_resume_noirq()
1250 .name = "s3c-i2c",