Lines Matching +full:slave +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-only
8 * Copyright (C) 2004-2005 Deep Blue Solutions Ltd.
13 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
14 * Jan 2003: added limited signal handling [Kai-Uwe Bloem]
16 * Dec 2004: Added support for PXA27x and slave device probing [Liam Girdwood]
17 * Feb 2005: Rework slave mode handling [RMK]
34 #include <linux/platform_data/i2c-pxa.h>
52 #define ICR_SSDIE (1 << 11) /* slave STOP detected int enable */
54 #define ICR_SADIE (1 << 13) /* slave address detected int enable */
56 #define ICR_FM (1 << 15) /* fast mode */
57 #define ICR_HS (1 << 16) /* High Speed mode */
58 #define ICR_A3700_FM (1 << 16) /* fast mode for armada-3700 */
59 #define ICR_A3700_HS (1 << 17) /* high speed mode for armada-3700 */
60 #define ICR_GPIOEN (1 << 19) /* enable GPIO mode for SCL in HS */
62 #define ISR_RWM (1 << 0) /* read/write mode */
66 #define ISR_SSD (1 << 4) /* slave stop detected */
71 #define ISR_SAD (1 << 9) /* slave address detected */
91 * looking at a multi-master environment
95 #define NO_SLAVE (-ENXIO)
96 #define BUS_ERROR (-EREMOTEIO)
97 #define XFER_NAKED (-ECONNREFUSED)
98 #define I2C_RETRY (-2000) /* an error has occurred retry transmit */
104 * 13 SADIE 0 (Disables the unit from interrupting on slave addresses
105 * matching its slave address)
107 * in master mode)
108 * 11 SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode)
112 * 7 GCD 1 (Disables i2c unit response to general call messages as a slave)
114 * 5 SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
126 * 9 SAD 1 (Clear slave address detected)
130 * 4 SSD 1 (Clear Slave Stop Detected)
206 { .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX },
208 { .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA910 },
209 { .compatible = "marvell,armada-3700-i2c", .data = (void *)REGS_A3700 },
215 { "pxa2xx-i2c", REGS_PXA2XX },
216 { "pxa3xx-pwri2c", REGS_PXA3XX },
217 { "ce4100-i2c", REGS_CE4100 },
218 { "pxa910-i2c", REGS_PXA910 },
219 { "armada-3700-i2c", REGS_A3700 },
237 struct i2c_client *slave; member
269 #define _IBMR(i2c) ((i2c)->reg_ibmr)
270 #define _IDBR(i2c) ((i2c)->reg_idbr)
271 #define _ICR(i2c) ((i2c)->reg_icr)
272 #define _ISR(i2c) ((i2c)->reg_isr)
273 #define _ISAR(i2c) ((i2c)->reg_isar)
274 #define _ILCR(i2c) ((i2c)->reg_ilcr)
275 #define _IWCR(i2c) ((i2c)->reg_iwcr)
278 * I2C Slave mode address
295 while (num--) { in decode_bits()
296 const char *str = val & bits->mask ? bits->set : bits->unset; in decode_bits()
352 dev_dbg(&i2c->adap.dev, "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno, in i2c_pxa_show_state()
361 struct device *dev = &i2c->adap.dev; in i2c_pxa_scream_blue_murder()
364 i2c->req_slave_addr >> 1, why); in i2c_pxa_scream_blue_murder()
366 i2c->msg_num, i2c->msg_idx, i2c->msg_ptr); in i2c_pxa_scream_blue_murder()
371 for (i = 0; i < i2c->irqlogidx; i++) in i2c_pxa_scream_blue_murder()
372 pr_cont(" [%03x:%05x]", i2c->isrlog[i], i2c->icrlog[i]); in i2c_pxa_scream_blue_murder()
399 dev_dbg(&i2c->adap.dev, "%s: called in slave mode\n", __func__); in i2c_pxa_abort()
414 i --; in i2c_pxa_abort()
434 if (!timeout--) in i2c_pxa_wait_bus_not_busy()
452 dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n", in i2c_pxa_wait_master()
457 dev_dbg(&i2c->adap.dev, "%s: Slave detected\n", __func__); in i2c_pxa_wait_master()
468 dev_dbg(&i2c->adap.dev, "%s: done\n", __func__); in i2c_pxa_wait_master()
476 dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__); in i2c_pxa_wait_master()
484 dev_dbg(&i2c->adap.dev, "setting to bus master\n"); in i2c_pxa_set_master()
487 dev_dbg(&i2c->adap.dev, "%s: unit is busy\n", __func__); in i2c_pxa_set_master()
489 dev_dbg(&i2c->adap.dev, "%s: error: unit busy\n", __func__); in i2c_pxa_set_master()
509 dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n", in i2c_pxa_wait_slave()
516 dev_dbg(&i2c->adap.dev, "%s: done\n", __func__); in i2c_pxa_wait_slave()
524 dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__); in i2c_pxa_wait_slave()
548 dev_err(&i2c->adap.dev, "%s: wait timedout\n", in i2c_pxa_set_slave()
558 dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", readl(_ICR(i2c)), readl(_ISR(i2c))); in i2c_pxa_set_slave()
573 if (i2c->reg_isar && IS_ENABLED(CONFIG_I2C_PXA_SLAVE)) in i2c_pxa_do_reset()
574 writel(i2c->slave_addr, _ISAR(i2c)); in i2c_pxa_do_reset()
577 writel(I2C_ICR_INIT | (i2c->fast_mode ? i2c->fm_mask : 0), _ICR(i2c)); in i2c_pxa_do_reset()
578 writel(readl(_ICR(i2c)) | (i2c->high_mode ? i2c->hs_mask : 0), _ICR(i2c)); in i2c_pxa_do_reset()
581 dev_info(&i2c->adap.dev, "Enabling slave mode\n"); in i2c_pxa_do_reset()
608 * PXA I2C Slave mode
618 if (i2c->slave != NULL) in i2c_pxa_slave_txempty()
619 i2c_slave_event(i2c->slave, I2C_SLAVE_READ_PROCESSED, in i2c_pxa_slave_txempty()
631 if (i2c->slave != NULL) in i2c_pxa_slave_rxfull()
632 i2c_slave_event(i2c->slave, I2C_SLAVE_WRITE_RECEIVED, &byte); in i2c_pxa_slave_rxfull()
642 dev_dbg(&i2c->adap.dev, "SAD, mode is slave-%cx\n", in i2c_pxa_slave_start()
645 if (i2c->slave != NULL) { in i2c_pxa_slave_start()
649 i2c_slave_event(i2c->slave, I2C_SLAVE_READ_REQUESTED, in i2c_pxa_slave_start()
653 i2c_slave_event(i2c->slave, I2C_SLAVE_WRITE_REQUESTED, in i2c_pxa_slave_start()
659 * slave could interrupt in the middle of us generating a in i2c_pxa_slave_start()
672 timeout--; in i2c_pxa_slave_start()
675 dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n"); in i2c_pxa_slave_start()
686 dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop)\n"); in i2c_pxa_slave_stop()
688 if (i2c->slave != NULL) in i2c_pxa_slave_stop()
689 i2c_slave_event(i2c->slave, I2C_SLAVE_STOP, NULL); in i2c_pxa_slave_stop()
692 dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop) acked\n"); in i2c_pxa_slave_stop()
695 * If we have a master-mode message waiting, in i2c_pxa_slave_stop()
696 * kick it off now that the slave has completed. in i2c_pxa_slave_stop()
698 if (i2c->msg) in i2c_pxa_slave_stop()
702 static int i2c_pxa_slave_reg(struct i2c_client *slave) in i2c_pxa_slave_reg() argument
704 struct pxa_i2c *i2c = slave->adapter->algo_data; in i2c_pxa_slave_reg()
706 if (i2c->slave) in i2c_pxa_slave_reg()
707 return -EBUSY; in i2c_pxa_slave_reg()
709 if (!i2c->reg_isar) in i2c_pxa_slave_reg()
710 return -EAFNOSUPPORT; in i2c_pxa_slave_reg()
712 i2c->slave = slave; in i2c_pxa_slave_reg()
713 i2c->slave_addr = slave->addr; in i2c_pxa_slave_reg()
715 writel(i2c->slave_addr, _ISAR(i2c)); in i2c_pxa_slave_reg()
720 static int i2c_pxa_slave_unreg(struct i2c_client *slave) in i2c_pxa_slave_unreg() argument
722 struct pxa_i2c *i2c = slave->adapter->algo_data; in i2c_pxa_slave_unreg()
724 WARN_ON(!i2c->slave); in i2c_pxa_slave_unreg()
726 i2c->slave_addr = I2C_PXA_SLAVE_ADDR; in i2c_pxa_slave_unreg()
727 writel(i2c->slave_addr, _ISAR(i2c)); in i2c_pxa_slave_unreg()
729 i2c->slave = NULL; in i2c_pxa_slave_unreg()
754 * slave could interrupt in the middle of us generating a in i2c_pxa_slave_start()
767 timeout--; in i2c_pxa_slave_start()
770 dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n"); in i2c_pxa_slave_start()
780 if (i2c->msg) in i2c_pxa_slave_stop()
786 * PXA I2C Master mode
794 * Step 1: target slave address into IDBR in i2c_pxa_start_message()
796 i2c->req_slave_addr = i2c_8bit_addr_from_msg(i2c->msg); in i2c_pxa_start_message()
797 writel(i2c->req_slave_addr, _IDBR(i2c)); in i2c_pxa_start_message()
819 * Note for HS mode, set ICR [GPIOEN].
827 spin_lock_irq(&i2c->lock); in i2c_pxa_send_mastercode()
828 i2c->highmode_enter = true; in i2c_pxa_send_mastercode()
829 writel(i2c->master_code, _IDBR(i2c)); in i2c_pxa_send_mastercode()
835 spin_unlock_irq(&i2c->lock); in i2c_pxa_send_mastercode()
836 timeout = wait_event_timeout(i2c->wait, in i2c_pxa_send_mastercode()
837 i2c->highmode_enter == false, HZ * 1); in i2c_pxa_send_mastercode()
839 i2c->highmode_enter = false; in i2c_pxa_send_mastercode()
845 * i2c_pxa_master_complete - complete the message and wake up.
849 i2c->msg_ptr = 0; in i2c_pxa_master_complete()
850 i2c->msg = NULL; in i2c_pxa_master_complete()
851 i2c->msg_idx ++; in i2c_pxa_master_complete()
852 i2c->msg_num = 0; in i2c_pxa_master_complete()
854 i2c->msg_idx = ret; in i2c_pxa_master_complete()
855 if (!i2c->use_pio) in i2c_pxa_master_complete()
856 wake_up(&i2c->wait); in i2c_pxa_master_complete()
884 (!((i2c->msg->flags & I2C_M_IGNORE_NAK) && in i2c_pxa_irq_txempty()
889 * I2C bus error - either the device NAK'd us, or in i2c_pxa_irq_txempty()
894 if (i2c->msg_ptr == 0 && i2c->msg_idx == 0) in i2c_pxa_irq_txempty()
902 * Read mode. We have just sent the address byte, and in i2c_pxa_irq_txempty()
905 if (i2c->msg_ptr == i2c->msg->len - 1 && in i2c_pxa_irq_txempty()
906 i2c->msg_idx == i2c->msg_num - 1) in i2c_pxa_irq_txempty()
910 } else if (i2c->msg_ptr < i2c->msg->len) { in i2c_pxa_irq_txempty()
912 * Write mode. Write the next data byte. in i2c_pxa_irq_txempty()
914 writel(i2c->msg->buf[i2c->msg_ptr++], _IDBR(i2c)); in i2c_pxa_irq_txempty()
922 if ((i2c->msg_ptr == i2c->msg->len) && in i2c_pxa_irq_txempty()
923 ((i2c->msg->flags & I2C_M_STOP) || in i2c_pxa_irq_txempty()
924 (i2c->msg_idx == i2c->msg_num - 1))) in i2c_pxa_irq_txempty()
927 } else if (i2c->msg_idx < i2c->msg_num - 1) { in i2c_pxa_irq_txempty()
931 i2c->msg_ptr = 0; in i2c_pxa_irq_txempty()
932 i2c->msg_idx ++; in i2c_pxa_irq_txempty()
933 i2c->msg++; in i2c_pxa_irq_txempty()
940 if (i2c->msg->flags & I2C_M_NOSTART) in i2c_pxa_irq_txempty()
946 i2c->req_slave_addr = i2c_8bit_addr_from_msg(i2c->msg); in i2c_pxa_irq_txempty()
947 writel(i2c->req_slave_addr, _IDBR(i2c)); in i2c_pxa_irq_txempty()
955 if (i2c->msg->len == 0) in i2c_pxa_irq_txempty()
960 i2c->icrlog[i2c->irqlogidx-1] = icr; in i2c_pxa_irq_txempty()
973 i2c->msg->buf[i2c->msg_ptr++] = readl(_IDBR(i2c)); in i2c_pxa_irq_rxfull()
975 if (i2c->msg_ptr < i2c->msg->len) { in i2c_pxa_irq_rxfull()
980 if (i2c->msg_ptr == i2c->msg->len - 1) in i2c_pxa_irq_rxfull()
988 i2c->icrlog[i2c->irqlogidx-1] = icr; in i2c_pxa_irq_rxfull()
1004 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n", in i2c_pxa_handler()
1009 if (i2c->irqlogidx < ARRAY_SIZE(i2c->isrlog)) in i2c_pxa_handler()
1010 i2c->isrlog[i2c->irqlogidx++] = isr; in i2c_pxa_handler()
1029 } else if (i2c->msg && (!i2c->highmode_enter)) { in i2c_pxa_handler()
1034 } else if ((isr & ISR_ITE) && i2c->highmode_enter) { in i2c_pxa_handler()
1035 i2c->highmode_enter = false; in i2c_pxa_handler()
1036 wake_up(&i2c->wait); in i2c_pxa_handler()
1057 dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n"); in i2c_pxa_do_xfer()
1058 i2c_recover_bus(&i2c->adap); in i2c_pxa_do_xfer()
1063 * Set master mode. in i2c_pxa_do_xfer()
1067 dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret); in i2c_pxa_do_xfer()
1071 if (i2c->high_mode) { in i2c_pxa_do_xfer()
1074 dev_err(&i2c->adap.dev, "i2c_pxa_send_mastercode timeout\n"); in i2c_pxa_do_xfer()
1079 spin_lock_irq(&i2c->lock); in i2c_pxa_do_xfer()
1081 i2c->msg = msg; in i2c_pxa_do_xfer()
1082 i2c->msg_num = num; in i2c_pxa_do_xfer()
1083 i2c->msg_idx = 0; in i2c_pxa_do_xfer()
1084 i2c->msg_ptr = 0; in i2c_pxa_do_xfer()
1085 i2c->irqlogidx = 0; in i2c_pxa_do_xfer()
1089 spin_unlock_irq(&i2c->lock); in i2c_pxa_do_xfer()
1094 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); in i2c_pxa_do_xfer()
1098 * We place the return code in i2c->msg_idx. in i2c_pxa_do_xfer()
1100 ret = i2c->msg_idx; in i2c_pxa_do_xfer()
1102 if (!timeout && i2c->msg_num) { in i2c_pxa_do_xfer()
1104 i2c_recover_bus(&i2c->adap); in i2c_pxa_do_xfer()
1123 if (++i >= i2c->adap.retries) in i2c_pxa_internal_xfer()
1127 dev_dbg(&i2c->adap.dev, "Retrying transmission\n"); in i2c_pxa_internal_xfer()
1132 ret = -EREMOTEIO; in i2c_pxa_internal_xfer()
1141 struct pxa_i2c *i2c = adap->algo_data; in i2c_pxa_xfer()
1161 /* Non-interrupt mode support */
1170 while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) in i2c_pxa_pio_set_master()
1175 dev_err(&i2c->adap.dev, in i2c_pxa_pio_set_master()
1181 * Set master mode. in i2c_pxa_pio_set_master()
1198 i2c->msg = msg; in i2c_pxa_do_pio_xfer()
1199 i2c->msg_num = num; in i2c_pxa_do_pio_xfer()
1200 i2c->msg_idx = 0; in i2c_pxa_do_pio_xfer()
1201 i2c->msg_ptr = 0; in i2c_pxa_do_pio_xfer()
1202 i2c->irqlogidx = 0; in i2c_pxa_do_pio_xfer()
1206 while (i2c->msg_num > 0 && --timeout) { in i2c_pxa_do_pio_xfer()
1214 * We place the return code in i2c->msg_idx. in i2c_pxa_do_pio_xfer()
1216 ret = i2c->msg_idx; in i2c_pxa_do_pio_xfer()
1230 struct pxa_i2c *i2c = adap->algo_data; in i2c_pxa_pio_xfer()
1254 struct device_node *np = pdev->dev.of_node; in i2c_pxa_probe_dt()
1256 of_match_device(i2c_pxa_dt_ids, &pdev->dev); in i2c_pxa_probe_dt()
1261 /* For device tree we always use the dynamic or alias-assigned ID */ in i2c_pxa_probe_dt()
1262 i2c->adap.nr = -1; in i2c_pxa_probe_dt()
1264 if (of_get_property(np, "mrvl,i2c-polling", NULL)) in i2c_pxa_probe_dt()
1265 i2c->use_pio = 1; in i2c_pxa_probe_dt()
1266 if (of_get_property(np, "mrvl,i2c-fast-mode", NULL)) in i2c_pxa_probe_dt()
1267 i2c->fast_mode = 1; in i2c_pxa_probe_dt()
1269 *i2c_types = (enum pxa_i2c_types)(of_id->data); in i2c_pxa_probe_dt()
1278 struct i2c_pxa_platform_data *plat = dev_get_platdata(&pdev->dev); in i2c_pxa_probe_pdata()
1281 *i2c_types = id->driver_data; in i2c_pxa_probe_pdata()
1283 i2c->use_pio = plat->use_pio; in i2c_pxa_probe_pdata()
1284 i2c->fast_mode = plat->fast_mode; in i2c_pxa_probe_pdata()
1285 i2c->high_mode = plat->high_mode; in i2c_pxa_probe_pdata()
1286 i2c->master_code = plat->master_code; in i2c_pxa_probe_pdata()
1287 if (!i2c->master_code) in i2c_pxa_probe_pdata()
1288 i2c->master_code = 0xe; in i2c_pxa_probe_pdata()
1289 i2c->rate = plat->rate; in i2c_pxa_probe_pdata()
1296 struct pxa_i2c *i2c = adap->algo_data; in i2c_pxa_prepare_recovery()
1303 gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS); in i2c_pxa_prepare_recovery()
1304 gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS); in i2c_pxa_prepare_recovery()
1309 struct pxa_i2c *i2c = adap->algo_data; in i2c_pxa_unprepare_recovery()
1310 struct i2c_bus_recovery_info *bri = adap->bus_recovery_info; in i2c_pxa_unprepare_recovery()
1319 dev_dbg(&i2c->adap.dev, in i2c_pxa_unprepare_recovery()
1324 WARN_ON(pinctrl_select_state(bri->pinctrl, bri->pins_default)); in i2c_pxa_unprepare_recovery()
1326 dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n", in i2c_pxa_unprepare_recovery()
1334 struct i2c_bus_recovery_info *bri = &i2c->recovery; in i2c_pxa_init_recovery()
1335 struct device *dev = i2c->adap.dev.parent; in i2c_pxa_init_recovery()
1338 * When slave mode is enabled, we are not the only master on the bus. in i2c_pxa_init_recovery()
1340 * we can't be certain of. Therefore, when slave mode is enabled, do in i2c_pxa_init_recovery()
1346 bri->pinctrl = devm_pinctrl_get(dev); in i2c_pxa_init_recovery()
1347 if (PTR_ERR(bri->pinctrl) == -ENODEV) { in i2c_pxa_init_recovery()
1348 bri->pinctrl = NULL; in i2c_pxa_init_recovery()
1351 if (IS_ERR(bri->pinctrl)) in i2c_pxa_init_recovery()
1352 return PTR_ERR(bri->pinctrl); in i2c_pxa_init_recovery()
1354 bri->prepare_recovery = i2c_pxa_prepare_recovery; in i2c_pxa_init_recovery()
1355 bri->unprepare_recovery = i2c_pxa_unprepare_recovery; in i2c_pxa_init_recovery()
1357 i2c->adap.bus_recovery_info = bri; in i2c_pxa_init_recovery()
1364 struct i2c_pxa_platform_data *plat = dev_get_platdata(&dev->dev); in i2c_pxa_probe()
1370 i2c = devm_kzalloc(&dev->dev, sizeof(struct pxa_i2c), GFP_KERNEL); in i2c_pxa_probe()
1372 return -ENOMEM; in i2c_pxa_probe()
1375 i2c->adap.nr = dev->id; in i2c_pxa_probe()
1376 i2c->adap.owner = THIS_MODULE; in i2c_pxa_probe()
1377 i2c->adap.retries = 5; in i2c_pxa_probe()
1378 i2c->adap.algo_data = i2c; in i2c_pxa_probe()
1379 i2c->adap.dev.parent = &dev->dev; in i2c_pxa_probe()
1381 i2c->adap.dev.of_node = dev->dev.of_node; in i2c_pxa_probe()
1385 i2c->reg_base = devm_ioremap_resource(&dev->dev, res); in i2c_pxa_probe()
1386 if (IS_ERR(i2c->reg_base)) in i2c_pxa_probe()
1387 return PTR_ERR(i2c->reg_base); in i2c_pxa_probe()
1403 spin_lock_init(&i2c->lock); in i2c_pxa_probe()
1404 init_waitqueue_head(&i2c->wait); in i2c_pxa_probe()
1406 strscpy(i2c->adap.name, "pxa_i2c-i2c", sizeof(i2c->adap.name)); in i2c_pxa_probe()
1408 i2c->clk = devm_clk_get(&dev->dev, NULL); in i2c_pxa_probe()
1409 if (IS_ERR(i2c->clk)) { in i2c_pxa_probe()
1410 dev_err(&dev->dev, "failed to get the clk: %ld\n", PTR_ERR(i2c->clk)); in i2c_pxa_probe()
1411 return PTR_ERR(i2c->clk); in i2c_pxa_probe()
1414 i2c->reg_ibmr = i2c->reg_base + pxa_reg_layout[i2c_type].ibmr; in i2c_pxa_probe()
1415 i2c->reg_idbr = i2c->reg_base + pxa_reg_layout[i2c_type].idbr; in i2c_pxa_probe()
1416 i2c->reg_icr = i2c->reg_base + pxa_reg_layout[i2c_type].icr; in i2c_pxa_probe()
1417 i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr; in i2c_pxa_probe()
1418 i2c->fm_mask = pxa_reg_layout[i2c_type].fm; in i2c_pxa_probe()
1419 i2c->hs_mask = pxa_reg_layout[i2c_type].hs; in i2c_pxa_probe()
1422 i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar; in i2c_pxa_probe()
1425 i2c->reg_ilcr = i2c->reg_base + pxa_reg_layout[i2c_type].ilcr; in i2c_pxa_probe()
1426 i2c->reg_iwcr = i2c->reg_base + pxa_reg_layout[i2c_type].iwcr; in i2c_pxa_probe()
1429 i2c->iobase = res->start; in i2c_pxa_probe()
1430 i2c->iosize = resource_size(res); in i2c_pxa_probe()
1432 i2c->irq = irq; in i2c_pxa_probe()
1434 i2c->slave_addr = I2C_PXA_SLAVE_ADDR; in i2c_pxa_probe()
1435 i2c->highmode_enter = false; in i2c_pxa_probe()
1438 i2c->adap.class = plat->class; in i2c_pxa_probe()
1441 if (i2c->high_mode) { in i2c_pxa_probe()
1442 if (i2c->rate) { in i2c_pxa_probe()
1443 clk_set_rate(i2c->clk, i2c->rate); in i2c_pxa_probe()
1445 i2c->adap.name, clk_get_rate(i2c->clk)); in i2c_pxa_probe()
1448 i2c->adap.name); in i2c_pxa_probe()
1451 clk_prepare_enable(i2c->clk); in i2c_pxa_probe()
1453 if (i2c->use_pio) { in i2c_pxa_probe()
1454 i2c->adap.algo = &i2c_pxa_pio_algorithm; in i2c_pxa_probe()
1456 i2c->adap.algo = &i2c_pxa_algorithm; in i2c_pxa_probe()
1457 ret = devm_request_irq(&dev->dev, irq, i2c_pxa_handler, in i2c_pxa_probe()
1459 dev_name(&dev->dev), i2c); in i2c_pxa_probe()
1461 dev_err(&dev->dev, "failed to request irq: %d\n", ret); in i2c_pxa_probe()
1468 ret = i2c_add_numbered_adapter(&i2c->adap); in i2c_pxa_probe()
1475 dev_info(&i2c->adap.dev, " PXA I2C adapter, slave address %d\n", in i2c_pxa_probe()
1476 i2c->slave_addr); in i2c_pxa_probe()
1478 dev_info(&i2c->adap.dev, " PXA I2C adapter\n"); in i2c_pxa_probe()
1483 clk_disable_unprepare(i2c->clk); in i2c_pxa_probe()
1491 i2c_del_adapter(&i2c->adap); in i2c_pxa_remove()
1493 clk_disable_unprepare(i2c->clk); in i2c_pxa_remove()
1503 clk_disable(i2c->clk); in i2c_pxa_suspend_noirq()
1512 clk_enable(i2c->clk); in i2c_pxa_resume_noirq()
1532 .name = "pxa2xx-i2c",