100 #define NPCM_I2CCTL1			0x06  macro
447 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_eob_int()
453 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_eob_int()
513 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_int_enable()
519 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_int_enable()
526 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_master_start()
529 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_master_start()
542 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_master_stop()
545 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_master_stop()
564 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_stall_after_start()
570 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_stall_after_start()
577 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_nack()
580 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_nack()
598 	i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_slave_int_enable()
604 	iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_slave_int_enable()
616 		i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_slave_enable()
621 		iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_slave_enable()
657 	i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_reset()
664 	iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_reset()
1673 		       ioread8(bus->reg + NPCM_I2CCTL1)) == 1) &&  in npcm_i2c_int_master_handler()
1971 	val = ioread8(bus->reg + NPCM_I2CCTL1);  in npcm_i2c_init_module()
1973 	iowrite8(val, bus->reg + NPCM_I2CCTL1);  in npcm_i2c_init_module()