296 	void __iomem *pdmabase;		/* dma base address*/  member
538 		writel(I2C_DMA_WARM_RST, i2c->pdmabase + OFFSET_RST);  in mtk_i2c_init_hw()
540 		writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST);  in mtk_i2c_init_hw()
543 		       i2c->pdmabase + OFFSET_RST);  in mtk_i2c_init_hw()
547 		writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST);  in mtk_i2c_init_hw()
550 		writel(I2C_DMA_HARD_RST, i2c->pdmabase + OFFSET_RST);  in mtk_i2c_init_hw()
552 		writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST);  in mtk_i2c_init_hw()
956 		readl(i2c->pdmabase + OFFSET_INT_FLAG),  in i2c_dump_register()
957 		readl(i2c->pdmabase + OFFSET_INT_EN));  in i2c_dump_register()
959 		readl(i2c->pdmabase + OFFSET_EN),  in i2c_dump_register()
960 		readl(i2c->pdmabase + OFFSET_CON));  in i2c_dump_register()
962 		readl(i2c->pdmabase + OFFSET_TX_MEM_ADDR),  in i2c_dump_register()
963 		readl(i2c->pdmabase + OFFSET_RX_MEM_ADDR));  in i2c_dump_register()
965 		readl(i2c->pdmabase + OFFSET_TX_LEN),  in i2c_dump_register()
966 		readl(i2c->pdmabase + OFFSET_RX_LEN));  in i2c_dump_register()
968 		readl(i2c->pdmabase + OFFSET_TX_4G_MODE),  in i2c_dump_register()
969 		readl(i2c->pdmabase + OFFSET_RX_4G_MODE));  in i2c_dump_register()
999 		       i2c->pdmabase + OFFSET_RST);  in mtk_i2c_do_transfer()
1001 		ret = readw_poll_timeout(i2c->pdmabase + OFFSET_RST,  in mtk_i2c_do_transfer()
1010 		writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST);  in mtk_i2c_do_transfer()
1064 		writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG);  in mtk_i2c_do_transfer()
1065 		writel(I2C_DMA_CON_RX | dma_sync, i2c->pdmabase + OFFSET_CON);  in mtk_i2c_do_transfer()
1081 			writel(reg_4g_mode, i2c->pdmabase + OFFSET_RX_4G_MODE);  in mtk_i2c_do_transfer()
1084 		writel((u32)rpaddr, i2c->pdmabase + OFFSET_RX_MEM_ADDR);  in mtk_i2c_do_transfer()
1085 		writel(msgs->len, i2c->pdmabase + OFFSET_RX_LEN);  in mtk_i2c_do_transfer()
1087 		writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG);  in mtk_i2c_do_transfer()
1088 		writel(I2C_DMA_CON_TX | dma_sync, i2c->pdmabase + OFFSET_CON);  in mtk_i2c_do_transfer()
1104 			writel(reg_4g_mode, i2c->pdmabase + OFFSET_TX_4G_MODE);  in mtk_i2c_do_transfer()
1107 		writel((u32)wpaddr, i2c->pdmabase + OFFSET_TX_MEM_ADDR);  in mtk_i2c_do_transfer()
1108 		writel(msgs->len, i2c->pdmabase + OFFSET_TX_LEN);  in mtk_i2c_do_transfer()
1110 		writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_INT_FLAG);  in mtk_i2c_do_transfer()
1111 		writel(I2C_DMA_CLR_FLAG | dma_sync, i2c->pdmabase + OFFSET_CON);  in mtk_i2c_do_transfer()
1150 			writel(reg_4g_mode, i2c->pdmabase + OFFSET_TX_4G_MODE);  in mtk_i2c_do_transfer()
1153 			writel(reg_4g_mode, i2c->pdmabase + OFFSET_RX_4G_MODE);  in mtk_i2c_do_transfer()
1156 		writel((u32)wpaddr, i2c->pdmabase + OFFSET_TX_MEM_ADDR);  in mtk_i2c_do_transfer()
1157 		writel((u32)rpaddr, i2c->pdmabase + OFFSET_RX_MEM_ADDR);  in mtk_i2c_do_transfer()
1158 		writel(msgs->len, i2c->pdmabase + OFFSET_TX_LEN);  in mtk_i2c_do_transfer()
1159 		writel((msgs + 1)->len, i2c->pdmabase + OFFSET_RX_LEN);  in mtk_i2c_do_transfer()
1162 	writel(I2C_DMA_START_EN, i2c->pdmabase + OFFSET_EN);  in mtk_i2c_do_transfer()
1368 	i2c->pdmabase = devm_ioremap_resource(&pdev->dev, res);  in mtk_i2c_probe()
1369 	if (IS_ERR(i2c->pdmabase))  in mtk_i2c_probe()
1370 		return PTR_ERR(i2c->pdmabase);  in mtk_i2c_probe()