521 static void mtk_i2c_writew(struct mtk_i2c *i2c, u16 val,  in mtk_i2c_writew()  function
533 	mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_START);  in mtk_i2c_init_hw()
535 	mtk_i2c_writew(i2c, intr_stat_reg, OFFSET_INTR_STAT);  in mtk_i2c_init_hw()
544 		mtk_i2c_writew(i2c, I2C_HANDSHAKE_RST | I2C_SOFT_RST,  in mtk_i2c_init_hw()
548 		mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_SOFTRESET);  in mtk_i2c_init_hw()
553 		mtk_i2c_writew(i2c, I2C_SOFT_RST, OFFSET_SOFTRESET);  in mtk_i2c_init_hw()
558 		mtk_i2c_writew(i2c, I2C_IO_CONFIG_PUSH_PULL, OFFSET_IO_CONFIG);  in mtk_i2c_init_hw()
560 		mtk_i2c_writew(i2c, I2C_IO_CONFIG_OPEN_DRAIN, OFFSET_IO_CONFIG);  in mtk_i2c_init_hw()
563 		mtk_i2c_writew(i2c, I2C_DCM_DISABLE, OFFSET_DCM_EN);  in mtk_i2c_init_hw()
565 	mtk_i2c_writew(i2c, i2c->timing_reg, OFFSET_TIMING);  in mtk_i2c_init_hw()
566 	mtk_i2c_writew(i2c, i2c->high_speed_reg, OFFSET_HS);  in mtk_i2c_init_hw()
568 		mtk_i2c_writew(i2c, i2c->ltiming_reg, OFFSET_LTIMING);  in mtk_i2c_init_hw()
577 		mtk_i2c_writew(i2c, i2c->ac_timing.inter_clk_div,  in mtk_i2c_init_hw()
579 		mtk_i2c_writew(i2c, I2C_SCL_MIS_COMP_VALUE,  in mtk_i2c_init_hw()
581 		mtk_i2c_writew(i2c, i2c->ac_timing.sda_timing,  in mtk_i2c_init_hw()
585 			mtk_i2c_writew(i2c, i2c->ac_timing.htiming,  in mtk_i2c_init_hw()
587 			mtk_i2c_writew(i2c, i2c->ac_timing.hs, OFFSET_HS);  in mtk_i2c_init_hw()
588 			mtk_i2c_writew(i2c, i2c->ac_timing.ltiming,  in mtk_i2c_init_hw()
591 			mtk_i2c_writew(i2c, i2c->ac_timing.scl_hl_ratio,  in mtk_i2c_init_hw()
593 			mtk_i2c_writew(i2c, i2c->ac_timing.hs_scl_hl_ratio,  in mtk_i2c_init_hw()
595 			mtk_i2c_writew(i2c, i2c->ac_timing.sta_stop,  in mtk_i2c_init_hw()
597 			mtk_i2c_writew(i2c, i2c->ac_timing.hs_sta_stop,  in mtk_i2c_init_hw()
601 	mtk_i2c_writew(i2c, ext_conf_val, OFFSET_EXT_CONF);  in mtk_i2c_init_hw()
605 		mtk_i2c_writew(i2c, I2C_CONTROL_WRAPPER, OFFSET_PATH_DIR);  in mtk_i2c_init_hw()
612 	mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL);  in mtk_i2c_init_hw()
613 	mtk_i2c_writew(i2c, I2C_DELAY_LEN, OFFSET_DELAY_LEN);  in mtk_i2c_init_hw()
997 		mtk_i2c_writew(i2c, 0x00, OFFSET_DEBUGCTRL);  in mtk_i2c_do_transfer()
1011 		mtk_i2c_writew(i2c, I2C_HANDSHAKE_RST, OFFSET_SOFTRESET);  in mtk_i2c_do_transfer()
1012 		mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_SOFTRESET);  in mtk_i2c_do_transfer()
1013 		mtk_i2c_writew(i2c, I2C_RELIABILITY | I2C_DMAACK_ENABLE,  in mtk_i2c_do_transfer()
1025 	mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL);  in mtk_i2c_do_transfer()
1028 	mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR);  in mtk_i2c_do_transfer()
1031 	mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR |  in mtk_i2c_do_transfer()
1034 	mtk_i2c_writew(i2c, I2C_FIFO_ADDR_CLR, OFFSET_FIFO_ADDR_CLR);  in mtk_i2c_do_transfer()
1037 	mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR |  in mtk_i2c_do_transfer()
1043 			mtk_i2c_writew(i2c, msgs->len, OFFSET_TRANSFER_LEN);  in mtk_i2c_do_transfer()
1044 			mtk_i2c_writew(i2c, (msgs + 1)->len,  in mtk_i2c_do_transfer()
1047 			mtk_i2c_writew(i2c, msgs->len | ((msgs + 1)->len) << 8,  in mtk_i2c_do_transfer()
1050 		mtk_i2c_writew(i2c, I2C_WRRD_TRANAC_VALUE, OFFSET_TRANSAC_LEN);  in mtk_i2c_do_transfer()
1052 		mtk_i2c_writew(i2c, msgs->len, OFFSET_TRANSFER_LEN);  in mtk_i2c_do_transfer()
1053 		mtk_i2c_writew(i2c, num, OFFSET_TRANSAC_LEN);  in mtk_i2c_do_transfer()
1171 	mtk_i2c_writew(i2c, start_reg, OFFSET_START);  in mtk_i2c_do_transfer()
1177 	mtk_i2c_writew(i2c, ~(restart_flag | I2C_HS_NACKERR | I2C_ACKERR |  in mtk_i2c_do_transfer()
1291 	mtk_i2c_writew(i2c, intr_stat, OFFSET_INTR_STAT);  in mtk_i2c_irq()
1303 		mtk_i2c_writew(i2c, I2C_RS_MUL_CNFG | I2C_RS_MUL_TRIG |  in mtk_i2c_irq()