Lines Matching +full:i2c +full:- +full:sda +full:- +full:hold +full:- +full:time +full:- +full:ns
1 // SPDX-License-Identifier: GPL-2.0
3 * i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
18 #include <linux/dma-mapping.h>
22 #include <linux/i2c.h>
31 #include "i2c-at91.h"
35 struct at91_twi_pdata *pdata = dev->pdata; in at91_init_twi_bus_master()
39 if (dev->fifo_size) in at91_init_twi_bus_master()
43 at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg); in at91_init_twi_bus_master()
46 if (pdata->has_dig_filtr && dev->enable_dig_filt) in at91_init_twi_bus_master()
50 if (pdata->has_adv_dig_filtr && dev->enable_dig_filt) in at91_init_twi_bus_master()
52 (AT91_TWI_FILTR_THRES(dev->filter_width) & in at91_init_twi_bus_master()
56 if (pdata->has_ana_filtr && dev->enable_ana_filt) in at91_init_twi_bus_master()
69 int ckdiv, cdiv, div, hold = 0, filter_width = 0; in at91_calc_twi_clock() local
70 struct at91_twi_pdata *pdata = dev->pdata; in at91_calc_twi_clock()
71 int offset = pdata->clk_offset; in at91_calc_twi_clock()
72 int max_ckdiv = pdata->clk_max_div; in at91_calc_twi_clock()
75 i2c_parse_fw_timings(dev->dev, t, true); in at91_calc_twi_clock()
77 div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk), in at91_calc_twi_clock()
78 2 * t->bus_freq_hz) - offset); in at91_calc_twi_clock()
83 dev_warn(dev->dev, "%d exceeds ckdiv max value which is %d.\n", in at91_calc_twi_clock()
89 if (pdata->has_hold_field) { in at91_calc_twi_clock()
91 * hold time = HOLD + 3 x T_peripheral_clock in at91_calc_twi_clock()
93 * hold. in at91_calc_twi_clock()
95 hold = DIV_ROUND_UP(t->sda_hold_ns in at91_calc_twi_clock()
96 * (clk_get_rate(dev->clk) / 1000), 1000000); in at91_calc_twi_clock()
97 hold -= 3; in at91_calc_twi_clock()
98 if (hold < 0) in at91_calc_twi_clock()
99 hold = 0; in at91_calc_twi_clock()
100 if (hold > AT91_TWI_CWGR_HOLD_MAX) { in at91_calc_twi_clock()
101 dev_warn(dev->dev, in at91_calc_twi_clock()
102 "HOLD field set to its maximum value (%d instead of %d)\n", in at91_calc_twi_clock()
103 AT91_TWI_CWGR_HOLD_MAX, hold); in at91_calc_twi_clock()
104 hold = AT91_TWI_CWGR_HOLD_MAX; in at91_calc_twi_clock()
108 if (pdata->has_adv_dig_filtr) { in at91_calc_twi_clock()
113 filter_width = DIV_ROUND_UP(t->digital_filter_width_ns in at91_calc_twi_clock()
114 * (clk_get_rate(dev->clk) / 1000), 1000000); in at91_calc_twi_clock()
116 dev_warn(dev->dev, in at91_calc_twi_clock()
123 dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv in at91_calc_twi_clock()
124 | AT91_TWI_CWGR_HOLD(hold); in at91_calc_twi_clock()
126 dev->filter_width = filter_width; in at91_calc_twi_clock()
128 dev_dbg(dev->dev, "cdiv %d ckdiv %d hold %d (%d ns), filter_width %d (%d ns)\n", in at91_calc_twi_clock()
129 cdiv, ckdiv, hold, t->sda_hold_ns, filter_width, in at91_calc_twi_clock()
130 t->digital_filter_width_ns); in at91_calc_twi_clock()
135 struct at91_twi_dma *dma = &dev->dma; in at91_twi_dma_cleanup()
139 if (dma->xfer_in_progress) { in at91_twi_dma_cleanup()
140 if (dma->direction == DMA_FROM_DEVICE) in at91_twi_dma_cleanup()
141 dmaengine_terminate_sync(dma->chan_rx); in at91_twi_dma_cleanup()
143 dmaengine_terminate_sync(dma->chan_tx); in at91_twi_dma_cleanup()
144 dma->xfer_in_progress = false; in at91_twi_dma_cleanup()
146 if (dma->buf_mapped) { in at91_twi_dma_cleanup()
147 dma_unmap_single(dev->dev, sg_dma_address(&dma->sg[0]), in at91_twi_dma_cleanup()
148 dev->buf_len, dma->direction); in at91_twi_dma_cleanup()
149 dma->buf_mapped = false; in at91_twi_dma_cleanup()
157 if (!dev->buf_len) in at91_twi_write_next_byte()
161 writeb_relaxed(*dev->buf, dev->base + AT91_TWI_THR); in at91_twi_write_next_byte()
164 if (--dev->buf_len == 0) { in at91_twi_write_next_byte()
165 if (!dev->use_alt_cmd) in at91_twi_write_next_byte()
170 dev_dbg(dev->dev, "wrote 0x%x, to go %zu\n", *dev->buf, dev->buf_len); in at91_twi_write_next_byte()
172 ++dev->buf; in at91_twi_write_next_byte()
179 dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg[0]), in at91_twi_write_data_dma_callback()
180 dev->buf_len, DMA_TO_DEVICE); in at91_twi_write_data_dma_callback()
190 if (!dev->use_alt_cmd) in at91_twi_write_data_dma_callback()
198 struct at91_twi_dma *dma = &dev->dma; in at91_twi_write_data_dma()
199 struct dma_chan *chan_tx = dma->chan_tx; in at91_twi_write_data_dma()
202 if (!dev->buf_len) in at91_twi_write_data_dma()
205 dma->direction = DMA_TO_DEVICE; in at91_twi_write_data_dma()
208 dma_addr = dma_map_single(dev->dev, dev->buf, dev->buf_len, in at91_twi_write_data_dma()
210 if (dma_mapping_error(dev->dev, dma_addr)) { in at91_twi_write_data_dma()
211 dev_err(dev->dev, "dma map failed\n"); in at91_twi_write_data_dma()
214 dma->buf_mapped = true; in at91_twi_write_data_dma()
217 if (dev->fifo_size) { in at91_twi_write_data_dma()
224 part1_len = dev->buf_len & ~0x3; in at91_twi_write_data_dma()
226 sg = &dma->sg[sg_len++]; in at91_twi_write_data_dma()
231 part2_len = dev->buf_len & 0x3; in at91_twi_write_data_dma()
233 sg = &dma->sg[sg_len++]; in at91_twi_write_data_dma()
247 sg_dma_len(&dma->sg[0]) = dev->buf_len; in at91_twi_write_data_dma()
248 sg_dma_address(&dma->sg[0]) = dma_addr; in at91_twi_write_data_dma()
251 txdesc = dmaengine_prep_slave_sg(chan_tx, dma->sg, sg_len, in at91_twi_write_data_dma()
255 dev_err(dev->dev, "dma prep slave sg failed\n"); in at91_twi_write_data_dma()
259 txdesc->callback = at91_twi_write_data_dma_callback; in at91_twi_write_data_dma()
260 txdesc->callback_param = dev; in at91_twi_write_data_dma()
262 dma->xfer_in_progress = true; in at91_twi_write_data_dma()
278 if (!dev->buf_len) { in at91_twi_read_next_byte()
284 *dev->buf = readb_relaxed(dev->base + AT91_TWI_RHR); in at91_twi_read_next_byte()
285 --dev->buf_len; in at91_twi_read_next_byte()
288 if (dev->recv_len_abort) in at91_twi_read_next_byte()
292 if (unlikely(dev->msg->flags & I2C_M_RECV_LEN)) { in at91_twi_read_next_byte()
294 if (*dev->buf <= I2C_SMBUS_BLOCK_MAX && *dev->buf > 0) { in at91_twi_read_next_byte()
295 dev->msg->flags &= ~I2C_M_RECV_LEN; in at91_twi_read_next_byte()
296 dev->buf_len += *dev->buf; in at91_twi_read_next_byte()
297 dev->msg->len = dev->buf_len + 1; in at91_twi_read_next_byte()
298 dev_dbg(dev->dev, "received block length %zu\n", in at91_twi_read_next_byte()
299 dev->buf_len); in at91_twi_read_next_byte()
302 dev->recv_len_abort = true; in at91_twi_read_next_byte()
303 dev->buf_len = 1; in at91_twi_read_next_byte()
308 if (!dev->use_alt_cmd && dev->buf_len == 1) in at91_twi_read_next_byte()
311 dev_dbg(dev->dev, "read 0x%x, to go %zu\n", *dev->buf, dev->buf_len); in at91_twi_read_next_byte()
313 ++dev->buf; in at91_twi_read_next_byte()
321 dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg[0]), in at91_twi_read_data_dma_callback()
322 dev->buf_len, DMA_FROM_DEVICE); in at91_twi_read_data_dma_callback()
324 if (!dev->use_alt_cmd) { in at91_twi_read_data_dma_callback()
326 dev->buf += dev->buf_len - 2; in at91_twi_read_data_dma_callback()
327 dev->buf_len = 2; in at91_twi_read_data_dma_callback()
337 struct at91_twi_dma *dma = &dev->dma; in at91_twi_read_data_dma()
338 struct dma_chan *chan_rx = dma->chan_rx; in at91_twi_read_data_dma()
341 buf_len = (dev->use_alt_cmd) ? dev->buf_len : dev->buf_len - 2; in at91_twi_read_data_dma()
342 dma->direction = DMA_FROM_DEVICE; in at91_twi_read_data_dma()
346 dma_addr = dma_map_single(dev->dev, dev->buf, buf_len, DMA_FROM_DEVICE); in at91_twi_read_data_dma()
347 if (dma_mapping_error(dev->dev, dma_addr)) { in at91_twi_read_data_dma()
348 dev_err(dev->dev, "dma map failed\n"); in at91_twi_read_data_dma()
351 dma->buf_mapped = true; in at91_twi_read_data_dma()
354 if (dev->fifo_size && IS_ALIGNED(buf_len, 4)) { in at91_twi_read_data_dma()
367 sg_dma_len(&dma->sg[0]) = buf_len; in at91_twi_read_data_dma()
368 sg_dma_address(&dma->sg[0]) = dma_addr; in at91_twi_read_data_dma()
370 rxdesc = dmaengine_prep_slave_sg(chan_rx, dma->sg, 1, DMA_DEV_TO_MEM, in at91_twi_read_data_dma()
373 dev_err(dev->dev, "dma prep slave sg failed\n"); in at91_twi_read_data_dma()
377 rxdesc->callback = at91_twi_read_data_dma_callback; in at91_twi_read_data_dma()
378 rxdesc->callback_param = dev; in at91_twi_read_data_dma()
380 dma->xfer_in_progress = true; in at91_twi_read_data_dma()
382 dma_async_issue_pending(dma->chan_rx); in at91_twi_read_data_dma()
407 * when the i2c slave device sends too quickly data after receiving the in atmel_twi_interrupt()
426 * When a NACK condition is detected, the I2C controller sets the NACK, in atmel_twi_interrupt()
429 * 1 - Handling NACK errors with CPU write transfer. in atmel_twi_interrupt()
432 * Holding Register (THR) otherwise the I2C controller would start a new in atmel_twi_interrupt()
433 * transfer and the I2C slave is likely to reply by another NACK. in atmel_twi_interrupt()
435 * 2 - Handling NACK errors with DMA write transfer. in atmel_twi_interrupt()
437 * By setting the TXRDY bit in the SR, the I2C controller also triggers in atmel_twi_interrupt()
439 * result depends on the hardware version of the I2C controller. in atmel_twi_interrupt()
441 * 2a - Without support of the Alternative Command mode. in atmel_twi_interrupt()
444 * next data into the THR, hence starting a new transfer: the I2C slave in atmel_twi_interrupt()
447 * the first NACK before the I2C controller detects the second NACK and in atmel_twi_interrupt()
449 * When handling the first NACK, this interrupt handler disables the I2C in atmel_twi_interrupt()
455 * 2b - With support of the Alternative Command mode. in atmel_twi_interrupt()
457 * When a NACK condition is detected, the I2C controller also locks the in atmel_twi_interrupt()
460 * this data actually won't go on the I2C bus hence a second NACK is not in atmel_twi_interrupt()
465 complete(&dev->cmd_complete); in atmel_twi_interrupt()
471 dev->transfer_status |= status; in atmel_twi_interrupt()
480 bool has_unre_flag = dev->pdata->has_unre_flag; in at91_do_twi_transfer()
481 bool has_alt_cmd = dev->pdata->has_alt_cmd; in at91_do_twi_transfer()
485 * read flag but shows the state of the transmission at the time the in at91_do_twi_transfer()
491 * Indeed let's take the case of an i2c write command using DMA. in at91_do_twi_transfer()
495 * controller from sending new data on the i2c bus after a NACK in at91_do_twi_transfer()
496 * condition has happened. Once locked, this i2c peripheral stops in at91_do_twi_transfer()
500 * these new data won't be sent to the i2c bus but they will remain in at91_do_twi_transfer()
507 * Besides, the TXCOMP bit is already set before the i2c transaction in at91_do_twi_transfer()
514 * the interrupt handler would be called immediately and the i2c command in at91_do_twi_transfer()
526 dev_dbg(dev->dev, "transfer: %s %zu bytes.\n", in at91_do_twi_transfer()
527 (dev->msg->flags & I2C_M_RD) ? "read" : "write", dev->buf_len); in at91_do_twi_transfer()
529 reinit_completion(&dev->cmd_complete); in at91_do_twi_transfer()
530 dev->transfer_status = 0; in at91_do_twi_transfer()
535 if (dev->fifo_size) { in at91_do_twi_transfer()
550 if (!dev->buf_len) { in at91_do_twi_transfer()
553 } else if (dev->msg->flags & I2C_M_RD) { in at91_do_twi_transfer()
557 if (!dev->use_alt_cmd && dev->buf_len <= 1 && in at91_do_twi_transfer()
558 !(dev->msg->flags & I2C_M_RECV_LEN)) in at91_do_twi_transfer()
566 * read n-1 bytes because of latency. in at91_do_twi_transfer()
567 * Reading n-2 bytes with dma and the two last ones manually in at91_do_twi_transfer()
570 if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) { in at91_do_twi_transfer()
580 if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) { in at91_do_twi_transfer()
587 (dev->buf_len ? AT91_TWI_TXRDY : 0)); in at91_do_twi_transfer()
591 time_left = wait_for_completion_timeout(&dev->cmd_complete, in at91_do_twi_transfer()
592 dev->adapter.timeout); in at91_do_twi_transfer()
594 dev->transfer_status |= at91_twi_read(dev, AT91_TWI_SR); in at91_do_twi_transfer()
595 dev_err(dev->dev, "controller timed out\n"); in at91_do_twi_transfer()
597 ret = -ETIMEDOUT; in at91_do_twi_transfer()
600 if (dev->transfer_status & AT91_TWI_NACK) { in at91_do_twi_transfer()
601 dev_dbg(dev->dev, "received nack\n"); in at91_do_twi_transfer()
602 ret = -EREMOTEIO; in at91_do_twi_transfer()
605 if (dev->transfer_status & AT91_TWI_OVRE) { in at91_do_twi_transfer()
606 dev_err(dev->dev, "overrun while reading\n"); in at91_do_twi_transfer()
607 ret = -EIO; in at91_do_twi_transfer()
610 if (has_unre_flag && dev->transfer_status & AT91_TWI_UNRE) { in at91_do_twi_transfer()
611 dev_err(dev->dev, "underrun while writing\n"); in at91_do_twi_transfer()
612 ret = -EIO; in at91_do_twi_transfer()
615 if ((has_alt_cmd || dev->fifo_size) && in at91_do_twi_transfer()
616 (dev->transfer_status & AT91_TWI_LOCK)) { in at91_do_twi_transfer()
617 dev_err(dev->dev, "tx locked\n"); in at91_do_twi_transfer()
618 ret = -EIO; in at91_do_twi_transfer()
621 if (dev->recv_len_abort) { in at91_do_twi_transfer()
622 dev_err(dev->dev, "invalid smbus block length recvd\n"); in at91_do_twi_transfer()
623 ret = -EPROTO; in at91_do_twi_transfer()
627 dev_dbg(dev->dev, "transfer complete\n"); in at91_do_twi_transfer()
635 if ((has_alt_cmd || dev->fifo_size) && in at91_do_twi_transfer()
636 (dev->transfer_status & AT91_TWI_LOCK)) { in at91_do_twi_transfer()
637 dev_dbg(dev->dev, "unlock tx\n"); in at91_do_twi_transfer()
643 * some faulty I2C slave devices might hold SDA down; in at91_do_twi_transfer()
647 i2c_recover_bus(&dev->adapter); in at91_do_twi_transfer()
661 dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num); in at91_twi_xfer()
663 ret = pm_runtime_get_sync(dev->dev); in at91_twi_xfer()
673 for (i = 0; i < msg->len; ++i) { in at91_twi_xfer()
674 const unsigned addr = msg->buf[msg->len - 1 - i]; in at91_twi_xfer()
682 dev->use_alt_cmd = false; in at91_twi_xfer()
683 is_read = (m_start->flags & I2C_M_RD); in at91_twi_xfer()
684 if (dev->pdata->has_alt_cmd) { in at91_twi_xfer()
685 if (m_start->len > 0 && in at91_twi_xfer()
686 m_start->len < AT91_I2C_MAX_ALT_CMD_DATA_SIZE) { in at91_twi_xfer()
689 AT91_TWI_ACR_DATAL(m_start->len) | in at91_twi_xfer()
691 dev->use_alt_cmd = true; in at91_twi_xfer()
698 (m_start->addr << 16) | in at91_twi_xfer()
700 ((!dev->use_alt_cmd && is_read) ? AT91_TWI_MREAD : 0)); in at91_twi_xfer()
702 dev->buf_len = m_start->len; in at91_twi_xfer()
703 dev->buf = m_start->buf; in at91_twi_xfer()
704 dev->msg = m_start; in at91_twi_xfer()
705 dev->recv_len_abort = false; in at91_twi_xfer()
707 if (dev->use_dma) { in at91_twi_xfer()
710 ret = -ENOMEM; in at91_twi_xfer()
713 dev->buf = dma_buf; in at91_twi_xfer()
721 pm_runtime_mark_last_busy(dev->dev); in at91_twi_xfer()
722 pm_runtime_put_autosuspend(dev->dev); in at91_twi_xfer()
751 struct at91_twi_dma *dma = &dev->dma; in at91_twi_configure_dma()
757 * for each buffer in the scatter-gather list, if its size is aligned in at91_twi_configure_dma()
769 if (dev->fifo_size) in at91_twi_configure_dma()
781 dma->chan_tx = dma_request_chan(dev->dev, "tx"); in at91_twi_configure_dma()
782 if (IS_ERR(dma->chan_tx)) { in at91_twi_configure_dma()
783 ret = PTR_ERR(dma->chan_tx); in at91_twi_configure_dma()
784 dma->chan_tx = NULL; in at91_twi_configure_dma()
788 dma->chan_rx = dma_request_chan(dev->dev, "rx"); in at91_twi_configure_dma()
789 if (IS_ERR(dma->chan_rx)) { in at91_twi_configure_dma()
790 ret = PTR_ERR(dma->chan_rx); in at91_twi_configure_dma()
791 dma->chan_rx = NULL; in at91_twi_configure_dma()
796 if (dmaengine_slave_config(dma->chan_tx, &slave_config)) { in at91_twi_configure_dma()
797 dev_err(dev->dev, "failed to configure tx channel\n"); in at91_twi_configure_dma()
798 ret = -EINVAL; in at91_twi_configure_dma()
803 if (dmaengine_slave_config(dma->chan_rx, &slave_config)) { in at91_twi_configure_dma()
804 dev_err(dev->dev, "failed to configure rx channel\n"); in at91_twi_configure_dma()
805 ret = -EINVAL; in at91_twi_configure_dma()
809 sg_init_table(dma->sg, 2); in at91_twi_configure_dma()
810 dma->buf_mapped = false; in at91_twi_configure_dma()
811 dma->xfer_in_progress = false; in at91_twi_configure_dma()
812 dev->use_dma = true; in at91_twi_configure_dma()
814 dev_info(dev->dev, "using %s (tx) and %s (rx) for DMA transfers\n", in at91_twi_configure_dma()
815 dma_chan_name(dma->chan_tx), dma_chan_name(dma->chan_rx)); in at91_twi_configure_dma()
820 if (ret != -EPROBE_DEFER) in at91_twi_configure_dma()
821 dev_info(dev->dev, "can't get DMA channel, continue without DMA support\n"); in at91_twi_configure_dma()
822 if (dma->chan_rx) in at91_twi_configure_dma()
823 dma_release_channel(dma->chan_rx); in at91_twi_configure_dma()
824 if (dma->chan_tx) in at91_twi_configure_dma()
825 dma_release_channel(dma->chan_tx); in at91_twi_configure_dma()
832 struct i2c_bus_recovery_info *rinfo = &dev->rinfo; in at91_init_twi_recovery_gpio()
834 rinfo->pinctrl = devm_pinctrl_get(&pdev->dev); in at91_init_twi_recovery_gpio()
835 if (!rinfo->pinctrl || IS_ERR(rinfo->pinctrl)) { in at91_init_twi_recovery_gpio()
836 dev_info(dev->dev, "can't get pinctrl, bus recovery not supported\n"); in at91_init_twi_recovery_gpio()
837 return PTR_ERR(rinfo->pinctrl); in at91_init_twi_recovery_gpio()
839 dev->adapter.bus_recovery_info = rinfo; in at91_init_twi_recovery_gpio()
848 dev->transfer_status |= at91_twi_read(dev, AT91_TWI_SR); in at91_twi_recover_bus_cmd()
849 if (!(dev->transfer_status & AT91_TWI_SDA)) { in at91_twi_recover_bus_cmd()
850 dev_dbg(dev->dev, "SDA is down; sending bus clear command\n"); in at91_twi_recover_bus_cmd()
851 if (dev->use_alt_cmd) { in at91_twi_recover_bus_cmd()
867 struct i2c_bus_recovery_info *rinfo = &dev->rinfo; in at91_init_twi_recovery_info()
868 bool has_clear_cmd = dev->pdata->has_clear_cmd; in at91_init_twi_recovery_info()
873 rinfo->recover_bus = at91_twi_recover_bus_cmd; in at91_init_twi_recovery_info()
874 dev->adapter.bus_recovery_info = rinfo; in at91_init_twi_recovery_info()
884 init_completion(&dev->cmd_complete); in at91_twi_probe_master()
886 rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0, in at91_twi_probe_master()
887 dev_name(dev->dev), dev); in at91_twi_probe_master()
889 dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc); in at91_twi_probe_master()
893 if (dev->dev->of_node) { in at91_twi_probe_master()
895 if (rc == -EPROBE_DEFER) in at91_twi_probe_master()
899 if (!of_property_read_u32(pdev->dev.of_node, "atmel,fifo-size", in at91_twi_probe_master()
900 &dev->fifo_size)) { in at91_twi_probe_master()
901 dev_info(dev->dev, "Using FIFO (%u data)\n", dev->fifo_size); in at91_twi_probe_master()
904 dev->enable_dig_filt = of_property_read_bool(pdev->dev.of_node, in at91_twi_probe_master()
905 "i2c-digital-filter"); in at91_twi_probe_master()
907 dev->enable_ana_filt = of_property_read_bool(pdev->dev.of_node, in at91_twi_probe_master()
908 "i2c-analog-filter"); in at91_twi_probe_master()
912 if (rc == -EPROBE_DEFER) in at91_twi_probe_master()
915 dev->adapter.algo = &at91_twi_algorithm; in at91_twi_probe_master()
916 dev->adapter.quirks = &at91_twi_quirks; in at91_twi_probe_master()