Lines Matching full:trace

14 	  and trace drivers to register themselves with. It's intended to build
17 	  trace source gets enabled.
27 	  responsible for transporting and collecting the trace data
28 	  respectively.  Link and sinks are dynamically aggregated with a trace
29 	  entity at run time to form a complete trace path.
39 	  This enables support for the Trace Memory Controller driver.
41 	  trace router - ETR) or sink (embedded trace FIFO).  The driver
54 	   lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
66 	  This enables support for the Trace Port Interface Unit driver,
68 	  components and a trace for bridging the gap between the on-chip
69 	  coresight components and a trace port collection engine, typically
80 	  This enables support for the Embedded Trace Buffer version 1.0 driver
88 	tristate "CoreSight Embedded Trace Macrocell 3.x driver"
106 	  This driver provides support for the CoreSight Embedded Trace Macrocell
107 	  version 4.x and the Embedded Trace Extensions (ETE). Both are CPU tracer
123 	tristate "CoreSight System Trace Macrocell driver"
147 	  properly, please refer Documentation/trace/coresight/coresight-cpu-debug.rst
171 	  These provide hardware triggering events between CoreSight trace
172 	  source and sink components. These can be used to halt trace or
173 	  inject events into the trace stream. CTI also provides a software
174 	  control to trigger the same halt events. This can provide fast trace
192 	tristate "Trace Buffer Extension (TRBE) driver"
195 	  This driver provides support for percpu Trace Buffer Extension (TRBE).
197 	  component. ETE generates trace data which is then captured with TRBE.
199 	  system registers. But its explicit dependency with trace unit (ETE)