Lines Matching +full:0 +full:xb270
14 * nct6683d 21(1) 16 8 32(1) 0xc730
15 * nct6686d 21(1) 16 8 32(1) 0xd440
16 * nct6687d 21(1) 16 8 32(1) 0xd590
40 module_param(force, bool, 0);
61 #define NCT6683_LD_ACPI 0x0a
62 #define NCT6683_LD_HWM 0x0b
63 #define NCT6683_LD_VID 0x0d
65 #define SIO_REG_LDSEL 0x07 /* Logical device select */
66 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
67 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
68 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
70 #define SIO_NCT6681_ID 0xb270 /* for later */
71 #define SIO_NCT6683_ID 0xc730
72 #define SIO_NCT6686_ID 0xd440
73 #define SIO_NCT6687_ID 0xd590
74 #define SIO_ID_MASK 0xFFF0
106 outb(0x87, ioreg); in superio_enter()
107 outb(0x87, ioreg); in superio_enter()
109 return 0; in superio_enter()
115 outb(0xaa, ioreg); in superio_exit()
116 outb(0x02, ioreg); in superio_exit()
117 outb(0x02, ioreg + 1); in superio_exit()
129 #define EC_PAGE_REG 0
140 #define NCT6683_REG_MON(x) (0x100 + (x) * 2)
141 #define NCT6683_REG_FAN_RPM(x) (0x140 + (x) * 2)
142 #define NCT6683_REG_PWM(x) (0x160 + (x))
143 #define NCT6683_REG_PWM_WRITE(x) (0xa28 + (x))
145 #define NCT6683_REG_MON_STS(x) (0x174 + (x))
146 #define NCT6683_REG_IDLE(x) (0x178 + (x))
148 #define NCT6683_REG_FAN_STS(x) (0x17c + (x))
149 #define NCT6683_REG_FAN_ERRSTS 0x17e
150 #define NCT6683_REG_FAN_INITSTS 0x17f
152 #define NCT6683_HWM_CFG 0x180
154 #define NCT6683_REG_MON_CFG(x) (0x1a0 + (x))
155 #define NCT6683_REG_FANIN_CFG(x) (0x1c0 + (x))
156 #define NCT6683_REG_FANOUT_CFG(x) (0x1d0 + (x))
158 #define NCT6683_REG_INTEL_TEMP_MAX(x) (0x901 + (x) * 16)
159 #define NCT6683_REG_INTEL_TEMP_CRIT(x) (0x90d + (x) * 16)
161 #define NCT6683_REG_TEMP_HYST(x) (0x330 + (x)) /* 8 bit */
162 #define NCT6683_REG_TEMP_MAX(x) (0x350 + (x)) /* 8 bit */
163 #define NCT6683_REG_MON_HIGH(x) (0x370 + (x) * 2) /* 8 bit */
164 #define NCT6683_REG_MON_LOW(x) (0x371 + (x) * 2) /* 8 bit */
166 #define NCT6683_REG_FAN_MIN(x) (0x3b8 + (x) * 2) /* 16 bit */
168 #define NCT6683_REG_FAN_CFG_CTRL 0xa01
169 #define NCT6683_FAN_CFG_REQ 0x80
170 #define NCT6683_FAN_CFG_DONE 0x40
172 #define NCT6683_REG_CUSTOMER_ID 0x602
173 #define NCT6683_CUSTOMER_ID_INTEL 0x805
174 #define NCT6683_CUSTOMER_ID_MITAC 0xa0e
175 #define NCT6683_CUSTOMER_ID_MSI 0x201
176 #define NCT6683_CUSTOMER_ID_ASROCK 0xe2c
177 #define NCT6683_CUSTOMER_ID_ASROCK2 0xe1b
179 #define NCT6683_REG_BUILD_YEAR 0x604
180 #define NCT6683_REG_BUILD_MONTH 0x605
181 #define NCT6683_REG_BUILD_DAY 0x606
182 #define NCT6683_REG_SERIAL 0x607
183 #define NCT6683_REG_VERSION_HI 0x608
184 #define NCT6683_REG_VERSION_LO 0x609
186 #define NCT6683_REG_CR_CASEOPEN 0xe8
189 #define NCT6683_REG_CR_BEEP 0xe0
195 "Diode 0 (curr)",
198 "Diode 0 (volt)",
204 "Thermistor 0",
209 "Thermistor 5", /* 0x10 */
219 "PECI 0.0", /* 0x20 */
227 "PECI DIMM 0",
232 "PCH CPU", /* 0x30 */
236 "PCH DIMM 0",
240 "SMBus 0",
246 "DIMM 0",
248 "DIMM 2", /* 0x40 */
259 "Virtual 0", /* 0x50 */
268 "VCC", /* 0x60 voltage sensors */
294 #define MON_VOLTAGE_START 0x60
320 u8 in[3][NCT6683_NUM_REG_MON]; /* [0]=in, [1]=in_max, [2]=in_min */
324 s8 temp[4][NCT6683_NUM_REG_MON];/* [0]=min, [1]=max, [2]=hyst,
417 if (repeat <= 0) in nct6683_create_attr_group()
421 for (count = 0; *t; t++, count++) in nct6683_create_attr_group()
424 if (count == 0) in nct6683_create_attr_group()
444 for (i = 0; i < repeat; i++) { in nct6683_create_attr_group()
481 #define MON_SRC_VCC 0x60
482 #define MON_SRC_VSB 0x61
483 #define MON_SRC_AVSB 0x62
484 #define MON_SRC_VBAT 0x64
500 outb_p(0xff, data->addr + EC_PAGE_REG); /* unlock */ in nct6683_read()
502 outb_p(reg & 0xff, data->addr + EC_INDEX_REG); in nct6683_read()
514 outb_p(0xff, data->addr + EC_PAGE_REG); /* unlock */ in nct6683_write()
516 outb_p(reg & 0xff, data->addr + EC_INDEX_REG); in nct6683_write()
517 outb_p(value & 0xff, data->addr + EC_DATA_REG); in nct6683_write()
526 case 0: in get_in_reg()
564 case 0: /* min */ in get_temp_reg()
587 for (i = 0; i < NCT6683_NUM_REG_PWM; i++) { in nct6683_update_pwm()
603 for (i = 0; i < data->in_num; i++) { in nct6683_update_device()
604 for (j = 0; j < 3; j++) { in nct6683_update_device()
607 if (reg >= 0) in nct6683_update_device()
614 for (i = 0; i < data->temp_num; i++) { in nct6683_update_device()
619 for (j = 0; j < 4; j++) { in nct6683_update_device()
622 if (reg >= 0) in nct6683_update_device()
629 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) { in nct6683_update_device()
687 return 0; in nct6683_in_is_visible()
692 SENSOR_TEMPLATE(in_label, "in%d_label", S_IRUGO, show_in_label, NULL, 0);
693 SENSOR_TEMPLATE_2(in_input, "in%d_input", S_IRUGO, show_in_reg, NULL, 0, 0);
694 SENSOR_TEMPLATE_2(in_min, "in%d_min", S_IRUGO, show_in_reg, NULL, 0, 1);
695 SENSOR_TEMPLATE_2(in_max, "in%d_max", S_IRUGO, show_in_reg, NULL, 0, 2);
736 ((data->fanin_cfg[sattr->index] >> 5) & 0x03) + 1); in show_fan_pulses()
748 return 0; in nct6683_fan_is_visible()
755 return 0; in nct6683_fan_is_visible()
760 SENSOR_TEMPLATE(fan_input, "fan%d_input", S_IRUGO, show_fan, NULL, 0);
761 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", S_IRUGO, show_fan_pulses, NULL, 0);
762 SENSOR_TEMPLATE(fan_min, "fan%d_min", S_IRUGO, show_fan_min, NULL, 0);
827 * 0x02..0x07: Thermal diode
828 * 0x08..0x18: Thermistor
829 * 0x20..0x2b: Intel PECI
830 * 0x42..0x49: AMD TSI
836 if (src >= 0x02 && src <= 0x07) in get_temp_type()
838 else if (src >= 0x08 && src <= 0x18) in get_temp_type()
840 else if (src >= 0x20 && src <= 0x2b) in get_temp_type()
842 else if (src >= 0x42 && src <= 0x49) in get_temp_type()
845 return 0; in get_temp_type()
871 return 0; in nct6683_temp_is_visible()
873 if (nr == 6 && get_temp_type(data->temp_src[temp]) == 0) in nct6683_temp_is_visible()
874 return 0; /* type */ in nct6683_temp_is_visible()
879 SENSOR_TEMPLATE(temp_input, "temp%d_input", S_IRUGO, show_temp16, NULL, 0);
880 SENSOR_TEMPLATE(temp_label, "temp%d_label", S_IRUGO, show_temp_label, NULL, 0);
881 SENSOR_TEMPLATE_2(temp_min, "temp%d_min", S_IRUGO, show_temp8, NULL, 0, 0);
882 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", S_IRUGO, show_temp8, NULL, 0, 1);
884 0);
885 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", S_IRUGO, show_temp8, NULL, 0, 3);
886 SENSOR_TEMPLATE(temp_type, "temp%d_type", S_IRUGO, show_temp_type, NULL, 0);
942 SENSOR_TEMPLATE(pwm, "pwm%d", S_IRUGO, show_pwm, store_pwm, 0);
952 return 0; in nct6683_pwm_is_visible()
1006 if (kstrtoul(buf, 10, &val) || (val != 0 && val != 1)) in beep_enable_store()
1067 if (kstrtoul(buf, 10, &val) || val != 0) in intrusion0_alarm_store()
1117 if (!(tmp & 0x80)) in nct6683_init_device()
1118 nct6683_write(data, NCT6683_HWM_CFG, tmp | 0x80); in nct6683_init_device()
1131 for (i = 0; i < NCT6683_NUM_REG_FAN; i++) { in nct6683_setup_fans()
1133 if (reg & 0x80) in nct6683_setup_fans()
1137 for (i = 0; i < NCT6683_NUM_REG_PWM; i++) { in nct6683_setup_fans()
1139 if (reg & 0x80) in nct6683_setup_fans()
1166 data->temp_num = 0; in nct6683_setup_sensors()
1167 data->in_num = 0; in nct6683_setup_sensors()
1168 for (i = 0; i < NCT6683_NUM_REG_MON; i++) { in nct6683_setup_sensors()
1169 reg = nct6683_read(data, NCT6683_REG_MON_CFG(i)) & 0x7f; in nct6683_setup_sensors()
1196 int groups = 0; in nct6683_probe()
1199 res = platform_get_resource(pdev, IORESOURCE_IO, 0); in nct6683_probe()
1306 return 0; in nct6683_suspend()
1321 return 0; in nct6683_resume()
1368 if (val != 0xffff) in nct6683_find()
1369 pr_debug("unsupported chip ID: 0x%04x\n", val); in nct6683_find()
1378 if (addr == 0) { in nct6683_find()
1385 if (!(val & 0x01)) { in nct6683_find()
1387 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01); in nct6683_find()
1413 int sioaddr[2] = { 0x2e, 0x4e }; in sensors_nct6683_init()
1427 * driver will probe 0x2e and 0x4e and auto-detect the presence of a in sensors_nct6683_init()
1430 for (i = 0; i < ARRAY_SIZE(pdev); i++) { in sensors_nct6683_init()
1432 if (address <= 0) in sensors_nct6683_init()
1448 memset(&res, 0, sizeof(res)); in sensors_nct6683_init()
1475 return 0; in sensors_nct6683_init()
1480 while (--i >= 0) { in sensors_nct6683_init()
1493 for (i = 0; i < ARRAY_SIZE(pdev); i++) { in sensors_nct6683_exit()