25 	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
28 #define JC42_REG_CAP		0x00
29 #define JC42_REG_CONFIG		0x01
30 #define JC42_REG_TEMP_UPPER	0x02
31 #define JC42_REG_TEMP_LOWER	0x03
32 #define JC42_REG_TEMP_CRITICAL	0x04
33 #define JC42_REG_TEMP		0x05
34 #define JC42_REG_MANID		0x06
35 #define JC42_REG_DEVICEID	0x07
36 #define JC42_REG_SMBUS		0x22 /* NXP and Atmel, possibly others? */
49 #define JC42_CFG_HYST_MASK	(0x03 << 9)
55 #define ADT_MANID		0x11d4  /* Analog Devices */
56 #define ATMEL_MANID		0x001f  /* Atmel */
57 #define ATMEL_MANID2		0x1114	/* Atmel */
58 #define MAX_MANID		0x004d  /* Maxim */
59 #define IDT_MANID		0x00b3  /* IDT */
60 #define MCP_MANID		0x0054  /* Microchip */
61 #define NXP_MANID		0x1131  /* NXP Semiconductors */
62 #define ONS_MANID		0x1b09  /* ON Semiconductor */
63 #define STM_MANID		0x104a  /* ST Microelectronics */
64 #define GT_MANID		0x1c68	/* Giantec */
65 #define GT_MANID2		0x132d	/* Giantec, 2nd mfg ID */
66 #define SI_MANID		0x1c85	/* Seiko Instruments */
74 #define ADT7408_DEVID		0x0801
75 #define ADT7408_DEVID_MASK	0xffff
78 #define AT30TS00_DEVID		0x8201
79 #define AT30TS00_DEVID_MASK	0xffff
81 #define AT30TSE004_DEVID	0x2200
82 #define AT30TSE004_DEVID_MASK	0xffff
85 #define GT30TS00_DEVID		0x2200
86 #define GT30TS00_DEVID_MASK	0xff00
88 #define GT34TS02_DEVID		0x3300
89 #define GT34TS02_DEVID_MASK	0xff00
92 #define TSE2004_DEVID		0x2200
93 #define TSE2004_DEVID_MASK	0xff00
95 #define TS3000_DEVID		0x2900  /* Also matches TSE2002 */
96 #define TS3000_DEVID_MASK	0xff00
98 #define TS3001_DEVID		0x3000
99 #define TS3001_DEVID_MASK	0xff00
102 #define MAX6604_DEVID		0x3e00
103 #define MAX6604_DEVID_MASK	0xffff
106 #define MCP9804_DEVID		0x0200
107 #define MCP9804_DEVID_MASK	0xfffc
109 #define MCP9808_DEVID		0x0400
110 #define MCP9808_DEVID_MASK	0xfffc
112 #define MCP98242_DEVID		0x2000
113 #define MCP98242_DEVID_MASK	0xfffc
115 #define MCP98243_DEVID		0x2100
116 #define MCP98243_DEVID_MASK	0xfffc
118 #define MCP98244_DEVID		0x2200
119 #define MCP98244_DEVID_MASK	0xfffc
121 #define MCP9843_DEVID		0x0000	/* Also matches mcp9805 */
122 #define MCP9843_DEVID_MASK	0xfffe
125 #define SE97_DEVID		0xa200
126 #define SE97_DEVID_MASK		0xfffc
128 #define SE98_DEVID		0xa100
129 #define SE98_DEVID_MASK		0xfffc
132 #define CAT6095_DEVID		0x0800	/* Also matches CAT34TS02 */
133 #define CAT6095_DEVID_MASK	0xffe0
135 #define CAT34TS02C_DEVID	0x0a00
136 #define CAT34TS02C_DEVID_MASK	0xfff0
138 #define CAT34TS04_DEVID		0x2200
139 #define CAT34TS04_DEVID_MASK	0xfff0
141 #define N34TS04_DEVID		0x2230
142 #define N34TS04_DEVID_MASK	0xfff0
145 #define STTS424_DEVID		0x0101
146 #define STTS424_DEVID_MASK	0xffff
148 #define STTS424E_DEVID		0x0000
149 #define STTS424E_DEVID_MASK	0xfffe
151 #define STTS2002_DEVID		0x0300
152 #define STTS2002_DEVID_MASK	0xffff
154 #define STTS2004_DEVID		0x2201
155 #define STTS2004_DEVID_MASK	0xffff
157 #define STTS3000_DEVID		0x0200
158 #define STTS3000_DEVID_MASK	0xffff
161 #define S34TS04A_DEVID		0x2221
162 #define S34TS04A_DEVID_MASK	0xffff
164 static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
203 	t_input = 0,
230 #define JC42_TEMP_MIN		0
240 	return (ntemp * 2 / 125) & 0x1fff;  in jc42_temp_to_reg()
261 		for (i = 0; i < t_num_temp; i++) {  in jc42_update_device()
263 			if (val < 0) {  in jc42_update_device()
289 		return 0;  in jc42_read()
292 		return 0;  in jc42_read()
295 		return 0;  in jc42_read()
298 		return 0;  in jc42_read()
304 		return 0;  in jc42_read()
310 		return 0;  in jc42_read()
313 		return 0;  in jc42_read()
316 		return 0;  in jc42_read()
319 		return 0;  in jc42_read()
360 		hyst = 0;  in jc42_write()
361 		if (diff > 0) {  in jc42_write()
413 		mode = 0;  in jc42_is_visible()
419 /* Return 0 if detection is successful, -ENODEV otherwise */
434 	if (cap < 0 || config < 0 || manid < 0 || devid < 0)  in jc42_detect()
437 	if ((cap & 0xff00) || (config & 0xf800))  in jc42_detect()
440 	for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {  in jc42_detect()
445 			return 0;  in jc42_detect()
489 	if (cap < 0)  in jc42_probe()
504 		if (smbus < 0)  in jc42_probe()
511 	if (config < 0)  in jc42_probe()
551 	return 0;  in jc42_suspend()
561 	return 0;  in jc42_resume()
575 	{ "jc42", 0 },