17 #include <linux/hte.h>
24 /* HTE source clock TSC is 31.25MHz */
32 /* AON HTE line map For slice 1 */
36 /* AON HTE line map For slice 2 */
237 static inline u32 tegra_hte_readl(struct tegra_hte_soc *hte, u32 reg)  in tegra_hte_readl()  argument
239 	return readl(hte->regs + reg);  in tegra_hte_readl()
242 static inline void tegra_hte_writel(struct tegra_hte_soc *hte, u32 reg,  in tegra_hte_writel()  argument
245 	writel(val, hte->regs + reg);  in tegra_hte_writel()
303 	 * HTE/GTE namespace.  in tegra_hte_line_xlate()
649 		dev_err(gc->dev, "hte chip register failed");  in tegra_hte_probe()
729 MODULE_DESCRIPTION("NVIDIA Tegra HTE (Hardware Timestamping Engine) driver");