Lines Matching +full:4 +full:- +full:ch
1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
11 #include "ipu-prv.h"
34 #define IPU_FIELD_IOX IPU_CPMEM_WORD(0, 90, 4)
74 #define IPU_FIELD_PFS IPU_CPMEM_WORD(1, 85, 4)
93 ipu_get_cpmem(struct ipuv3_channel *ch) in ipu_get_cpmem() argument
95 struct ipu_cpmem *cpmem = ch->ipu->cpmem_priv; in ipu_get_cpmem()
97 return cpmem->base + ch->num; in ipu_get_cpmem()
100 static void ipu_ch_param_write_field(struct ipuv3_channel *ch, u32 wbs, u32 v) in ipu_ch_param_write_field() argument
102 struct ipu_ch_param __iomem *base = ipu_get_cpmem(ch); in ipu_ch_param_write_field()
108 u32 mask = (1 << size) - 1; in ipu_ch_param_write_field()
113 val = readl(&base->word[word].data[i]); in ipu_ch_param_write_field()
116 writel(val, &base->word[word].data[i]); in ipu_ch_param_write_field()
118 if ((bit + size - 1) / 32 > i) { in ipu_ch_param_write_field()
119 val = readl(&base->word[word].data[i + 1]); in ipu_ch_param_write_field()
120 val &= ~(mask >> (ofs ? (32 - ofs) : 0)); in ipu_ch_param_write_field()
121 val |= v >> (ofs ? (32 - ofs) : 0); in ipu_ch_param_write_field()
122 writel(val, &base->word[word].data[i + 1]); in ipu_ch_param_write_field()
126 static u32 ipu_ch_param_read_field(struct ipuv3_channel *ch, u32 wbs) in ipu_ch_param_read_field() argument
128 struct ipu_ch_param __iomem *base = ipu_get_cpmem(ch); in ipu_ch_param_read_field()
134 u32 mask = (1 << size) - 1; in ipu_ch_param_read_field()
139 val = (readl(&base->word[word].data[i]) >> ofs) & mask; in ipu_ch_param_read_field()
141 if ((bit + size - 1) / 32 > i) { in ipu_ch_param_read_field()
144 tmp = readl(&base->word[word].data[i + 1]); in ipu_ch_param_read_field()
145 tmp &= mask >> (ofs ? (32 - ofs) : 0); in ipu_ch_param_read_field()
146 val |= tmp << (ofs ? (32 - ofs) : 0); in ipu_ch_param_read_field()
154 * point of view of the IPU corresponds to little-endian words with the first
159 * https://linuxtv.org/downloads/v4l-dvb-apis/packed-rgb.html
168 * little-endian 16-bit word with the red component at the most in v4l2_pix_fmt_to_drm_fourcc()
170 * g[2:0]b[4:0] r[4:0]g[5:3] <=> [16:0] R:G:B in v4l2_pix_fmt_to_drm_fourcc()
225 return -EINVAL; in v4l2_pix_fmt_to_drm_fourcc()
228 void ipu_cpmem_zero(struct ipuv3_channel *ch) in ipu_cpmem_zero() argument
230 struct ipu_ch_param __iomem *p = ipu_get_cpmem(ch); in ipu_cpmem_zero()
239 void ipu_cpmem_set_resolution(struct ipuv3_channel *ch, int xres, int yres) in ipu_cpmem_set_resolution() argument
241 ipu_ch_param_write_field(ch, IPU_FIELD_FW, xres - 1); in ipu_cpmem_set_resolution()
242 ipu_ch_param_write_field(ch, IPU_FIELD_FH, yres - 1); in ipu_cpmem_set_resolution()
246 void ipu_cpmem_skip_odd_chroma_rows(struct ipuv3_channel *ch) in ipu_cpmem_skip_odd_chroma_rows() argument
248 ipu_ch_param_write_field(ch, IPU_FIELD_RDRW, 1); in ipu_cpmem_skip_odd_chroma_rows()
252 void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int stride) in ipu_cpmem_set_stride() argument
254 ipu_ch_param_write_field(ch, IPU_FIELD_SLY, stride - 1); in ipu_cpmem_set_stride()
258 void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch) in ipu_cpmem_set_high_priority() argument
260 struct ipu_soc *ipu = ch->ipu; in ipu_cpmem_set_high_priority()
263 if (ipu->ipu_type == IPUV3EX) in ipu_cpmem_set_high_priority()
264 ipu_ch_param_write_field(ch, IPU_FIELD_ID, 1); in ipu_cpmem_set_high_priority()
266 val = ipu_idmac_read(ipu, IDMAC_CHA_PRI(ch->num)); in ipu_cpmem_set_high_priority()
267 val |= 1 << (ch->num % 32); in ipu_cpmem_set_high_priority()
268 ipu_idmac_write(ipu, val, IDMAC_CHA_PRI(ch->num)); in ipu_cpmem_set_high_priority()
272 void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t buf) in ipu_cpmem_set_buffer() argument
277 ipu_ch_param_write_field(ch, IPU_FIELD_EBA1, buf >> 3); in ipu_cpmem_set_buffer()
279 ipu_ch_param_write_field(ch, IPU_FIELD_EBA0, buf >> 3); in ipu_cpmem_set_buffer()
283 void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off) in ipu_cpmem_set_uv_offset() argument
287 ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_off / 8); in ipu_cpmem_set_uv_offset()
288 ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_off / 8); in ipu_cpmem_set_uv_offset()
292 void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride, in ipu_cpmem_interlaced_scan() argument
298 stride = -stride; in ipu_cpmem_interlaced_scan()
299 ilo = 0x100000 - (stride / 8); in ipu_cpmem_interlaced_scan()
304 sly = (stride * 2) - 1; in ipu_cpmem_interlaced_scan()
309 sluv = stride / 2 - 1; in ipu_cpmem_interlaced_scan()
312 sluv = stride - 1; in ipu_cpmem_interlaced_scan()
315 sluv = stride - 1; in ipu_cpmem_interlaced_scan()
318 sluv = stride * 2 - 1; in ipu_cpmem_interlaced_scan()
325 ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1); in ipu_cpmem_interlaced_scan()
326 ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo); in ipu_cpmem_interlaced_scan()
327 ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly); in ipu_cpmem_interlaced_scan()
329 ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, sluv); in ipu_cpmem_interlaced_scan()
333 void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id) in ipu_cpmem_set_axi_id() argument
336 ipu_ch_param_write_field(ch, IPU_FIELD_ID, id); in ipu_cpmem_set_axi_id()
340 int ipu_cpmem_get_burstsize(struct ipuv3_channel *ch) in ipu_cpmem_get_burstsize() argument
342 return ipu_ch_param_read_field(ch, IPU_FIELD_NPB) + 1; in ipu_cpmem_get_burstsize()
346 void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize) in ipu_cpmem_set_burstsize() argument
348 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, burstsize - 1); in ipu_cpmem_set_burstsize()
352 void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch) in ipu_cpmem_set_block_mode() argument
354 ipu_ch_param_write_field(ch, IPU_FIELD_BM, 1); in ipu_cpmem_set_block_mode()
358 void ipu_cpmem_set_rotation(struct ipuv3_channel *ch, in ipu_cpmem_set_rotation() argument
363 ipu_ch_param_write_field(ch, IPU_FIELD_ROT_HF_VF, temp_rot); in ipu_cpmem_set_rotation()
367 int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch, in ipu_cpmem_set_format_rgb() argument
372 ro = rgb->bits_per_pixel - rgb->red.length - rgb->red.offset; in ipu_cpmem_set_format_rgb()
373 go = rgb->bits_per_pixel - rgb->green.length - rgb->green.offset; in ipu_cpmem_set_format_rgb()
374 bo = rgb->bits_per_pixel - rgb->blue.length - rgb->blue.offset; in ipu_cpmem_set_format_rgb()
375 to = rgb->bits_per_pixel - rgb->transp.length - rgb->transp.offset; in ipu_cpmem_set_format_rgb()
377 ipu_ch_param_write_field(ch, IPU_FIELD_WID0, rgb->red.length - 1); in ipu_cpmem_set_format_rgb()
378 ipu_ch_param_write_field(ch, IPU_FIELD_OFS0, ro); in ipu_cpmem_set_format_rgb()
379 ipu_ch_param_write_field(ch, IPU_FIELD_WID1, rgb->green.length - 1); in ipu_cpmem_set_format_rgb()
380 ipu_ch_param_write_field(ch, IPU_FIELD_OFS1, go); in ipu_cpmem_set_format_rgb()
381 ipu_ch_param_write_field(ch, IPU_FIELD_WID2, rgb->blue.length - 1); in ipu_cpmem_set_format_rgb()
382 ipu_ch_param_write_field(ch, IPU_FIELD_OFS2, bo); in ipu_cpmem_set_format_rgb()
384 if (rgb->transp.length) { in ipu_cpmem_set_format_rgb()
385 ipu_ch_param_write_field(ch, IPU_FIELD_WID3, in ipu_cpmem_set_format_rgb()
386 rgb->transp.length - 1); in ipu_cpmem_set_format_rgb()
387 ipu_ch_param_write_field(ch, IPU_FIELD_OFS3, to); in ipu_cpmem_set_format_rgb()
389 ipu_ch_param_write_field(ch, IPU_FIELD_WID3, 7); in ipu_cpmem_set_format_rgb()
390 ipu_ch_param_write_field(ch, IPU_FIELD_OFS3, in ipu_cpmem_set_format_rgb()
391 rgb->bits_per_pixel); in ipu_cpmem_set_format_rgb()
394 switch (rgb->bits_per_pixel) { in ipu_cpmem_set_format_rgb()
412 return -EINVAL; in ipu_cpmem_set_format_rgb()
414 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, bpp); in ipu_cpmem_set_format_rgb()
415 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, npb); in ipu_cpmem_set_format_rgb()
416 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 7); /* rgb mode */ in ipu_cpmem_set_format_rgb()
422 int ipu_cpmem_set_format_passthrough(struct ipuv3_channel *ch, int width) in ipu_cpmem_set_format_passthrough() argument
444 return -EINVAL; in ipu_cpmem_set_format_passthrough()
447 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, bpp); in ipu_cpmem_set_format_passthrough()
448 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, npb); in ipu_cpmem_set_format_passthrough()
449 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 6); /* raw mode */ in ipu_cpmem_set_format_passthrough()
455 void ipu_cpmem_set_yuv_interleaved(struct ipuv3_channel *ch, u32 pixel_format) in ipu_cpmem_set_yuv_interleaved() argument
459 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); /* bits/pixel */ in ipu_cpmem_set_yuv_interleaved()
460 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0xA);/* pix fmt */ in ipu_cpmem_set_yuv_interleaved()
461 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);/* burst size */ in ipu_cpmem_set_yuv_interleaved()
464 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); /* bits/pixel */ in ipu_cpmem_set_yuv_interleaved()
465 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0x8);/* pix fmt */ in ipu_cpmem_set_yuv_interleaved()
466 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31);/* burst size */ in ipu_cpmem_set_yuv_interleaved()
472 void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel *ch, in ipu_cpmem_set_yuv_planar_full() argument
478 ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, uv_stride - 1); in ipu_cpmem_set_yuv_planar_full()
479 ipu_ch_param_write_field(ch, IPU_FIELD_UBO, u_offset / 8); in ipu_cpmem_set_yuv_planar_full()
480 ipu_ch_param_write_field(ch, IPU_FIELD_VBO, v_offset / 8); in ipu_cpmem_set_yuv_planar_full()
557 .red = { .offset = 8, .length = 4, },
558 .green = { .offset = 4, .length = 4, },
559 .blue = { .offset = 0, .length = 4, },
560 .transp = { .offset = 12, .length = 4, },
588 #define Y_OFFSET(pix, x, y) ((x) + pix->bytesperline * (y))
589 #define U_OFFSET(pix, x, y) ((pix->bytesperline * pix->height) + \
590 (pix->bytesperline * ((y) / 2) / 2) + (x) / 2)
591 #define V_OFFSET(pix, x, y) ((pix->bytesperline * pix->height) + \
592 (pix->bytesperline * pix->height / 4) + \
593 (pix->bytesperline * ((y) / 2) / 2) + (x) / 2)
594 #define U2_OFFSET(pix, x, y) ((pix->bytesperline * pix->height) + \
595 (pix->bytesperline * (y) / 2) + (x) / 2)
596 #define V2_OFFSET(pix, x, y) ((pix->bytesperline * pix->height) + \
597 (pix->bytesperline * pix->height / 2) + \
598 (pix->bytesperline * (y) / 2) + (x) / 2)
599 #define UV_OFFSET(pix, x, y) ((pix->bytesperline * pix->height) + \
600 (pix->bytesperline * ((y) / 2)) + (x))
601 #define UV2_OFFSET(pix, x, y) ((pix->bytesperline * pix->height) + \
602 (pix->bytesperline * y) + (x))
606 /* See Table 37-12. Alpha channels mapping. */
614 case IPUV3_CHANNEL_MEM_BG_SYNC: return 4; in ipu_channel_albm()
618 return -EINVAL; in ipu_channel_albm()
622 static void ipu_cpmem_set_separate_alpha(struct ipuv3_channel *ch) in ipu_cpmem_set_separate_alpha() argument
624 struct ipu_soc *ipu = ch->ipu; in ipu_cpmem_set_separate_alpha()
628 albm = ipu_channel_albm(ch->num); in ipu_cpmem_set_separate_alpha()
632 ipu_ch_param_write_field(ch, IPU_FIELD_ALU, 1); in ipu_cpmem_set_separate_alpha()
633 ipu_ch_param_write_field(ch, IPU_FIELD_ALBM, albm); in ipu_cpmem_set_separate_alpha()
634 ipu_ch_param_write_field(ch, IPU_FIELD_CRE, 1); in ipu_cpmem_set_separate_alpha()
637 val |= BIT(ch->num); in ipu_cpmem_set_separate_alpha()
641 int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc) in ipu_cpmem_set_fmt() argument
647 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 2); in ipu_cpmem_set_fmt()
649 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
654 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 1); in ipu_cpmem_set_fmt()
656 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
661 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0); in ipu_cpmem_set_fmt()
663 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
667 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 4); in ipu_cpmem_set_fmt()
669 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
673 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 3); in ipu_cpmem_set_fmt()
675 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
679 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); in ipu_cpmem_set_fmt()
681 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0xA); in ipu_cpmem_set_fmt()
683 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
687 ipu_ch_param_write_field(ch, IPU_FIELD_BPP, 3); in ipu_cpmem_set_fmt()
689 ipu_ch_param_write_field(ch, IPU_FIELD_PFS, 0x8); in ipu_cpmem_set_fmt()
691 ipu_ch_param_write_field(ch, IPU_FIELD_NPB, 31); in ipu_cpmem_set_fmt()
695 ipu_cpmem_set_format_rgb(ch, &def_xbgr_32); in ipu_cpmem_set_fmt()
699 ipu_cpmem_set_format_rgb(ch, &def_xrgb_32); in ipu_cpmem_set_fmt()
704 ipu_cpmem_set_format_rgb(ch, &def_rgbx_32); in ipu_cpmem_set_fmt()
709 ipu_cpmem_set_format_rgb(ch, &def_bgrx_32); in ipu_cpmem_set_fmt()
713 ipu_cpmem_set_format_rgb(ch, &def_bgr_24); in ipu_cpmem_set_fmt()
717 ipu_cpmem_set_format_rgb(ch, &def_rgb_24); in ipu_cpmem_set_fmt()
721 ipu_cpmem_set_format_rgb(ch, &def_rgb_16); in ipu_cpmem_set_fmt()
725 ipu_cpmem_set_format_rgb(ch, &def_bgr_16); in ipu_cpmem_set_fmt()
728 ipu_cpmem_set_format_rgb(ch, &def_argb_16); in ipu_cpmem_set_fmt()
731 ipu_cpmem_set_format_rgb(ch, &def_abgr_16); in ipu_cpmem_set_fmt()
734 ipu_cpmem_set_format_rgb(ch, &def_rgba_16); in ipu_cpmem_set_fmt()
737 ipu_cpmem_set_format_rgb(ch, &def_bgra_16); in ipu_cpmem_set_fmt()
740 ipu_cpmem_set_format_rgb(ch, &def_argb_16_4444); in ipu_cpmem_set_fmt()
743 return -EINVAL; in ipu_cpmem_set_fmt()
753 ipu_ch_param_write_field(ch, IPU_FIELD_WID3, 7); in ipu_cpmem_set_fmt()
754 ipu_cpmem_set_separate_alpha(ch); in ipu_cpmem_set_fmt()
764 int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image) in ipu_cpmem_set_image() argument
766 struct v4l2_pix_format *pix = &image->pix; in ipu_cpmem_set_image()
771 __func__, pix->width, pix->height, in ipu_cpmem_set_image()
772 pix->bytesperline); in ipu_cpmem_set_image()
774 ipu_cpmem_set_resolution(ch, image->rect.width, image->rect.height); in ipu_cpmem_set_image()
775 ipu_cpmem_set_stride(ch, pix->bytesperline); in ipu_cpmem_set_image()
777 ipu_cpmem_set_fmt(ch, v4l2_pix_fmt_to_drm_fourcc(pix->pixelformat)); in ipu_cpmem_set_image()
779 switch (pix->pixelformat) { in ipu_cpmem_set_image()
781 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); in ipu_cpmem_set_image()
782 u_offset = image->u_offset ? in ipu_cpmem_set_image()
783 image->u_offset : U_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
784 image->rect.top) - offset; in ipu_cpmem_set_image()
785 v_offset = image->v_offset ? in ipu_cpmem_set_image()
786 image->v_offset : V_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
787 image->rect.top) - offset; in ipu_cpmem_set_image()
789 ipu_cpmem_set_yuv_planar_full(ch, pix->bytesperline / 2, in ipu_cpmem_set_image()
793 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); in ipu_cpmem_set_image()
794 u_offset = image->u_offset ? in ipu_cpmem_set_image()
795 image->u_offset : V_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
796 image->rect.top) - offset; in ipu_cpmem_set_image()
797 v_offset = image->v_offset ? in ipu_cpmem_set_image()
798 image->v_offset : U_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
799 image->rect.top) - offset; in ipu_cpmem_set_image()
801 ipu_cpmem_set_yuv_planar_full(ch, pix->bytesperline / 2, in ipu_cpmem_set_image()
805 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); in ipu_cpmem_set_image()
806 u_offset = image->u_offset ? in ipu_cpmem_set_image()
807 image->u_offset : U2_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
808 image->rect.top) - offset; in ipu_cpmem_set_image()
809 v_offset = image->v_offset ? in ipu_cpmem_set_image()
810 image->v_offset : V2_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
811 image->rect.top) - offset; in ipu_cpmem_set_image()
813 ipu_cpmem_set_yuv_planar_full(ch, pix->bytesperline / 2, in ipu_cpmem_set_image()
817 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); in ipu_cpmem_set_image()
818 u_offset = image->u_offset ? in ipu_cpmem_set_image()
819 image->u_offset : UV_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
820 image->rect.top) - offset; in ipu_cpmem_set_image()
821 v_offset = image->v_offset ? image->v_offset : 0; in ipu_cpmem_set_image()
823 ipu_cpmem_set_yuv_planar_full(ch, pix->bytesperline, in ipu_cpmem_set_image()
827 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); in ipu_cpmem_set_image()
828 u_offset = image->u_offset ? in ipu_cpmem_set_image()
829 image->u_offset : UV2_OFFSET(pix, image->rect.left, in ipu_cpmem_set_image()
830 image->rect.top) - offset; in ipu_cpmem_set_image()
831 v_offset = image->v_offset ? image->v_offset : 0; in ipu_cpmem_set_image()
833 ipu_cpmem_set_yuv_planar_full(ch, pix->bytesperline, in ipu_cpmem_set_image()
839 offset = image->rect.left * 2 + in ipu_cpmem_set_image()
840 image->rect.top * pix->bytesperline; in ipu_cpmem_set_image()
852 offset = image->rect.left * 4 + in ipu_cpmem_set_image()
853 image->rect.top * pix->bytesperline; in ipu_cpmem_set_image()
857 offset = image->rect.left * 3 + in ipu_cpmem_set_image()
858 image->rect.top * pix->bytesperline; in ipu_cpmem_set_image()
865 offset = image->rect.left + image->rect.top * pix->bytesperline; in ipu_cpmem_set_image()
872 offset = image->rect.left * 2 + in ipu_cpmem_set_image()
873 image->rect.top * pix->bytesperline; in ipu_cpmem_set_image()
879 ret = -EINVAL; in ipu_cpmem_set_image()
882 ipu_cpmem_set_buffer(ch, 0, image->phys0 + offset); in ipu_cpmem_set_image()
883 ipu_cpmem_set_buffer(ch, 1, image->phys1 + offset); in ipu_cpmem_set_image()
889 void ipu_cpmem_dump(struct ipuv3_channel *ch) in ipu_cpmem_dump() argument
891 struct ipu_ch_param __iomem *p = ipu_get_cpmem(ch); in ipu_cpmem_dump()
892 struct ipu_soc *ipu = ch->ipu; in ipu_cpmem_dump()
893 int chno = ch->num; in ipu_cpmem_dump()
895 dev_dbg(ipu->dev, "ch %d word 0 - %08X %08X %08X %08X %08X\n", chno, in ipu_cpmem_dump()
896 readl(&p->word[0].data[0]), in ipu_cpmem_dump()
897 readl(&p->word[0].data[1]), in ipu_cpmem_dump()
898 readl(&p->word[0].data[2]), in ipu_cpmem_dump()
899 readl(&p->word[0].data[3]), in ipu_cpmem_dump()
900 readl(&p->word[0].data[4])); in ipu_cpmem_dump()
901 dev_dbg(ipu->dev, "ch %d word 1 - %08X %08X %08X %08X %08X\n", chno, in ipu_cpmem_dump()
902 readl(&p->word[1].data[0]), in ipu_cpmem_dump()
903 readl(&p->word[1].data[1]), in ipu_cpmem_dump()
904 readl(&p->word[1].data[2]), in ipu_cpmem_dump()
905 readl(&p->word[1].data[3]), in ipu_cpmem_dump()
906 readl(&p->word[1].data[4])); in ipu_cpmem_dump()
907 dev_dbg(ipu->dev, "PFS 0x%x, ", in ipu_cpmem_dump()
908 ipu_ch_param_read_field(ch, IPU_FIELD_PFS)); in ipu_cpmem_dump()
909 dev_dbg(ipu->dev, "BPP 0x%x, ", in ipu_cpmem_dump()
910 ipu_ch_param_read_field(ch, IPU_FIELD_BPP)); in ipu_cpmem_dump()
911 dev_dbg(ipu->dev, "NPB 0x%x\n", in ipu_cpmem_dump()
912 ipu_ch_param_read_field(ch, IPU_FIELD_NPB)); in ipu_cpmem_dump()
914 dev_dbg(ipu->dev, "FW %d, ", in ipu_cpmem_dump()
915 ipu_ch_param_read_field(ch, IPU_FIELD_FW)); in ipu_cpmem_dump()
916 dev_dbg(ipu->dev, "FH %d, ", in ipu_cpmem_dump()
917 ipu_ch_param_read_field(ch, IPU_FIELD_FH)); in ipu_cpmem_dump()
918 dev_dbg(ipu->dev, "EBA0 0x%x\n", in ipu_cpmem_dump()
919 ipu_ch_param_read_field(ch, IPU_FIELD_EBA0) << 3); in ipu_cpmem_dump()
920 dev_dbg(ipu->dev, "EBA1 0x%x\n", in ipu_cpmem_dump()
921 ipu_ch_param_read_field(ch, IPU_FIELD_EBA1) << 3); in ipu_cpmem_dump()
922 dev_dbg(ipu->dev, "Stride %d\n", in ipu_cpmem_dump()
923 ipu_ch_param_read_field(ch, IPU_FIELD_SL)); in ipu_cpmem_dump()
924 dev_dbg(ipu->dev, "scan_order %d\n", in ipu_cpmem_dump()
925 ipu_ch_param_read_field(ch, IPU_FIELD_SO)); in ipu_cpmem_dump()
926 dev_dbg(ipu->dev, "uv_stride %d\n", in ipu_cpmem_dump()
927 ipu_ch_param_read_field(ch, IPU_FIELD_SLUV)); in ipu_cpmem_dump()
928 dev_dbg(ipu->dev, "u_offset 0x%x\n", in ipu_cpmem_dump()
929 ipu_ch_param_read_field(ch, IPU_FIELD_UBO) << 3); in ipu_cpmem_dump()
930 dev_dbg(ipu->dev, "v_offset 0x%x\n", in ipu_cpmem_dump()
931 ipu_ch_param_read_field(ch, IPU_FIELD_VBO) << 3); in ipu_cpmem_dump()
933 dev_dbg(ipu->dev, "Width0 %d+1, ", in ipu_cpmem_dump()
934 ipu_ch_param_read_field(ch, IPU_FIELD_WID0)); in ipu_cpmem_dump()
935 dev_dbg(ipu->dev, "Width1 %d+1, ", in ipu_cpmem_dump()
936 ipu_ch_param_read_field(ch, IPU_FIELD_WID1)); in ipu_cpmem_dump()
937 dev_dbg(ipu->dev, "Width2 %d+1, ", in ipu_cpmem_dump()
938 ipu_ch_param_read_field(ch, IPU_FIELD_WID2)); in ipu_cpmem_dump()
939 dev_dbg(ipu->dev, "Width3 %d+1, ", in ipu_cpmem_dump()
940 ipu_ch_param_read_field(ch, IPU_FIELD_WID3)); in ipu_cpmem_dump()
941 dev_dbg(ipu->dev, "Offset0 %d, ", in ipu_cpmem_dump()
942 ipu_ch_param_read_field(ch, IPU_FIELD_OFS0)); in ipu_cpmem_dump()
943 dev_dbg(ipu->dev, "Offset1 %d, ", in ipu_cpmem_dump()
944 ipu_ch_param_read_field(ch, IPU_FIELD_OFS1)); in ipu_cpmem_dump()
945 dev_dbg(ipu->dev, "Offset2 %d, ", in ipu_cpmem_dump()
946 ipu_ch_param_read_field(ch, IPU_FIELD_OFS2)); in ipu_cpmem_dump()
947 dev_dbg(ipu->dev, "Offset3 %d\n", in ipu_cpmem_dump()
948 ipu_ch_param_read_field(ch, IPU_FIELD_OFS3)); in ipu_cpmem_dump()
958 return -ENOMEM; in ipu_cpmem_init()
960 ipu->cpmem_priv = cpmem; in ipu_cpmem_init()
962 spin_lock_init(&cpmem->lock); in ipu_cpmem_init()
963 cpmem->base = devm_ioremap(dev, base, SZ_128K); in ipu_cpmem_init()
964 if (!cpmem->base) in ipu_cpmem_init()
965 return -ENOMEM; in ipu_cpmem_init()
968 base, cpmem->base); in ipu_cpmem_init()
969 cpmem->ipu = ipu; in ipu_cpmem_init()