3  * Tegra host1x driver
22 #include <trace/events/host1x.h>
44 void host1x_common_writel(struct host1x *host1x, u32 v, u32 r)  in host1x_common_writel()  argument
46 	writel(v, host1x->common_regs + r);  in host1x_common_writel()
49 void host1x_hypervisor_writel(struct host1x *host1x, u32 v, u32 r)  in host1x_hypervisor_writel()  argument
51 	writel(v, host1x->hv_regs + r);  in host1x_hypervisor_writel()
54 u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r)  in host1x_hypervisor_readl()  argument
56 	return readl(host1x->hv_regs + r);  in host1x_hypervisor_readl()
59 void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r)  in host1x_sync_writel()  argument
61 	void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;  in host1x_sync_writel()
66 u32 host1x_sync_readl(struct host1x *host1x, u32 r)  in host1x_sync_readl()  argument
68 	void __iomem *sync_regs = host1x->regs + host1x->info->sync_offset;  in host1x_sync_readl()
250 	{ .compatible = "nvidia,tegra234-host1x", .data = &host1x08_info, },
251 	{ .compatible = "nvidia,tegra194-host1x", .data = &host1x07_info, },
252 	{ .compatible = "nvidia,tegra186-host1x", .data = &host1x06_info, },
253 	{ .compatible = "nvidia,tegra210-host1x", .data = &host1x05_info, },
254 	{ .compatible = "nvidia,tegra124-host1x", .data = &host1x04_info, },
255 	{ .compatible = "nvidia,tegra114-host1x", .data = &host1x02_info, },
256 	{ .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, },
257 	{ .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, },
262 static void host1x_setup_virtualization_tables(struct host1x *host)  in host1x_setup_virtualization_tables()
293 static bool host1x_wants_iommu(struct host1x *host1x)  in host1x_wants_iommu()  argument
301 	 * and if the host1x firewall is enabled, there's no need to enable  in host1x_wants_iommu()
308 	 * SoCs before Tegra186 (i.e. Tegra124 and Tegra210), the host1x can  in host1x_wants_iommu()
316 	 * buffers will be mapped into a 32-bit IOVA space that host1x can  in host1x_wants_iommu()
318 	 * within the limitations of the host1x on these SoCs.  in host1x_wants_iommu()
322 	 * the host1x firewall is disabled.  in host1x_wants_iommu()
324 	if (host1x->info->dma_mask <= DMA_BIT_MASK(32)) {  in host1x_wants_iommu()
332 static struct iommu_domain *host1x_iommu_attach(struct host1x *host)  in host1x_iommu_attach()
350 	 * host1x firewall is already enabled and we don't support addressing  in host1x_iommu_attach()
353 	 * Similarly, if host1x is already attached to an IOMMU (via the DMA  in host1x_iommu_attach()
408 static int host1x_iommu_init(struct host1x *host)  in host1x_iommu_init()
441 static void host1x_iommu_exit(struct host1x *host)  in host1x_iommu_exit()
457 static int host1x_get_resets(struct host1x *host)  in host1x_get_resets()
462 	host->resets[1].id = "host1x";  in host1x_get_resets()
477 	struct host1x *host;  in host1x_probe()
516 	/* set common host1x device data */  in host1x_probe()
624 	struct host1x *host = platform_get_drvdata(pdev);  in host1x_remove()
643 	struct host1x *host = dev_get_drvdata(dev);  in host1x_runtime_suspend()
672 	struct host1x *host = dev_get_drvdata(dev);  in host1x_runtime_resume()
715 		.name = "tegra-host1x",
752  * host1x_get_dma_mask() - query the supported DMA mask for host1x
753  * @host1x: host1x instance
755  * Note that this returns the supported DMA mask for host1x, which can be
758 u64 host1x_get_dma_mask(struct host1x *host1x)  in host1x_get_dma_mask()  argument
760 	return host1x->info->dma_mask;  in host1x_get_dma_mask()
766 MODULE_DESCRIPTION("Host1x driver for Tegra products");