49 	} fifo_state[HVS_NUM_CHANNELS];  member
381 		if (!old_hvs_state->fifo_state[channel].in_use)  in vc4_atomic_commit_tail()
384 		commit = old_hvs_state->fifo_state[channel].pending_commit;  in vc4_atomic_commit_tail()
393 		old_hvs_state->fifo_state[channel].pending_commit = NULL;  in vc4_atomic_commit_tail()
468 		if (!hvs_state->fifo_state[channel].in_use)  in vc4_atomic_commit_setup()
471 		hvs_state->fifo_state[channel].pending_commit =  in vc4_atomic_commit_setup()
707 		state->fifo_state[i].in_use = old_state->fifo_state[i].in_use;  in vc4_hvs_channels_duplicate_state()
708 		state->fifo_state[i].fifo_load = old_state->fifo_state[i].fifo_load;  in vc4_hvs_channels_duplicate_state()
723 		if (!hvs_state->fifo_state[i].pending_commit)  in vc4_hvs_channels_destroy_state()
726 		drm_crtc_commit_put(hvs_state->fifo_state[i].pending_commit);  in vc4_hvs_channels_destroy_state()
743 		drm_printf(p, "\t\tin use=%d\n", hvs_state->fifo_state[i].in_use);  in vc4_hvs_channels_print_state()
744 		drm_printf(p, "\t\tload=%lu\n", hvs_state->fifo_state[i].fifo_load);  in vc4_hvs_channels_print_state()
819 	for (i = 0; i < ARRAY_SIZE(hvs_new_state->fifo_state); i++)  in vc4_pv_muxing_atomic_check()
820 		if (!hvs_new_state->fifo_state[i].in_use)  in vc4_pv_muxing_atomic_check()
855 			hvs_new_state->fifo_state[channel].in_use = false;  in vc4_pv_muxing_atomic_check()
893 		hvs_new_state->fifo_state[channel].in_use = true;  in vc4_pv_muxing_atomic_check()
933 			hvs_new_state->fifo_state[channel].fifo_load = 0;  in vc4_core_clock_atomic_check()
941 			hvs_new_state->fifo_state[channel].fifo_load =  in vc4_core_clock_atomic_check()
949 		if (!hvs_new_state->fifo_state[i].in_use)  in vc4_core_clock_atomic_check()
954 				 hvs_new_state->fifo_state[i].fifo_load,  in vc4_core_clock_atomic_check()