Lines Matching +full:dc +full:- +full:dc
1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "dc.h"
18 struct tegra_dc *dc; member
80 static void tegra_dc_write_regs(struct tegra_dc *dc, in tegra_dc_write_regs() argument
87 tegra_dc_writel(dc, table[i].value, table[i].offset); in tegra_dc_write_regs()
95 tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable)); in tegra_rgb_encoder_disable()
96 tegra_dc_commit(rgb->dc); in tegra_rgb_encoder_disable()
105 tegra_dc_write_regs(rgb->dc, rgb_enable, ARRAY_SIZE(rgb_enable)); in tegra_rgb_encoder_enable()
108 tegra_dc_writel(rgb->dc, value, DC_DISP_DATA_ENABLE_OPTIONS); in tegra_rgb_encoder_enable()
111 value = tegra_dc_readl(rgb->dc, DC_COM_PIN_OUTPUT_POLARITY(1)); in tegra_rgb_encoder_enable()
114 tegra_dc_writel(rgb->dc, value, DC_COM_PIN_OUTPUT_POLARITY(1)); in tegra_rgb_encoder_enable()
119 tegra_dc_writel(rgb->dc, value, DC_DISP_DISP_INTERFACE_CONTROL); in tegra_rgb_encoder_enable()
121 tegra_dc_commit(rgb->dc); in tegra_rgb_encoder_enable()
126 if (!rgb->pll_d2_out0) in tegra_rgb_pll_rate_change_allowed()
129 if (!clk_is_match(rgb->clk_parent, rgb->pll_d_out0) && in tegra_rgb_pll_rate_change_allowed()
130 !clk_is_match(rgb->clk_parent, rgb->pll_d2_out0)) in tegra_rgb_pll_rate_change_allowed()
142 struct tegra_dc *dc = to_tegra_dc(conn_state->crtc); in tegra_rgb_encoder_atomic_check() local
143 unsigned long pclk = crtc_state->mode.clock * 1000; in tegra_rgb_encoder_atomic_check()
172 div = ((clk_get_rate(rgb->clk) * 2) / pclk) - 2; in tegra_rgb_encoder_atomic_check()
176 err = tegra_dc_state_setup_clock(dc, crtc_state, rgb->clk_parent, in tegra_rgb_encoder_atomic_check()
179 dev_err(output->dev, "failed to setup CRTC state: %d\n", err); in tegra_rgb_encoder_atomic_check()
192 int tegra_dc_rgb_probe(struct tegra_dc *dc) in tegra_dc_rgb_probe() argument
198 np = of_get_child_by_name(dc->dev->of_node, "rgb"); in tegra_dc_rgb_probe()
200 return -ENODEV; in tegra_dc_rgb_probe()
202 rgb = devm_kzalloc(dc->dev, sizeof(*rgb), GFP_KERNEL); in tegra_dc_rgb_probe()
204 return -ENOMEM; in tegra_dc_rgb_probe()
206 rgb->output.dev = dc->dev; in tegra_dc_rgb_probe()
207 rgb->output.of_node = np; in tegra_dc_rgb_probe()
208 rgb->dc = dc; in tegra_dc_rgb_probe()
210 err = tegra_output_probe(&rgb->output); in tegra_dc_rgb_probe()
214 rgb->clk = devm_clk_get(dc->dev, NULL); in tegra_dc_rgb_probe()
215 if (IS_ERR(rgb->clk)) { in tegra_dc_rgb_probe()
216 dev_err(dc->dev, "failed to get clock\n"); in tegra_dc_rgb_probe()
217 return PTR_ERR(rgb->clk); in tegra_dc_rgb_probe()
220 rgb->clk_parent = devm_clk_get(dc->dev, "parent"); in tegra_dc_rgb_probe()
221 if (IS_ERR(rgb->clk_parent)) { in tegra_dc_rgb_probe()
222 dev_err(dc->dev, "failed to get parent clock\n"); in tegra_dc_rgb_probe()
223 return PTR_ERR(rgb->clk_parent); in tegra_dc_rgb_probe()
226 err = clk_set_parent(rgb->clk, rgb->clk_parent); in tegra_dc_rgb_probe()
228 dev_err(dc->dev, "failed to set parent clock: %d\n", err); in tegra_dc_rgb_probe()
232 rgb->pll_d_out0 = clk_get_sys(NULL, "pll_d_out0"); in tegra_dc_rgb_probe()
233 if (IS_ERR(rgb->pll_d_out0)) { in tegra_dc_rgb_probe()
234 err = PTR_ERR(rgb->pll_d_out0); in tegra_dc_rgb_probe()
235 dev_err(dc->dev, "failed to get pll_d_out0: %d\n", err); in tegra_dc_rgb_probe()
239 if (dc->soc->has_pll_d2_out0) { in tegra_dc_rgb_probe()
240 rgb->pll_d2_out0 = clk_get_sys(NULL, "pll_d2_out0"); in tegra_dc_rgb_probe()
241 if (IS_ERR(rgb->pll_d2_out0)) { in tegra_dc_rgb_probe()
242 err = PTR_ERR(rgb->pll_d2_out0); in tegra_dc_rgb_probe()
243 dev_err(dc->dev, "failed to get pll_d2_out0: %d\n", err); in tegra_dc_rgb_probe()
248 dc->rgb = &rgb->output; in tegra_dc_rgb_probe()
253 int tegra_dc_rgb_remove(struct tegra_dc *dc) in tegra_dc_rgb_remove() argument
257 if (!dc->rgb) in tegra_dc_rgb_remove()
260 rgb = to_rgb(dc->rgb); in tegra_dc_rgb_remove()
261 clk_put(rgb->pll_d2_out0); in tegra_dc_rgb_remove()
262 clk_put(rgb->pll_d_out0); in tegra_dc_rgb_remove()
264 tegra_output_remove(dc->rgb); in tegra_dc_rgb_remove()
265 dc->rgb = NULL; in tegra_dc_rgb_remove()
270 int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc) in tegra_dc_rgb_init() argument
272 struct tegra_output *output = dc->rgb; in tegra_dc_rgb_init()
276 if (!dc->rgb) in tegra_dc_rgb_init()
277 return -ENODEV; in tegra_dc_rgb_init()
279 drm_simple_encoder_init(drm, &output->encoder, DRM_MODE_ENCODER_LVDS); in tegra_dc_rgb_init()
280 drm_encoder_helper_add(&output->encoder, in tegra_dc_rgb_init()
284 * Wrap directly-connected panel into DRM bridge in order to let in tegra_dc_rgb_init()
287 if (output->panel) { in tegra_dc_rgb_init()
288 output->bridge = devm_drm_panel_bridge_add(output->dev, in tegra_dc_rgb_init()
289 output->panel); in tegra_dc_rgb_init()
290 if (IS_ERR(output->bridge)) { in tegra_dc_rgb_init()
291 dev_err(output->dev, in tegra_dc_rgb_init()
293 output->bridge); in tegra_dc_rgb_init()
294 return PTR_ERR(output->bridge); in tegra_dc_rgb_init()
297 output->panel = NULL; in tegra_dc_rgb_init()
305 * Encoder usually have a power-down control which needs to be enabled in tegra_dc_rgb_init()
307 * use an older device-tree version didn't model the bridge, assuming in tegra_dc_rgb_init()
311 * Newer device-trees utilize LVDS encoder bridge, which provides in tegra_dc_rgb_init()
314 * For older device-trees we wrapped panel into the panel-bridge. in tegra_dc_rgb_init()
316 if (output->bridge) { in tegra_dc_rgb_init()
317 err = drm_bridge_attach(&output->encoder, output->bridge, in tegra_dc_rgb_init()
322 connector = drm_bridge_connector_init(drm, &output->encoder); in tegra_dc_rgb_init()
324 dev_err(output->dev, in tegra_dc_rgb_init()
330 drm_connector_attach_encoder(connector, &output->encoder); in tegra_dc_rgb_init()
335 dev_err(output->dev, "failed to initialize output: %d\n", err); in tegra_dc_rgb_init()
344 output->encoder.possible_crtcs = drm_crtc_mask(&dc->base); in tegra_dc_rgb_init()
349 int tegra_dc_rgb_exit(struct tegra_dc *dc) in tegra_dc_rgb_exit() argument
351 if (dc->rgb) in tegra_dc_rgb_exit()
352 tegra_output_exit(dc->rgb); in tegra_dc_rgb_exit()