1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/dma-mapping.h>
88 		/* for DE2 VI layer which ignores alpha */
97 		/* for DE2 VI layer which ignores alpha */
106 		/* for DE2 VI layer which ignores alpha */
115 		/* for DE2 VI layer which ignores alpha */
124 		/* for DE2 VI layer which ignores alpha */
133 		/* for DE2 VI layer which ignores alpha */
142 		/* for DE2 VI layer which ignores alpha */
151 		/* for DE2 VI layer which ignores alpha */
247 	return -EINVAL;  in sun8i_mixer_drm_format_to_hw()
254 	regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF,  in sun8i_mixer_commit()
265 	planes = devm_kcalloc(drm->dev,  in sun8i_layers_init()
266 			      mixer->cfg->vi_num + mixer->cfg->ui_num + 1,  in sun8i_layers_init()
269 		return ERR_PTR(-ENOMEM);  in sun8i_layers_init()
271 	for (i = 0; i < mixer->cfg->vi_num; i++) {  in sun8i_layers_init()
276 			dev_err(drm->dev,  in sun8i_layers_init()
281 		planes[i] = &layer->plane;  in sun8i_layers_init()
284 	for (i = 0; i < mixer->cfg->ui_num; i++) {  in sun8i_layers_init()
289 			dev_err(drm->dev, "Couldn't initialize %s plane\n",  in sun8i_layers_init()
294 		planes[mixer->cfg->vi_num + i] = &layer->plane;  in sun8i_layers_init()
308 	interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);  in sun8i_mixer_mode_set()
309 	size = SUN8I_MIXER_SIZE(mode->hdisplay, mode->vdisplay);  in sun8i_mixer_mode_set()
312 			 mode->hdisplay, mode->vdisplay);  in sun8i_mixer_mode_set()
314 	regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_SIZE, size);  in sun8i_mixer_mode_set()
315 	regmap_write(engine->regs, SUN8I_MIXER_BLEND_OUTSIZE(bld_base), size);  in sun8i_mixer_mode_set()
322 	regmap_update_bits(engine->regs, SUN8I_MIXER_BLEND_OUTCTL(bld_base),  in sun8i_mixer_mode_set()
348 	ep = of_graph_get_endpoint_by_regs(node, 1, -1);  in sun8i_mixer_of_get_id()
350 		return -EINVAL;  in sun8i_mixer_of_get_id()
355 		return -EINVAL;  in sun8i_mixer_of_get_id()
367 	struct sun4i_drv *drv = drm->dev_private;  in sun8i_mixer_bind()
375 	 * The mixer uses single 32-bit register to store memory  in sun8i_mixer_bind()
376 	 * addresses, so that it cannot deal with 64-bit memory  in sun8i_mixer_bind()
383 		dev_err(dev, "Cannot do 32-bit DMA.\n");  in sun8i_mixer_bind()
389 		return -ENOMEM;  in sun8i_mixer_bind()
391 	mixer->engine.ops = &sun8i_engine_ops;  in sun8i_mixer_bind()
392 	mixer->engine.node = dev->of_node;  in sun8i_mixer_bind()
394 	if (of_find_property(dev->of_node, "iommus", NULL)) {  in sun8i_mixer_bind()
399 		 * DRM doesn't do per-device allocation either, so we  in sun8i_mixer_bind()
402 		ret = of_dma_configure(drm->dev, dev->of_node, true);  in sun8i_mixer_bind()
409 	 * if this happens. Some early DE2 DT entries don't provide  in sun8i_mixer_bind()
415 	mixer->engine.id = sun8i_mixer_of_get_id(dev->of_node);  in sun8i_mixer_bind()
417 	mixer->cfg = of_device_get_match_data(dev);  in sun8i_mixer_bind()
418 	if (!mixer->cfg)  in sun8i_mixer_bind()
419 		return -EINVAL;  in sun8i_mixer_bind()
425 	mixer->engine.regs = devm_regmap_init_mmio(dev, regs,  in sun8i_mixer_bind()
427 	if (IS_ERR(mixer->engine.regs)) {  in sun8i_mixer_bind()
429 		return PTR_ERR(mixer->engine.regs);  in sun8i_mixer_bind()
432 	mixer->reset = devm_reset_control_get(dev, NULL);  in sun8i_mixer_bind()
433 	if (IS_ERR(mixer->reset)) {  in sun8i_mixer_bind()
435 		return PTR_ERR(mixer->reset);  in sun8i_mixer_bind()
438 	ret = reset_control_deassert(mixer->reset);  in sun8i_mixer_bind()
444 	mixer->bus_clk = devm_clk_get(dev, "bus");  in sun8i_mixer_bind()
445 	if (IS_ERR(mixer->bus_clk)) {  in sun8i_mixer_bind()
447 		ret = PTR_ERR(mixer->bus_clk);  in sun8i_mixer_bind()
450 	clk_prepare_enable(mixer->bus_clk);  in sun8i_mixer_bind()
452 	mixer->mod_clk = devm_clk_get(dev, "mod");  in sun8i_mixer_bind()
453 	if (IS_ERR(mixer->mod_clk)) {  in sun8i_mixer_bind()
455 		ret = PTR_ERR(mixer->mod_clk);  in sun8i_mixer_bind()
464 	if (mixer->cfg->mod_rate)  in sun8i_mixer_bind()
465 		clk_set_rate(mixer->mod_clk, mixer->cfg->mod_rate);  in sun8i_mixer_bind()
467 	clk_prepare_enable(mixer->mod_clk);  in sun8i_mixer_bind()
469 	list_add_tail(&mixer->engine.list, &drv->engine_list);  in sun8i_mixer_bind()
473 	/* Reset registers and disable unused sub-engines */  in sun8i_mixer_bind()
474 	if (mixer->cfg->is_de3) {  in sun8i_mixer_bind()
476 			regmap_write(mixer->engine.regs, i, 0);  in sun8i_mixer_bind()
478 		regmap_write(mixer->engine.regs, SUN50I_MIXER_FCE_EN, 0);  in sun8i_mixer_bind()
479 		regmap_write(mixer->engine.regs, SUN50I_MIXER_PEAK_EN, 0);  in sun8i_mixer_bind()
480 		regmap_write(mixer->engine.regs, SUN50I_MIXER_LCTI_EN, 0);  in sun8i_mixer_bind()
481 		regmap_write(mixer->engine.regs, SUN50I_MIXER_BLS_EN, 0);  in sun8i_mixer_bind()
482 		regmap_write(mixer->engine.regs, SUN50I_MIXER_FCC_EN, 0);  in sun8i_mixer_bind()
483 		regmap_write(mixer->engine.regs, SUN50I_MIXER_DNS_EN, 0);  in sun8i_mixer_bind()
484 		regmap_write(mixer->engine.regs, SUN50I_MIXER_DRC_EN, 0);  in sun8i_mixer_bind()
485 		regmap_write(mixer->engine.regs, SUN50I_MIXER_FMT_EN, 0);  in sun8i_mixer_bind()
486 		regmap_write(mixer->engine.regs, SUN50I_MIXER_CDC0_EN, 0);  in sun8i_mixer_bind()
487 		regmap_write(mixer->engine.regs, SUN50I_MIXER_CDC1_EN, 0);  in sun8i_mixer_bind()
490 			regmap_write(mixer->engine.regs, i, 0);  in sun8i_mixer_bind()
492 		regmap_write(mixer->engine.regs, SUN8I_MIXER_FCE_EN, 0);  in sun8i_mixer_bind()
493 		regmap_write(mixer->engine.regs, SUN8I_MIXER_BWS_EN, 0);  in sun8i_mixer_bind()
494 		regmap_write(mixer->engine.regs, SUN8I_MIXER_LTI_EN, 0);  in sun8i_mixer_bind()
495 		regmap_write(mixer->engine.regs, SUN8I_MIXER_PEAK_EN, 0);  in sun8i_mixer_bind()
496 		regmap_write(mixer->engine.regs, SUN8I_MIXER_ASE_EN, 0);  in sun8i_mixer_bind()
497 		regmap_write(mixer->engine.regs, SUN8I_MIXER_FCC_EN, 0);  in sun8i_mixer_bind()
498 		regmap_write(mixer->engine.regs, SUN8I_MIXER_DCSC_EN, 0);  in sun8i_mixer_bind()
502 	regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_CTL,  in sun8i_mixer_bind()
506 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base),  in sun8i_mixer_bind()
513 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base),  in sun8i_mixer_bind()
515 	regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0),  in sun8i_mixer_bind()
518 	plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num;  in sun8i_mixer_bind()
520 		regmap_write(mixer->engine.regs,  in sun8i_mixer_bind()
524 	regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base),  in sun8i_mixer_bind()
530 	clk_disable_unprepare(mixer->bus_clk);  in sun8i_mixer_bind()
532 	reset_control_assert(mixer->reset);  in sun8i_mixer_bind()
541 	list_del(&mixer->engine.list);  in sun8i_mixer_unbind()
543 	clk_disable_unprepare(mixer->mod_clk);  in sun8i_mixer_unbind()
544 	clk_disable_unprepare(mixer->bus_clk);  in sun8i_mixer_unbind()
545 	reset_control_assert(mixer->reset);  in sun8i_mixer_unbind()
555 	return component_add(&pdev->dev, &sun8i_mixer_ops);  in sun8i_mixer_probe()
560 	component_del(&pdev->dev, &sun8i_mixer_ops);  in sun8i_mixer_remove()
665 		.compatible = "allwinner,sun8i-a83t-de2-mixer-0",
669 		.compatible = "allwinner,sun8i-a83t-de2-mixer-1",
673 		.compatible = "allwinner,sun8i-h3-de2-mixer-0",
677 		.compatible = "allwinner,sun8i-r40-de2-mixer-0",
681 		.compatible = "allwinner,sun8i-r40-de2-mixer-1",
685 		.compatible = "allwinner,sun8i-v3s-de2-mixer",
689 		.compatible = "allwinner,sun20i-d1-de2-mixer-0",
693 		.compatible = "allwinner,sun20i-d1-de2-mixer-1",
697 		.compatible = "allwinner,sun50i-a64-de2-mixer-0",
701 		.compatible = "allwinner,sun50i-a64-de2-mixer-1",
705 		.compatible = "allwinner,sun50i-h6-de3-mixer-0",
716 		.name		= "sun8i-mixer",
723 MODULE_DESCRIPTION("Allwinner DE2 Mixer driver");